HV5122 HV5222 32-Channel Serial To Parallel Converter With Open Drain Outputs Ordering Information Package Options Device 44 J-Lead Quad Ceramic Chip Carrier 44 J-Lead Quad Plastic Chip Carrier 44 Lead Quad Plastic Gullwing Die HV5122 HV5122DJ HV5122PJ HV5122PG HV5122X HV5222 HV5222DJ HV5222PJ HV5222PG HV5222X Features General Description ■ Processed with HVCMOS® technology The HV51 and HV52 are low voltage serial to high voltage parallel converters with open drain outputs. These devices have been designed for use as drivers for AC electroluminescent displays. They can also be used in any application requiring multiple output high voltage current sinking capabilities such as driving inkjet and electrostatic print heads, plasma panels, vacuum fluorescent, or large matrix LCD displays. ■ Output voltages to 225V using a ramped supply voltage ■ Sink current minimum 100mA ■ Shift register speed 8MHz ■ Strobe and enable inputs ■ CMOS compatible inputs These devices consist of a 32-bit shift register and control logic to perform the Output Enable and All-ON functions. Data is shifted through the shift register on the high to low transition of the clock. The HV51 shifts in the counterclockwise direction when viewed from the top of the package and the HV52 shifts in the clockwise direction. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. Operation of the shift register is not affected by the OE (Output Enable) or the STR (Strobe) inputs. ■ Forward and reverse shifting options ■ 44-lead ceramic surface mount package ■ Hi-Rel processing available Absolute Maximum Ratings1 Supply voltage, VDD -0.5V to +15V Output voltage, VPP -0.5V to +250V Logic input levels Ground -0.5V to VDD + 0.5V current2 Continuous total power The HV51 and HV52 have been designed to be used in systems which either switch off the high voltage supply before changing the state of the high voltage outputs or which limit the current through each output. 1.5A dissipation3 Operating temperature range Storage temperature range Lead temperature 1.6mm (1/16 inch) from case for 10 seconds Plastic Ceramic 1200mW 1500mW Plastic Ceramic -40°C to +85°C -55 to +125°C -65°C to +150°C 260°C Notes: 1. All voltages are referenced to GND. 2. Duty cycle is limited by the total power dissipated in the package. 3. For operation above 25°C ambient derate linearly to maximum operating temperature at 20mW/°C for plasitc and at 15mW/°C for ceramic. 12/13/01 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, 1 refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. HV5122/HV5222 Electrical Characteristics (over recommended operating conditions unless noted) DC Characteristics Symbol Parameter IDD VDD supply current IDDQ Quiescent VDD supply current IO(OFF) Off state output current IIH Min Typ Max Units Conditions 15 mA fCLK = 8MHz FDATA = 4MHz 100 µA All VIN = 0V 10 µA All outputs high All SWS parallel High-level logic input current 1 µA VIH = 12V IIL Low-level logic input current -1 µA VIL = 0V VOH High-level output data out V IDout = -100µA VOL Low-level output voltage 15.0 V IHVout = +100mA 1.0 V IDout = +100µA -1.5 V IOL = -100mA Max Units 8 MHz VDD - 1.0V HVOUT Data out VOC HVOUT Clamp Voltage AC Characteristics (VDD = 12V, TC = 25°C) Symbol Parameter Min Typ Conditions fCLK Clock frequency tW Clock width high or low 62 ns tSU Data set-up time before clock falls 25 ns tH Data hold time after clock falls 10 ns tON Turn ON time, HVOUT from strobe 500 ns RL = 2KΩ to 200V tDHL Delay time clock to data high to low 100 ns CL = 15pF tDLH Delay time clock to data low to high 100 ns CL = 15pF Recommended Operating Conditions Symbol Parameter Min Typ Max Units 12 13.2 V VDD Logic supply voltage 10.8 HVOUT High voltage output -0.3 225 V VIH High-level input voltage VDD - 2V VDD V VIL Low-level input voltage 2.0 V fCLK Clock frequency TA Operating free-air temperature 0 8 MHz Plastic -40 +85 °C Ceramic -55 +125 °C Notes: Power-up sequence should be the following: 1. Connect ground. 2. Apply VDD. 3. Connect all inputs to a known state. Power-down sequence should be the reverse of the above. 2 HV5122/HV5222 Input and Output Equivalent Circuits VDD VDD HVOUT Data Out Input HVIN GND GND GND Logic Data Output Logic Inputs High Voltage Outputs Switching Waveforms 12V Data In Data Valid 1 0V tSU tH 12V Clock 50% 50% 50% 0V tWH tWL Data Out 50% tDHL Data Out tDLH Strobe 50% tON HVOUT 15V 3 HV5122/HV5222 Functional Block Diagram Strobe Output Enable HVOUT1 Data Input HVOUT2 • • • 28 Additional Outputs • • • HVOUT31 Clock 32 bit Static Shift Register HVOUT32 Data Out Function Table Inputs Function Data In CLK Outputs OE Strobe Shift Reg 1 2…32 HV Outputs 1 2…32 Data Out * All on X X X L * *…* ON ON…ON * All off X X L H * *…* OFF OFF…OFF * H or L ↓ L H H or L *…* OFF OFF…OFF X H or L H H H or L *…* ON or OFF *…* Load S/R Output enable Notes: X = Don’t care * = Dependent on previous stage’s state before the last CLK : High to low transition. ↓ = High to low transition H = High level L = Low level 4 * HV5122/HV5222 Pin Configurations Package Outline HV51 44 Pin J-Lead Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 16 HVOUT 17 HVOUT 18 HVOUT 19 HVOUT 20 HVOUT 21 HVOUT 22 HVOUT 23 HVOUT 24 HVOUT 25 HVOUT 26 HVOUT 27 HVOUT 28 HVOUT 29 HVOUT 30 HVOUT 31 HVOUT 32 Data Out N/C N/C N/C N/C 39 38 37 36 35 34 33 32 31 30 29 Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function Output Enable Clock GND VDD Stobe Data In N/C HVOUT 1 HVOUT 2 HVOUT 3 HVOUT 4 HVOUT 5 HVOUT 6 HVOUT 7 HVOUT 8 HVOUT 9 HVOUT 10 HVOUT 11 HVOUT 12 HVOUT 13 HVOUT 14 HVOUT 15 40 28 41 27 42 26 43 25 44 24 1 23 2 22 3 21 4 20 5 19 6 18 7 8 9 10 11 12 13 14 15 16 17 top view 44-pin J-Lead Package 5 HV5122/HV5222 Pin Configurations Package Outline HV51 44-Pin Quad Plastic Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 11 HVOUT 12 HVOUT 13 HVOUT 14 HVOUT 15 HVOUT 16 HVOUT 17 HVOUT 18 HVOUT 19 HVOUT 20 HVOUT 21 HVOUT 22 HVOUT 23 HVOUT 24 HVOUT 25 HVOUT 26 HVOUT 27 HVOUT 28 HVOUT 29 HVOUT 30 HVOUT 31 HVOUT 32 Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function Data Out N/C N/C N/C N/C Output Enable CLK GND VDD Strobe Data In N/C HVOUT 1 HVOUT 2 HVOUT 3 HVOUT 4 HVOUT 5 HVOUT 6 HVOUT 7 HVOUT 8 HVOUT 9 HVOUT 10 44 43 42 41 40 39 38 37 36 35 34 1 33 2 32 3 31 4 30 5 29 6 28 7 27 8 26 9 25 10 24 11 23 12 13 14 15 16 17 18 19 20 21 22 top view 44-pin PQFP Package HV52 44-Pin Quad Plastic Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 22 HVOUT 21 HVOUT 20 HVOUT 19 HVOUT 18 HVOUT 17 HVOUT 16 HVOUT 15 HVOUT 14 HVOUT 13 HVOUT 12 HVOUT 11 HVOUT 10 HVOUT 9 HVOUT 8 HVOUT 7 HVOUT 6 HVOUT 5 HVOUT 4 HVOUT 3 HVOUT 2 HVOUT 1 Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function Data Out N/C N/C N/C N/C Output Enable CLK GND VDD Strobe Data In N/C HVOUT 32 HVOUT 31 HVOUT 30 HVOUT 29 HVOUT 28 HVOUT 27 HVOUT 26 HVOUT 25 HVOUT 24 HVOUT 23 12/13/010 ©2001 Supertex Inc. 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