iC-DI DUAL SENSOR INTERFACE Rev C2, Page 1/15 FEATURES APPLICATIONS ♦ Dual channel switches, configurable for high-side, low-side and push-pull operation ♦ Switches are current limited ♦ Push-pull operation with tristate function ♦ Output current of up to 100 mA per channel ♦ Parallel connection of both channels possible ♦ Channel 1 can be inverted (antivalent output) ♦ Wide supply voltage range of 9 to 30 V ♦ Sensor parameterisation via a feedback channel (up to 30 V) ♦ Switching converters and regulators for 3.3/5 V voltage generation ♦ Error detection with hysteresis with excessive temperature, overload and low voltage ♦ Driver shutdown in the event of error ♦ Error messaging via two open-collector outputs ♦ Sensor interface for light barriers and proximity switches, for example PACKAGES QFN24 4 mm x 4 mm BLOCK DIAGRAM LVH CVH 1 uF ..50 mA RSET 22 uH 8.2 kΩ VH VHL ISET VBR VCC VCC3 VCC Undervoltage Overtemp. NOVL BIAS NUVD Overload VCC3 VBO HS1 INV1 QP1 CHANN. 1 IN1 Filter and Control Logic QCFG1 QN1 1 nF LS1 LINE HS2 QP2 CHANN. 2 IN2 Filter and Control Logic QCFG2 QN2 1 nF LS2 VN OEN GND VBR CFO CFI =1 VN CFP Copyright © 2008 iC-Haus http://www.ichaus.com iC-DI DUAL SENSOR INTERFACE Rev C2, Page 2/15 DESCRIPTION iC-DI is a monolithic interface iC with two independent switching channels which enables digital sensors to drive peripheral elements, such as programmable logic controllers (PLC) and relays, for example. The switches can be operated as push-pull, highside or low-side switches using inputs QCFG1 and QCFG2 (open, high and low) and are enabled or disabled via input OEN. They are designed to cope with high driver currents of 100 mA (RSET = 8.2 kΩ), are current limited and also short-circuit-proof in that they shut down should excessive temperature or an overload occur. The output current limit can be set via an external resistor at ISET. The protective overload feature is included here as an integrator so that capacitive loads with low repeat rates can be switched without the protective circuitry cutting in. In the event of excessive temperature an error message is generated immediately. Errors are signalled by two open-collector outputs: NOVL (for excessive temperature and overloads) and NUVD (for low voltage at VBR or voltages VCC and VCC3, generated internally). The output switches are shut down with all types of error. To avoid errors occurring when the device is switched on the outputs remain at high impedance for ca. 50 ms after the low voltage threshold has been exceeded. Sensor interface iC-DI has an integrated switching converter which generates voltages VCC (5 V) and VCC3 (3.3 V) with the aid of two back-end seriesregulators. If only a low current is required inductor LVH may be omitted; the series regulators are then powered directly by VBR. Input INV1 permits the input signal at channel 1 (IN1) to be inverted. The connected sensor can be parameterised using the feedback channel with a high volt input (CFI → CFO). iC-DI DUAL SENSOR INTERFACE Rev C2, Page 3/15 PACKAGES QFN24 4 mm x 4 mm to JEDEC Standard PIN CONFIGURATION QFN24 4 mm x 4 mm 24 23 22 21 20 19 1 18 2 17 16 3 DI code... ... 4 5 15 14 13 6 7 8 9 10 11 12 PIN FUNCTIONS No. Name Function 1 ISET Reference Current for current limitation of driver outputs 2 INV1 Inverting Input Channel 1 3 IN1 Input Channel 1 PIN FUNCTIONS No. Name Function 4 QCFG1 Configuration Input Channel 1 5 QCFG2 Configuration Input Channel 2 6 IN2 Input Channel 2 7 OEN Output Enable Input 8 NOVL Overload Error Output 9 NUVD Undervoltage Error Output 10 CFO Output Feedback Channel 11 CFP Configuration Input Feedback Channel 12 CFI Input Feedback Channel 13 QP2 Output High Side Switch Channel 2 14 QN2 Output Low Side Switch Channel 2 15 VN Reference Voltage Low Side Switch 16 QN1 Output Low Side Switch Channel 1 17 QP1 Output High Side Switch Channel 1 18 VBO Reference Voltage High Side Switch 19 VBR Power Supply switching converter and linear regulators 20 VHL Inductor Switching Converter 21 VH Input Linear Regulators 22 VCC 5 V Sensor Supply 23 VCC3 3.3 V Sensor Supply 24 GND Ground Pins GND and VN must not be externally connected, otherwise with reverse bias intolerably high current may flow! The Thermal Pad is to be connected to a Ground Plane (VN) on the PCB. Only pin 1 marking on top or bottom defines the package orientation (iC-DI label and coding is subject to change). iC-DI DUAL SENSOR INTERFACE Rev C2, Page 4/15 ABSOLUTE MAXIMUM RATINGS Beyond these values damage may occur; device operation is not guaranteed. Absolute Maximum Ratings are no Operating Conditions. Integrated circuits with system interfaces, e.g. via cable accessible pins (I/O pins, line drivers) are per principle endangered by injected interferences, which may compromise the function or durability. The robustness of the devices has to be verified by the user during system development with regards to applying standards and ensured where necessary by additional protective circuitry. By the manufacturer suggested protective circuitry is for information only and given without responsibility and has to be verified within the actual system with respect to actual interferences. Item Symbol No. G001 VBO G002 I(VBO) G003 VBR G004 I(VBR) G005 V(VH) G006 I(VH) G007 V(VHL) Parameter Conditions Unit Min. Power Supply at VBO Referenced to lowest voltage of VN, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL Referenced to highest voltage of VN, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL Current in VBO Power Supply at VBR Current in VBR Voltage at VH -36 600 mA 36 V V 600 mA 36 V -36 -5 Referenced to lowest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH Referenced to highest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH V V -36 -10 Referenced to lowest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VHL Referenced to highest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VHL Current in VH Voltage at VHL 36 -10 Referenced to lowest voltage of VN, VBO, QP1, QN1, QP2, QN2, CFI, VH, VHL Referenced to highest voltage of VN, VBO, QP1, QN1, QP2, QN2, CFI, VH, VHL Max. V 70 mA 36 V -36 V G008 I(VHL) G009 V(VN) Current in VHL -150 5 mA Voltage at GND vs. VN VN < VBO VN > VBO (reverse bias) -1 -27 3 3 V V G010 I(VN) Current in VN VN < VBO VN > VBO (reverse bias) -500 -10 500 10 mA mA G011 I(GND) Current in GND -300 300 mA G012 V() Voltage at VCC, VCC3 -0.3 7 V G013 I() G014 V() Current in VCC, VCC3 -50 10 mA 36 V Voltage at QP1, QN1, QP2, QN2 G015 I() Current in QP1, QP2 G016 I() G017 V(CFI) Current in QN1, QN2 Voltage at CFI G018 I(CFI) Current in CFI G019 V() Referenced to lowest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL Referenced to highest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL; VN < VBO, VBO < 29 V VN < VBO, VBO > 29 V VN > VBO (reverse bias) -7 -36 -36 V V V -400 Referenced to lowest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL Referenced to highest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL mA 400 mA 36 V -36 V -4 4 mA Voltage at INV1, QCFG1, QCFG2, IN1, IN2, OEN, CFP -0.3 7 V G020 I() Current in INV1, QCFG1, QCFG2, IN1, IN2, OEN, CFP -4 4 mA G021 V() Voltage at NOVL, NUVD, CFO -0.3 7 V G022 I() Current in NOVL, NUVD, CFO -5 20 mA G023 V(ISET) Voltage at ISET -0.3 7 V G024 I(ISET) Current in ISET -4 4 mA G025 Vd() ESD Susceptibility at all pins 0.6 kV G026 Tj Operating Junction Temperature -40 150 °C HBM, 100 pF discharged through 1.5 kΩ All voltages are referenced to ground unless otherwise stated. All currents into the device pins are positive; all currents out of the device pins are negative. iC-DI DUAL SENSOR INTERFACE Rev C2, Page 5/15 ABSOLUTE MAXIMUM RATINGS (cont’d) Item No. Symbol G027 Ts Parameter Conditions Storage Temperature Range Unit Min. Max. -40 150 °C THERMAL DATA Operating Conditions: VBO = 9...30 V, VBR = 9...30 V (both referenced to VN), Tj = -40...125 °C, RSET = 8.2 kΩ ±1%, unless otherwise stated Item No. Symbol Parameter Conditions Unit Min. T01 Ta Operating Ambient Temperature Range (extended range on request) T02 Rthja Thermal Resistance Chip/Ambient Typ. -40 Surface mounted, thermal pad soldered to ca. 2 cm² heat sink All voltages are referenced to ground unless otherwise stated. All currents into the device pins are positive; all currents out of the device pins are negative. 30 Max. 85 °C 40 K/W iC-DI DUAL SENSOR INTERFACE Rev C2, Page 6/15 ELECTRICAL CHARACTERISTICS Operating Conditions: VBO = 9...30 V, VBR = 9...30 V (both referenced to VN), Tj = -40...125 °C, RSET = 8.2 kΩ ±1%, unless otherwise stated Item No. Symbol Parameter Conditions Unit Min. Typ. 9 24 Max. Total Device 001 VBO Permissible Supply Voltage Referenced to VN 002 I(VBO) Supply Current in VBO No load, I(QP1) = I(QP2) = 0, HSx switched on 003 VBR Permissible Supply Voltage 004 I(VBR) Supply Current in VBR VH connected to VBR, no load, I(VCC) = I(VCC3) = 0, V(OEN) = hi 005 Vc()hi Clamp Voltage hi at VBO, VBR vs. VN I() = 10 mA 006 Vc()lo Clamp Voltage lo at VBO, VBR vs. VN I() = -10 mA 007 Vc()hi Clamp Voltage hi at QN1, QN2 vs. VN I() = 1 mA, VBO and VBR > VN 008 Vc()lo Clamp Voltage lo at QP1, QP2 vs. VN 009 Vc(CFI)hi 010 Vc(CFI)lo 011 9 24 30 V 0.3 mA 30 V 6 mA 36 V -36 V 36 39 V I() = -1 mA, VBO and VBR > VN -9 -6 V Clamp Voltage hi at CFI vs. VN I() = 1 mA 36 Clamp Voltage lo at CFI vs. VN I() = -1 mA Vc(VN)hi Clamp Voltage hi at VN vs. lowest voltage of QP1, QN1, QP2, QN1, CFI I() = 1 mA 36 012 Vc()hi Clamp Voltage hi at VH, VHL I() = 1 mA 36 013 Vc()lo Clamp Voltage lo at VH, VHL I() = -1 mA 014 Vc()hi Clamp Voltage hi at VCC, VCC3, I() = 1 mA ISET, INV1, IN1, IN2, QCFG1, QCFG2, OEN, CFO, CFP, NOVL, NUVD 015 Vc()lo Clamp Voltage lo at VCC, VCC3, I() = -1 mA ISET, INV1, IN1, IN2, QCFG1, QCFG2, OEN, CFO, CFP, NOVL, NUVD 016 tpio Propagation Delay IN1 → QP1, QN1 IN2 → QP2, QN2 017 R(GND)off Resistance of GND switch VBO < VN (reverse bias) 018 R(GND)on Resistance of GND switch VBO > VN; V(GND) < VN + 0.6V V -36 V V -36 7 -0.5 V 11 µs 10 kΩ Low-Side Switch QN1, QN2; V(QCFG1) = V(QCFG2) = 0 V 101 Vs()lo Saturation Voltage lo at QN1, RSET = 5.1 kΩ; I() = 100 mA QN2 vs. VN I() = 50 mA I() = 10 mA 100 V V 2.4 RSET = 8.2 kΩ, V() = 1.4 V...VBO V 125 20 Ω 1.5 1 0.3 V V V 160 mA 102 Isc()lo Short-Circuit Current lo in QN1, QN2 103 Vol()on Overload Detection Threshold on QN1, QN2 lo → hi; referenced to GND 1.55 2.1 V 104 Vol()off Overload Detection Threshold off QN1, QN2 hi → lo; referenced to GND 1.5 1.8 V 105 Vol()hys Overload Detection Threshold Hysteresis Vol()hys = Vol()on − Vol()off 106 llk() Leakage Current at QN1, QN2 OEN = lo; V(QN1, QN2) = VBO...VBO + 6 V V(QN1, QN2) = 0...VBO V(QN1, QN2) = -6...0 V 0.1 V 0 0 -500 107 SR() Slew Rate (switch off → on) VBO = 30 V, Cl = 2.2 nF 108 Imax() Maximum Current in QN1, QN2 V(ISET) = 0 V, QNx > 3 V 195 109 Ir() Reverse Current in QN1, QN2 QNx activated; V(QNx) = -6 V -10 300 50 50 0 µA µA µA 45 V/µs 450 mA mA iC-DI DUAL SENSOR INTERFACE Rev C2, Page 7/15 ELECTRICAL CHARACTERISTICS Operating Conditions: VBO = 9...30 V, VBR = 9...30 V (both referenced to VN), Tj = -40...125 °C, RSET = 8.2 kΩ ±1%, unless otherwise stated Item No. Symbol Parameter Conditions Unit Min. High-Side Switch QP1, QP2; V(QCFG1) = V(QCFG2) = 5 V 201 Vs()hi Saturation Voltage hi vs. VBO RSET = 5.1 kΩ; I() = -100 mA I() = -50 mA I() = -10 mA Typ. Max. -1.2 -0.7 -0.3 V V V 202 Isc()hi Short-Circuit Current hi RSET = 8.2 kΩ, V() = 0...VBO − 1.5 V -160 -100 mA 203 Vol()on Overload Detection Threshold on QP1, QP2 hi → lo; referenced to VBO -2.1 -1.5 V 204 Vol()off Overload Detection Threshold off QP1, QP2 lo → hi; referenced to VBO -1.8 -1.4 V 205 Vol()hys Overload Detection Threshold Hysteresis Vol()hys = Vol()off − Vol()on 206 llk() Leakage Current at QP1, QP2 OEN = lo; V(QP1, QP2) = -6...0 V V(QP1, QP2) = 0 V...VBO V(QP1, QP2) > VBO...VBO + 6 V 207 SR() Slew Rate (switch off → on) VBO = 30 V, Cl = 2.2 nF 208 Imax() Maximum Current in QP1, QP2 V(ISET) = 0 V, VBO − QPx > 4 V 209 Ir() Reverse Current in QP1, QP2 QPx activated; V(QPx) = VBO...VBO + 6 V -125 0.1 V -500 -40 0 -630 -450 0 0 500 µA µA µA 40 V/µs -350 mA 1 mA Short-Circuit/Overload Monitor 301 toldly Time to Overload Message (NOVL 1 → 0, switch tri-state) Permanent overload (see Fig. 1) 302 tolcl Time to Overload Message Reset No overload (see Fig. 2) (NOVL 0 → 1, switch active) 126 180 280 µs 35 50 80 ms V VBR Voltage Monitor 401 VBRon Turn-On Threshold VBR Referenced to GND 8 9 402 VBRoff Turn-Off Threshold VBR Decreasing voltage VBR 7.3 8.5 403 VBRhys Hysteresis VBRhys = VBRon − VBRoff 200 404 tuvdly Time to Undervoltage Message (NUVD 1 → 0, switch tri-state) Permanent undervoltage at VBR, VCC or VCC3 15 405 tuvcl Time to Undervoltage Message Reset (NUVD 0 → 1, switch active) No undervoltage at VBR, VCC and VCC3 (see Fig. 1) 35 500 50 V mV 100 µs 80 ms 155 °C 80 ms 2 V Temperature Monitor 501 Toff Overtemperature Shutdown (NOVL 1 → 0, switch tri-state) Increasing temperature Tj 130 502 ton Overtemperature Shutdown Reset Delay (NOVL 0 → 1, switch active) Temperature Tj < Toff 35 50 Inputs IN1, IN2, INV1, QCFG1, QCFG2, OEN 601 Vt()hi Input Threshold Voltage hi at IN1, IN2, INV1, OEN 602 Vt()lo Input Threshold Voltage lo at IN1, IN2, INV1, OEN 603 Vt()hys Hysteresis at IN1, IN2, INV1, OEN Vt()hys = Vt()hi − Vt()lo 300 604 Ipd() Pull-Down Current at IN1, IN2, INV1 V() = 0.4 V...Vt()lo V() > Vt()hi 30 10 605 Ipd(OEN) Pull-Down Current at OEN V(OEN) > 0.4 V 1 606 Vahi() Input Threshold hi at QCFG1, QCFG2 (V() > Va()hi ⇒ QN1, QN2 tri-state) Referenced to VCC3 (see Fig. 3) 52 607 Vahi()hys Hysteresis hi at QCFG1, QCFG2 Referenced to VCC3 (see Fig. 3) (V() < Vahi() − Vahi()hys ⇒ QN1, QN2 active) 3 0.8 V 500 64 mV 168 40 µA µA 6 µA 69 % 7 % iC-DI DUAL SENSOR INTERFACE Rev C2, Page 8/15 ELECTRICAL CHARACTERISTICS Operating Conditions: VBO = 9...30 V, VBR = 9...30 V (both referenced to VN), Tj = -40...125 °C, RSET = 8.2 kΩ ±1%, unless otherwise stated Item No. Symbol Parameter Conditions Unit Min. Typ. Max. 29 34 % 7 % 608 Valo() Input Threshold lo at QCFG1, QCFG2 (V() < Va()lo ⇒ QP1, QP2 tri-state) Referenced to VCC3 (see Fig. 3) 24 609 Valo()hys Hysteresis lo at QCFG1, QCFG2 Referenced to VCC3 (see Fig. 3) (V() > Valo() + Valo()hys ⇒ QN1, QN2 active) 3 610 Vpp() Open Circuit Voltage at QCFG1, Referenced to VCC3 QCFG2 42 46.5 51 % 611 Ri() Internal Resistance at QCFG1, QCFG2 40 85 190 kΩ 612 tsup Permissible Spurious Pulse Width at IN1, IN2, INV1, OEN No activity triggered 2.2 µs 613 ttrig Required Pulse Width at IN1, IN2, INV1, OEN Activity triggered 614 tsup Permissible Spurious Pulse Width at QCFG1, QCFG2 No activity triggered 615 ttrig Required Pulse Width at QCFG1, Activity triggered QCFG2 7 µs 4.5 14 µs µs Error Output NOVL, NUVD 701 Vs()lo Saturation Voltage lo I() = 1.0 mA 702 Isc()lo Short Circuit Current lo V() = 0.4 V...VCC 703 Ilk() Leakage Current V() = 0 V...VCC, no error 0.4 V 1.2 25 mA -10 10 µA Feedback Channel CFI to CFO 801 Vt1(CFI)hi Input Threshold 1 hi at CFI VBR < 18 V 59 66 74 %VBR 802 Vt1(CFI)lo Input Threshold 1 lo at CFI VBR < 18 V 44 50 56 %VBR 803 Vt2(CFI)hi Input Threshold 2 hi at CFI VBR > 18 V 10.5 11.3 12 V 804 Vt2(CFI)lo Input Threshold 2 lo at CFI VBR > 18 V 8 9 10.5 V 805 Vt()hys Hysteresis at CFI Vt(CFI)hys = Vt(CFI)hi − Vt(CFI)lo 1 806 Ipu(CFI) Pull-Up Current at CFI CFP = hi, V(CFI) = 0...VBR − 3 V, V(CFI) > Vt(CFI)lo -300 -40 µA 807 Ipd(CFI) Pull-Down Current at CFI CFP = lo, V(CFI) = 3 V...VBR, V(CFI) < Vt(CFI)lo 40 300 µA 808 tpcf Propagation Delay CFI → CFO V(CFO) = 10 ↔ 90%VCC 2.4 11 µs 809 Vs()lo Saturation Voltage lo at CFO I(CFO) = 1.2 mA 810 Isc()lo Short Circuit Current lo in CFO V(CFO) = 0.4 V...VCC 811 Ilk() Leakage Current at CFO V(CFO) = 0 V...VCC, CFO inaktive 812 Vt()hi Input Threshold Voltage hi at CFP 813 Vt()lo Input Threshold Voltage lo at CFP 814 815 Vt()hys Hysteresis at CFP Vt(CFP)hys = Vt(CFP)hi − Vt(CFP)lo 300 Ipd(CFP) Pull-Down Current at CFP V(CFP) = 0.4 V...Vt(CFP)lo V(CFP) > Vt(CFP)hi 30 10 816 tsup Permissible Spurious Pulse Width at CFI No activity triggered 817 ttrig Required Pulse Width at CFI Activity triggered 818 tsup Permissible Spurious Pulse Width at CFP No activity triggered 819 ttrig Required Pulse Width at CFP Activity triggered 14 µs 820 Ipd(CFI)+ llk(QPx) Pull-Down Current at CFI plus leakage current at QPx CFP = lo, V(CFI) = 3 V...VBR, OEN = lo 20 µA LVH = 22 µH, Ri(LVH) < 1.1 Ω, CVH = 1 µF; I(VH) = 0...50 mA 6.4 V 0.4 V 1.2 25 mA -10 10 µA 2 V 0.8 V 500 mV 168 40 µA µA 2.2 µs 7 µs 4.5 µs Switching Regulator VHL, VH 901 VHn Nominal Voltage at VH 7.7 V iC-DI DUAL SENSOR INTERFACE Rev C2, Page 9/15 ELECTRICAL CHARACTERISTICS Operating Conditions: VBO = 9...30 V, VBR = 9...30 V (both referenced to VN), Tj = -40...125 °C, RSET = 8.2 kΩ ±1%, unless otherwise stated Item No. Symbol Parameter Conditions Unit Min. 902 Ia(VHL) max. DC Cut-Off Current from VHL 903 Va(VH) Cut-Off Voltage at VH 904 905 Va()hys Hysteresis at VH Vs(VHL) Saturation Voltage at VHL vs. VBR 906 Vf(VHL) Typ. Max. -200 Va(VH) > VHn mA 6.5 7.3 7.7 V 10 25 150 mV I(VHL) = -50 mA I(VHL) = -150 mA 1.1 3.0 V V Forward Voltage of Fly-Back Diode Vf() = V(GND) − V(VHL); I(VHL) = -50 mA I(VHL) = -150 mA 1.5 2.9 V V VHL = lo, V(VHL) = V(VH) 20 µA 907 Ilk(VHL) Leakage Current at VHL 908 ηVH Efficiency of VH-switching regula- I(VH) = 50 mA, Ri(LVH) < 1.1 Ω, tor V(VBR) = 12...30 V -20 70 % Series Regulator VCC A01 VCCn Nominal Voltage at VCC A02 CVCC Required Capacitor at VCC vs. GND I(VCC) = -50...0 mA, VH = VHn 4.75 5 A03 RiCVCC Maximum Permissible Internal Resisitance of capacitor at VCC A04 VCCon VCC Monitor Threshold hi A05 VCCoff VCC Monitor Threshold lo Decreasing Voltage at VCC A06 VCChys Hysteresis VCChys = VCCon − VCCoff 50 150 3.1 3.3 5.25 150 V nF 1 Ω 90 99 %VCCn 83 95 %VCCn mV Series Regulator VCC3 B01 VCC3n Nominal Voltage at VCC3 B02 CVCC3 Required Capacitor at VCC3 vs. GND B03 RiCVCC3 Maximum Permissible Internal Resisitance of capacitor at VCC3 B04 VCC3on VCC3 Monitor Threshold hi B05 VCC3off VCC3 Monitor Threshold lo B06 VCC3hys Hysteresis Oscillator C01 fos I(VCC3) = -50...0 mA, VH = VHn 3.5 150 V nF 1 Ω 90 98 % VCC3n Decreasing Voltage at VCC3 83 95 % VCC3n VCC3hys = VCC3on − VCC3off 50 150 1.2 1.5 2 Tj = 27 °C Oscillator Frequency mV 2.75 2.3 MHz MHz Reference and Bias D01 V(ISET) Voltage at ISET Tj = 27 °C 1.16 1.22 1.28 V D02 I(ISET) Current in ISET V(ISET) = 0 V, Tj = 27 °C -1.1 -0.65 -0.25 mA D03 rIbeg Transmission Ratio for driver output current limitation Imax(QP1) = Imax(QP2) = Imax(QN1) = Imax(QN2) = I(ISET) ∗ rIbeg, RSET = 5.1...20 kΩ 800 iC-DI DUAL SENSOR INTERFACE Rev C2, Page 10/15 DESCRIPTION OF FUNCTIONS Overload detection To protect the device against excessive power dissipation due to high currents the switches are clocked if an overload occurs. If a short circuit is detected, i.e. if the voltage at the switch output overshoots or undershoots Overload Detection Threshold off (cf. Electrical Characteristics Nos. 104 and 204), the switches are shut down for a typical 50 ms (cf. Electrical Characteristics No. 302) and the current flow thus interrupted. VBR NUVD NOVL OEN tion. This integrator is an 8-bit counter which is updated together with the oscillator clock. If an overload is detected on one channel the counter is raised by 1; an overload on both channels increases the counter value by 2. If no overload is apparent the counter is reduced by 1 every 10 clock pulses. Provided that the time during which excessive current flows does not exceed the value stipulated by Electrical Characteristics No. 301, a maximum duty cycle – without deactivation of the switches – of 1:10 results if one channel is overloaded; if both channels signal an overload this changes to 1:5. Only when these ratios are exceeded can the counter achieve its maximum value, this then generating an error message at NOVL and deactivating the switches. Qyx tuvcl toldly tolcl Figure 1: Permanent short circuit The level of power dissipation is dependent on the current and the time during which this current flows. A current which fails to trigger the overload detection is not critical; high current can also be tolerated for a short period and with low repeat rates. This is particularly important when switching capacitive loads (charge/discharge currents). VBR Configuring the switches The various functions of the switches are determined by pins QCFG1 and QCFG2. A voltage at the QCFG pins which is lower than Va()lo deactivates the relevant high-side switches; with a voltage higher than Va()hi the relevant low-side switches are deactivated. Both high-side and low-side switches are activated in the open-circuit voltage range (pin open). Valo()hys QNx active QPx active Vahi()hys NUVD NOVL OEN INx Valo() Qyx Vahi() V(QCNFx) Off Integrator tuvcl tolcl Figure 2: Overload So that this is possible a shared back-end integrator follows the switches for the purpose of overload detec- Figure 3: Levels at QCFG1/QCFG2 and switch activation Pull-up and pull-down currents The pull-down currents at pins IN1, IN2, INV1 and CFP are two-stage with switching thresholds Vt()hi and Vt()lo (cf. Electrical Characteristics Nos. 604 and 815). iC-DI DUAL SENSOR INTERFACE Rev C2, Page 11/15 Function tables CHANNEL 2 IN2 QCFG2 OEN QN2 QP2 X X L off off L Z H on off H Z H off on L H H off off H H H off on L L H off off H L H on off CHANNEL 1 IN1 QCFG1 INV OEN QN1 QP1 X X X L off off L Z L H on off Z L H off on H L Z H H off on H Z H H on off L H L H off off H H L H off on L H H H off on H H H H off off L L L H off off H L L H on off L L H H on off H L H H off off Table 2: Function table Channel 2 Table 1: Function table Channel 1 Table 3: Function table Feedback Channel FEEDBACK CHANNEL CFI CFP CFO H H Z H L L L H L L L Z iC-DI DUAL SENSOR INTERFACE Rev C2, Page 12/15 APPLICATION NOTES Figure 4 shows recommended protective circuitry against reverse bias and transients on the transmission line; suggested values as follows: CQx: CVB: CVBO: 22 nF 1 µF 100 nF LVH 1uF ..50mA VH RCFI: RQxx: RVB: 50 Ω 5Ω > 20 Ω RSET 22uH VHL ISET VCC VBR VCC3 CVCC3 VCC3 VCC VBR Undervoltage NOVL BIAS NUVD RVB Overtemp. Overload VCC3 VBO CHANN. 1 PRG1 IN1 HS1 UB QP1 RQP1 CVBO Q1 QN1 RQN1 LS1 POL1 DVBO VCC3 CQ1 PRG2 CHANN. 2 CVCC General purpose diode, high reverse voltage Pins GND and VN must not be externally connected, otherwise with reverse bias intolerably high current may flow! DQx, DVBO: High speed diodes (eg. BAS16) CVH DVN: IN2 HS2 DQ1 QP2 RQP2 Q2 QN2 RQN2 LS2 DQ2 VN OEN M DVN VN>VBO GND VBR CFO =1 CFI RCFI VN CFP Figure 4: Recommended external protective circuitry for differential push-pull operation CFI iC-DI DUAL SENSOR INTERFACE Rev C2, Page 13/15 DEMO BOARD iC-DL comes with a demo board for test purposes. Figures 5 and 6 show both the schematic and the component side of the demo board. VH VCC VCC D6 RD R3 1k D5 RD U1 C6 100nF iC-DI 22 VCC C5 100nF 23 VCC3 R2 1k NUVD NUVD 4 PRG1 IN1 3 IN1 INV1 INV1 2 INV1 PRG2 PRG2 5 PRG2 IN2 6 IN2 OEN OEN 7 OEN CFO CFO 10 CFO CFP CFP 11 CFP ISET R4 8.2k GND 1 ISET 20 VHL DCDC CONVERTER TEMP LOAD C3 1uF QP2 13 QN2 14 VN 15 =1 C1 100nF VB BAS16_02L D1 R5 QP1 4.7 QN1 VQ1 R6 C7 22nF 4.7 R7 QP2 4.7 QN2 C8 22nF 4.7 C9 4.7nF CFI_I R9 VQ1 BAS16_02L D2 VQ2 R8 VNI VBR VN CFI 12 VQ2 BAS16_02L D3 CFI CFI 1k BIAS GND 24 VB 22 VBO 18 QN1 16 CHANNEL2 C2 100nF VNI QP1 17 CHANNEL1 R1 VBR VBR 19 UVolt 8 NOVL NOVL PRG1 IN2 VHL 21 VH 9 NUVD NOVL IN1 VHL 22uH VCC3 VCC3 PRG1 L1 VH C4 1uF VNI EPAD GND Figure 5: Schematic of the demo board Figure 6: Demo board (component side) D4 BYS10-45 VN VN iC-DI DUAL SENSOR INTERFACE Rev C2, Page 14/15 This specification is for a newly developed product. iC-Haus therefore reserves the right to change or update, without notice, any information contained herein, design and specification; and to discontinue or limit production or distribution of any product versions. Please contact iC-Haus to ascertain the current data. Copying – even as an excerpt – is only permitted with iC-Haus approval in writing and precise reference to source. iC-Haus does not warrant the accuracy, completeness or timeliness of the specification on this site and does not assume liability for any errors or omissions in the materials. The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of the product. iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. As a general rule our developments, IPs, principle circuitry and range of Integrated Circuits are suitable and specifically designed for appropriate use in technical applications, such as in devices, systems and any kind of technical equipment, in so far as they do not infringe existing patent rights. In principle the range of use is limitless in a technical sense and refers to the products listed in the inventory of goods compiled for the 2008 and following export trade statistics issued annually by the Bureau of Statistics in Wiesbaden, for example, or to any product in the product catalogue published for the 2007 and following exhibitions in Hanover (Hannover-Messe). We understand suitable application of our published designs to be state-of-the-art technology which can no longer be classed as inventive under the stipulations of patent law. Our explicit application notes are to be treated only as mere examples of the many possible and extremely advantageous uses our products can be put to. iC-DI DUAL SENSOR INTERFACE Rev C2, Page 15/15 ORDERING INFORMATION Type Package Order Designation iC-DI QFN24 4 x 4 mm² Evaluation Board iC-DI QFN24 iC-DI EVAL DI1D For technical support, information about prices and terms of delivery please contact: iC-Haus GmbH Am Kuemmerling 18 D-55294 Bodenheim GERMANY Tel.: +49 (61 35) 92 92-0 Fax: +49 (61 35) 92 92-192 Web: http://www.ichaus.com E-Mail: [email protected] Appointed local distributors: http://www.ichaus.de/support_distributors.php