INFINEON ICL8001G

D at as he et, V er s i on 1.0 , M ay 6 , 2 01 0
ICL8001G
Single-Stage Flyback And
PFC Controller For LED
Lighting Appli cations
Industrial & Multimarket
ICL8001G
Revision History:
May 6, 2010
Previous Version:
Preliminary Datasheet Version 1.0
Page
Datasheet
Subjects (major changes since last revision)
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www.infineon.com
CoolMOS®, CoolSET® are trademarks of Infineon Technologies AG.
Edition May 6, 2010
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 5/6/10.
All Rights Reserved.
Attention please!
The information given in this data sheet shall in no event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values
stated herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation warranties of
non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
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ICL8001G
Single-Stage Flyback And PFC Controller
Product Highlight
• Quasi-Resonant Control For Highly Efficient LED Driving Solutions
• Primary Side Flyback Control With Integrated PFC And Phase-Cut
Dimming
• Integrated HV Startup Cell For Short Time To Light
• Best In Class System BOM For Dimmable LED Bulb
ICL8001G
PG-DSO-8
Features
Description
•
•
•
•
The ICL8001G employs quasi-resonant operation
mode optimized for off-line LED lighting, especially
dimmable LED bulbs for incandescent lamp
replacement.
Precise PWM generation enables primary control for
phase cut dimming and high power factor PF>98%.
Significant improved driver efficiency, up to 90%,
compared to other conventional solutions. Tthe
product has a wide operation range (up to 26V) of IC
voltage supply and lower power consumption. Multiple
safety functions ensure a full system protection in
failure situations.
With its full feature set and simple application, the
ICL8001G represents an outstanding choice for quasiresonant flyback LED bulb designs combining feature
set and performance at minimum BOM cost.
•
•
•
•
•
High, stable efficiency over wide operating range
Optimized for trailing- and leading-edge dimmer
Precise PWM for primary PFC and dimming control
Power cell for Vcc pre-charging with constant
current
Built-in digital soft-start
Foldback correction and cycle-by-cycle peak
current limitation
VCC over/ under-voltage lockout
Auto restart mode for short circuit protection
Adjustable latch-off mode for output overvoltage
protection
Application Circuit for Primary control
AC
Snubber
VCC
VR
ZCV
HV
ICL8001G
GD
CS
GND
Type
ICL8001G
Version 1.0
Package
PG-DSO-8
3
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Table of Contents
Page
1
1.1
1.2
1.3
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin Configuration with PG-DSO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Package PG-DSO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2
Representative Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
3
3.1
3.2
3.3
3.3.1
3.3.2
3.3.3
3.4
3.4.1
3.5
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
VCC Pre-Charging and Typical VCC Voltage During Start-up . . . . . . . . . . .7
Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Normal Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Zero crossing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Ringing suppression time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Switch Off Determination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Current Limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Foldback Point Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4
4.1
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
4.3.9
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Current Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Soft Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Foldback Point Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Digital Zero Crossing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Gate Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5
Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Version 1.0
4
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Pin Configuration and Functionality
1
Pin Configuration and
Functionality
1.1
1.3
ZCV (Zero Crossing)
At this pin, the voltage from the auxiliary winding after
a time delay circuit is applied. Internally, this pin is
connected to the zero-crossing detector for switch-on
determination. Additionally, the output overvoltage
detection is realized by comparing the voltage Vzc with
an internal preset threshold.
Pin Configuration with PGDSO-8
Pin
Symbol
Function
VR (Voltage Sense)
The rectified input mains voltage is sensed at this pin.
The signal is used to set the peak current of the peakcurrent control and therefore allow for the PFC and
phase-cut dimming functionality.
1
ZCV
Zero Crossing
2
VR
Voltage Sense
3
CS
Current Sense
4
GD
Gate Drive Output
5
HV
High Voltage Input
6
n.c.
Not connected
7
VCC
Controller Supply Voltage
8
GND
Controller Ground
1.2
CS (Current Sense)
This pin is connected to the shunt resistor for the
primary current sensing, externally, and the PWM
signal generator for switch-off determination (together
with the feedback voltage), internally. Moreover, shortwinding protection is realised by monitoring the voltage
Vcs during on-time of the main power switch.
Package PG-DSO-8
ZCV
VR
CS
GD
Figure 1
Version 1.0
1
2
3
4
Pin Functionality
8
7
6
5
GD (Gate Drive Output)
This output signal drives the external main power
switch, which is a power MOSFET in most case.
GND
HV (High Voltage)
The pin HV is connected to the bus voltage, externally,
and to the power cell, internally. The current through
this pin pre-charges the VCC capacitor with constant
current once the supply bus voltage is applied.
VCC
VCC (Power supply)
VCC pin is the positive supply of the IC. The operating
range is between VVCCoff and VVCCOVP.
NC
GND (Ground)
This is the common ground of the controller.
HV
Pin Configuration PG-DSO-8(top view)
5
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Representative Block Diagram
2
Representative Block Diagram
VCC
Zero Crossing
ZCV
Zero
Current
Detection
Over
Voltage
Protection
HV
Power Managment
Startup Cell
Over / UnderVoltage Lockout
Voltage
Reference
& Biasing
Protection
Restart /
Latchup
Control
OTP
Foldback
Correction
Depl. CoolMOS
GND
Gate Drive
Gate
Control
GD
Leading
Edge
Blanking
CS
Short
Winding
Detection
Current Mode Control
Softstart
VR
Figure 2
Version 1.0
PWM
Comparator
&
PFC/
Dimming
Control
Representative Block Diagram
6
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Functional Description
3
Functional Description
then will reach a constant value depending on output
load.
3.1
VCC Pre-Charging and Typical
VCC Voltage During Start-up
3.2
At the time ton, the IC begins to operate with a soft-start.
By this soft-start the switching stresses for the switch,
diode and transformer are minimised. The soft-start
implemented in ICL8001G is a digital time-based
function. The preset soft-start time is 12ms with 4
steps. If not limited by other functions, the peak voltage
on CS pin will increase step by step from 0.32V to 1V
finally.
In ICL8001G, a high voltage startup cell is integrated.
As shown in Figure 2, the start cell consists of a high
voltage device and a controller, whereby the high
voltage device is controlled by the controller. The
startup cell provides a pre-charging of the VCC
capacitor till VCC voltage reaches the VCC turned-on
threshold VVCCon and the IC begins to operate.
Once the mains input voltage is applied, a rectified
voltage shows across the capacitor Cbus. The high
voltage device provides a current to charge the VCC
capacitor Cvcc. Before the VCC voltage reaches a
certain value, the amplitude of the current through the
high voltage device is only determined by its channel
resistance and can be as high as several mA. After the
VCC voltage is high enough, the controller controls the
high voltage device so that a constant current around
1mA is provided to charge the VCC capacitor further,
until the VCC voltage exceeds the turned-on threshold
VVCCon. As shown as the time phase I in Figure 3, the
VCC voltage increase near linearly and the charging
speed is independent of the mains voltage level.
Vcs_sst
(V)
1.00
0.83
0.66
0.49
0.32
ton
Figure 4
3.3
VVCC
VVCCon
i
ii
Soft-start
iii
3
6
9
12
Time(ms)
Maximum current sense voltage during
softstart
Normal Operation
[1]
The PWM controller during normal operation consists
of a digital signal processing circuit including a
comparator, and an analog circuit including a current
measurement unit and a comparator. The switch-on
and -off time points are each determined by the digital
circuit and the analog circuit, respectively. As input
information for the switch-on determination, the zerocrossing input signal is needed, while the voltages
sense signal at pin VR and the current sensing signal
VCS are necessary for the switch-off determination.
Details about the full operation of the PWM controller in
normal operation are illustrated in the following
paragraphs.
where IVCCcharge2 is the charging current from the
startup cell which is 1.05mA, typically.
Exceeds the VCC voltage the turned-on threshold
VVCCon of at time t1, the startup cell is switched off, and
the IC begins to operate with a soft-start. Due to power
consumption of the IC and the fact that still no energy
from the auxiliary winding to charge the VCC capacitor
before the output voltage is built up, the VCC voltage
drops (Phase II). Once the output voltage is high
enough, the VCC capacitor receives then energy from
the auxiliary winding from the time point t2 on. The VCC
3.3.1
Zero crossing
In the system, the voltage from the auxiliary winding is
applied to the zero-crossing pin through a RC network,
which provides a time delay to the voltage from the
auxiliary winding. Internally, this pin is connected to a
clamping network, a zero-crossing detector, an output
overvoltage detector and a ringing suppression time
controller.
During on-state of the power switch a negative voltage
applies to the ZCV pin. Through the internal clamping
network, the voltage at the pin is clamped to certain
level.
VVCCoff
t1
Figure 3
t2
t
VCC voltage at start up
The time taking for the VCC pre-charging can then be
approximately calculated as:
t
V
⋅C
VCCon vcc
= -----------------------------------------1
I
VCCch arg e2
Version 1.0
7
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Functional Description
and the common ground. The sensed voltage across
the shunt resistor vCS is applied to an internal current
measurement unit, and its output voltage V1 is
compared with the voltage at pin VR. Once the voltage
V1 exceeds the voltage VVR, the output flip-flop is reset.
As a result, the main power switch is switched off. The
relationship between the V1 and the vCS is described
by:
The voltage vZC is also used for the output overvoltage
protection. Once the voltage at this pin is higher than
the threshold VZCOVP during off-time of the main switch,
the IC is latched off after a fixed blanking time.
To achieve the switch-on at voltage valley, the voltage
from the auxiliary winding is fed to a time delay network
(the RC network consists of Dzc, Rzc1, Rzc2 and Czc as
shown in typical application circuit) before it is applied
to the zero-crossing detector through the ZC pin. The
needed time delay to the main oscillation signal ∆t
should be approximately one fourth of the oscillation
period (by transformer primary inductor and drainsource capacitor) minus the propagation delay from
thedetected zero-crossing to the switch-on of the main
switch tdelay, theoretically:
T
osc
∆t = ------------ – t delay
4
V
td
= C
R
⋅R
zc1 zc2
⋅ --------------------------------zc R
zc1 + R zc2
[2]
[3]
3.4
CS
+ 0,7
[4]
Current Limitation
There is a cycle by cycle current limitation realized by
the current limit comparator to provide an overcurrent
detection. The source current of the MOSFET is
sensed via a sense resistor RCS. By means of RCS the
source current is transformed to a sense voltage VCS
which is fed into the pin CS. If the voltage VCS exceeds
an internal voltage limit, adjusted according to the
Mains voltage, the comparator immediately turns off
the gate drive.
To prevent the Current Limitation process from
distortions caused by leading edge spikes, a Leading
Edge Blanking time (tLEB) is integrated in the current
sensing path.
A further comparator is implemented to detect
dangerous current levels (VCSSW) which could occur if
one or more transformer windings are shorted or if the
secondary diode is shorted. To avoid an accidental
latch off, a spike blanking time of tCSSW is integrated in
the output path of the comparator.
3.3.2
Ringing suppression time
After MOSFET is turned off, there will be some
oscillation on VDS, which will also appear on the voltage
on ZC pin. To avoid that the MOSFET is turned on
mistriggerred by such oscillations, a ringing
suppression timer is implemented. The timer is
dependent on the voltage vZC. When the voltage vZC is
lower than the threshold VZCRS, a longer preset time
applies, while a shorter time is set when the voltage vZC
is higher than the threshold.
3.3.2.1
Switch on determination
After the gate drive goes to low, it can not be changed
to high during ring suppression time.
After ring suppression time, the gate drive can be
turned on when the zero crossing is detected.
However, it is also possible that the oscillation between
primary inductor and drain-source capacitor damps
very fast and IC can not detect a zero crossing. In this
case, a maximum off time is implemented. After gate
drive has been remained off for the period of TOffMax, the
gate drive will be turned on again regardless. This
function can effectively prevent the switching
frequency from going lower than 20kHz, otherwise
which will cause audible noise, during start up.
3.4.1
Foldback Point Correction
When the main bus voltage increases, the switch on
time becomes shorter and therefore the operating
frequency is also increased. As a result, for a constant
primary current limit, the maximum possible output
power is increased, which the converter may have not
been designed to support.
To avoid such a situation, the internal foldback point
correction circuit varies the VCS voltage limit according
to the bus voltage. This means the VCS will be
decreased when the bus voltage increases. To keep a
constant maximum input power of the converter, the
3.3.3
Switch Off Determination
In the converter system, the primary current is sensed
by an external shunt resistor, which is connected
between low-side terminal of the main power switch
Version 1.0
= 3,3 ⋅ V
To avoid mistriggering caused by the voltage spike
across the shunt resistor at the turn on of the main
power switch, a leading edge blanking time, tLEB, is
applied to the output of the comparator. In other words,
once the gate drive is turned on, the minimum on time
of the gate drive is the leading edge blanking time.
In addition, there is a maximum on time, tOnMax,
limitation implemented in the IC. Once the gate drive
has been in high state longer than the maximum on
time, it will be turned off to prevent the switching
frequency from going too low because of long on time.
This time delay should be matched by adjusting the
time constant of the RC network which is calculated as:
τ
1
8
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Functional Description
3.5
required maximum VCS versus various input bus
voltage can be calculated, which is shown in Figure 5.
The IC provides full protection functions. The following
table summarizes these protection functions.
Table 1
Protection features
1
Vcs-max(V)
0.9
0.8
0.7
0.6
80
Variation of the VCS limit voltage according
to the IZC current
According to the typical application circuit, when
MOSFET is turned on, a negative voltage proportional
to bus voltage will be coupled to auxiliary winding.
Inside ICL8001G, an internal circuit will clamp the
voltage on ZC pin to nearly 0V. As a result, the current
flowing out from ZC pin can be calculated as
I
V
N
BUS a
= -----------------------ZC
R
N
ZC1 P
VCC Overvoltage
Auto Restart Mode
VCC Undervoltage
Auto Restart Mode
Over temperature
Auto Restart Mode
Output Overvoltage
Latched Off Mode
Short Winding
Latched Off Mode
During operation, the VCC voltage is continuously
monitored. In case of an under- or an over-voltage, the
IC is reset and the main power switch is then kept off.
After the VCC voltage falls below the threshold VVCCoff,
the startup cell is activated. The VCC capacitor is then
charged up. Once the voltage exceeds the threshold
VVCCon, the IC begins to operate with a new soft-start.
During off-time of the power switch, the voltage at the
zero-crossing pin is monitored for output over-voltage
detection. If the voltage is higher than the preset
threshold vZCOVP, the IC is latched off after the preset
blanking time.
If the junction temperature of IC exceeds 140 0C, the IC
enter into autorestart mode.
If the voltage at the current sensing pin is higher than
the preset threshold vCSSW during on-time of the power
switch, the IC is latched off. This is short-winding
protection.
During latch-off protection mode, when the VCC
voltage drops to 10.5V,the startup cell is activated and
the VCC voltage is charged to 18V then the startup cell
is shut down again and repeats the previous procedure.
There is also a maximum on time limitation inside
ICL8001G. Once the gate voltage is high longer than
tOnMAx, it is turned off immediately.
100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400
Vin(V)
Figure 5
Protection Functions
[5]
When this current is higher than IZC_1, the amount of
current exceeding this threshold is used to generate an
offset to decrease the maximum limit on VCS. Since the
ideal curve shown in Figure 5 is a nonlinear one, a
digital block in ICL8001G is implemented to get a better
control of maximum output power. Additional
advantage to use digital circuit is the production
tolerance is smaller compared to analog solutions. The
typical maximum limit on VCS versus the ZC current is
shown in Figure 6.
1
Vcs-max(V)
0.9
0.8
0.7
0.6
300
500
700
900
1100
1300
1500
1700
1900
2100
Iz c(uA)
Figure 6
VCS-max versus IZC
i
Version 1.0
9
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Electrical Characteristics
4
Electrical Characteristics
Note:
All voltages are measured with respect to ground (Pin 8). The voltage levels are valid if other ratings are
not violated.
4.1
Note:
Absolute Maximum Ratings
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction
of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 7
(VCC) is discharged before assembling the application circuit.
Parameter
Symbol
Limit Values
min.
max.
Unit
Remarks
HV Voltage
VHV
-
500
V
VCC Supply Voltage
VVCC
-0.3
27
V
FB Voltage
VFB
-0.3
5.0
V
ZCV Voltage
VZC
-0.3
5.0
V
CS Voltage
VCS
-0.3
5.0
V
GD Voltage
VOUT
-0.3
27
V
Maximum current out from ZC pin
IZCMAX
3
-
mA
Junction Temperature
Tj
-40
125
°C
Storage Temperature
TS
-55
150
°C
Thermal Resistance
Junction -Ambient
RthJA
-
185
K/W
PG-DSO-8
ESD Capability (incl. Drain Pin)
VESD
-
2
kV
Human body model1)
1)
According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kΩ series resistor)
4.2
Note:
Operating Range
Within the operating range the IC operates as described in the functional description.
Parameter
Symbol
Limit Values
min.
max.
Unit
VCC Supply Voltage
VVCC
VVCCoff
VVCCOVP V
Junction Temperature of
Controller
TjCon
-25
125
Version 1.0
10
Remarks
°C
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Electrical Characteristics
4.3
4.3.1
Note:
Characteristics
Supply Section
The electrical characteristics involve the spread of values within the specified supply voltage and junction
temperature range TJ from – 25 °C to 125 °C. Typical values represent the median values, which are
related to 25°C. If not otherwise stated, a supply voltage of VCC = 18 V is assumed.
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Test Condition
Start Up Current
IVCCstart
-
300
550
µA
VVCC =VVCCon -0.2V
VCC Charge Current
IVCCcharge1
-
5.0
-
mA
VVCC = 0V
IVCCcharge2
0.8
-
-
mA
VVCC = 1V
IVCCcharge3
-
1.0
-
mA
VVCC =VVCCon -0.2V
Maximum Input Current of
Startup Cell and CoolMOS®
IDrainIn
-
-
2
mA
VVCC =VVCCon -0.2V
Leakage Current of
Startup Cell
IStartLeak
-
0.2
50
µA
VHV= 610V
at Tj=100°C
Supply Current in normal
operation
IVCCNM
-
1.5
2.3
mA
output low
Supply Current in
Auto Restart Mode with Inactive
Gate
IVCCAR
-
300
-
µA
IFB = 0A
Supply Current in Latch-off Mode
IVCClatch
-
300
-
µA
Supply Current in Burst Mode with
inactive Gate
IVCCburst
-
500
950
µA
VCC Turn-On Threshold
VVCCon
17.0
18.0
19.0
V
VCC Turn-Off Threshold
VVCCoff
9.8
10.5
11.2
V
VCC Turn-On/Off Hysteresis
VVCChys
-
7.5
-
V
4.3.2
VFB = 2.5V, exclude the
current flowing out from
FB pin
Internal Voltage Reference
Parameter
Internal Reference Voltage
Version 1.0
Symbol
VREF
Limit Values
min.
typ.
max.
4.80
5.00
5.20
11
Unit
Test Condition
V
Measured at pin FB
IFB=0
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Electrical Characteristics
4.3.3
PWM Section
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Feedback Pull-Up Resistor
RFB
14
23
33
kΩ
PWM-OP Gain
GPWM
3.25
3.3
3.35
-
Offset for Voltage Ramp
VPWM
0.63
0.7
0.77
V
Maximum on time in normal
operation
tOnMax
22
30
41
µs
4.3.4
Current Sense
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
Peak current limitation in normal
operation
VCSth
0.97
1.03
1.09
V
Leading Edge Blanking time
tLEB
200
330
460
ns
4.3.5
Test Condition
Soft Start
Parameter
Symbol
Limit Values
Unit
min.
typ.
max.
8.5
12
-
ms
Soft-Start time
tSS
soft-start time step
tSS_S1)
-
3
-
ms
1)
-
1.76
-
V
-
0.56
-
V
Internal regulation voltage at
first step
VSS1
Internal regulation voltage step
at soft start
VSS_S1)
1)
Test Condition
Test Condition
The parameter is not subjected to production test - verified by design/characterization
4.3.6
Foldback Point Correction
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
ZCV current first step threshold
IZC_FS
0.35
0.5
0.621
mA
ZCV current last step threshold
IZC_LS
1.3
1.7
2.2
mA
CS threshold minimum
VCSMF
-
0.66
-
V
Version 1.0
12
Test Condition
Izc=2.2mA, VFB=3.8V
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Electrical Characteristics
4.3.7
Digital Zero Crossing
Parameter
Symbol
Limit Values
Unit
Test Condition
min.
typ.
max.
Zero crossing threshold voltage VZCCT
50
100
170
mV
Ringing suppression threshold
VZCRS
-
0.7
-
V
Minimum ringing suppression
time
tZCRS1
1.62
2.5
4.5
µs
VZC > VZCRS
Maximum ringing suppression
time
tZCRS2
-
25
-
µs
VZC < VZCRS
ZCV current for IC switch
threshold to high line
IZCSH
-
1.3
-
mA
ZCV current for IC switch
threshold to low line
IZCSL
-
0.8
-
mA
Maximum restart time in normal
operation
tOffMax
30
42
57.5
µs
4.3.8
Protection
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit
VCC overvoltage threshold
VVCCOVP
24.0
25.0
26.0
V
Output Overvoltage detection
threshold at the ZCV pin
VZCOVP
3.55
3.7
3.84
V
Blanking time for Output
Overvoltage protection
tZCOVP
Threshold for short winding
protection
VCSSW
1.63
1.68
1.78
V
Blanking time for short-windding
protection
tCSSW
-
190
-
ns
Over temperature protection1)
TjCon
-
140
-
°C
Note:
Test Condition
µs
100
The trend of all the voltage levels in the Control Unit is the same regarding the deviation except VVCCOVP
Version 1.0
13
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Electrical Characteristics
4.3.9
Gate Drive
Parameter
Symbol
Limit Values
min.
Output voltage at logic low
VGATElow
Output voltage at logic high
VGATEhigh
9.0
Unit
Test Condition
V
VVCC=18V
IOUT = 10mA
V
VVCC=18V
IOUT = -10mA
1.0
V
V
VVCC = 7V
IOUT = 10mA
typ.
max.
-
1.0
10.0
Output voltage active shut down VGATEasd
Rise Time
trise
-
117
-
ns
COUT = 1.0nF
VGATE= 2V ... 8V
Fall Time
tfall
-
27
-
ns
COUT = 1.0nF
VGATE= 8V ... 2V
Version 1.0
14
May 6, 2010
Single-Stage Flyback and PFC Controller
ICL8001G
Outline Dimension
5
Outline Dimension
PG-DSO-8
(Leadfree Plastic Dual Small Outline)
1.27
0.1
0.41 +0.1
-0.05
+0.05
-0.01
0.2
C
0.2 M A C x8
8
5
Index
Marking 1
4
5 -0.21)
8˚ MAX.
4 -0.21)
1.75 MAX.
0.1 MIN.
(1.5)
0.33 ±0.08 x 45˚
0.64 ±0.25
6 ±0.2
A
Index Marking (Chamfer)
1)
Figure 7
Does not include plastic or metal protrusion of 0.15 max. per side
PG-DSO-8 (Pb-free lead plating Plastic Dual Small Outline)
Dimensions in mm
Version 1.0
15
May 6, 2010
Total Quality Management
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