PD - 9.1496A
IRLI520N
PRELIMINARY
HEXFET® Power MOSFET
Logic-Level Gate Drive
Advanced Process Technology
l Isolated Package
l High Voltage Isolation = 2.5KVRMS
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
Description
l
D
l
VDSS = 100V
RDS(on) = 0.18Ω
G
ID =8.1A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
Max.
Units
8.1
5.7
35
30
0.20
± 16
85
6.0
3.0
5.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
5.0
65
°C/W
3/16/98
IRLI520N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
100
–––
–––
–––
–––
1.0
3.1
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Drain to Sink Capacitance
–––
–––
–––
–––
V(BR)DSS
IGSS
Typ.
–––
0.11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
40
35
23
22
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.18
VGS = 10V, ID = 6.0A
0.22
Ω
VGS = 5.0V, ID = 6.0A
0.26
VGS = 4.0V, ID = 5.0A
2.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 6.0A
25
VDS = 100V, VGS = 0V
µA
250
VDS = 80V, VGS = 0V, TJ = 150°C
100
VGS = 16V
nA
-100
VGS = -16V
20
ID = 6.0A
4.6
nC VDS = 80V
10
VGS = 5.0V, See Fig. 6 and 13
–––
VDD = 50V
–––
ID = 6.0A
ns
–––
RG = 11Ω, VGS = 5.0V
–––
RD = 8.2Ω, See Fig. 10
Between lead,
4.5 –––
6mm (0.25in.)
nH
G
from package
7.5 –––
and center of die contact
440 –––
VGS = 0V
97 –––
VDS = 25V
pF
50 –––
ƒ = 1.0MHz, See Fig. 5
12 –––
ƒ = 1.0MHz
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 4.7mH
RG = 25Ω, IAS = 6.0A. (See Figure 12)
ISD ≤ 6.0A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 8.1
showing the
A
G
integral reverse
––– –––
35
p-n junction diode.
S
––– ––– 1.3
V
TJ = 25°C, IS = 6.0A, VGS = 0V
––– 110 160
ns
TJ = 25°C, IF = 6.0A
––– 410 620
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
t=60s, ƒ=60Hz
Uses IRL520N data and test conditions
D
S