PD - 9.1498A
IRLIZ44N
HEXFET® Power MOSFET
Logic-Level Gate Drive
Advanced Process Technology
l Isolated Package
l High Voltage Isolation = 2.5KVRMS
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
Description
l
D
l
VDSS = 55V
RDS(on) = 0.022Ω
G
ID = 30A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
Max.
Units
30
22
160
45
0.3
± 16
210
25
4.5
5.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
3.3
65
°C/W
8/25/97
IRLIZ44N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
55
–––
–––
–––
–––
1.0
21
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Drain to Sink Capacitance
–––
–––
–––
–––
V(BR)DSS
IGSS
Typ.
–––
0.070
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
11
84
26
15
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.022
VGS = 10V, ID = 17A
0.025
Ω
VGS = 5.0V, ID = 17A
0.035
VGS = 4.0V, ID = 14A
2.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 25A
25
VDS = 55V, VGS = 0V
µA
250
VDS = 44V, VGS = 0V, T J = 150°C
100
VGS = 16V
nA
-100
VGS = -16V
48
ID = 25A
8.6
nC VDS = 44V
25
VGS = 5.0V, See Fig. 6 and 13
–––
VDD = 28V
–––
ID = 25A
ns
–––
RG = 3.4Ω, VGS = 5.0V
–––
RD = 1.1Ω, See Fig. 10
Between lead,
4.5 –––
6mm (0.25in.)
nH
G
from package
7.5 –––
and center of die contact
1700 –––
VGS = 0V
400 –––
VDS = 25V
pF
150 –––
ƒ = 1.0MHz, See Fig. 5
12 –––
ƒ = 1.0MHz
Source-Drain Ratings and Characteristics
IS
ISM
VSD
t rr
Q rr
t on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 15V, starting TJ = 25°C, L = 470µH
RG = 25Ω, IAS = 25A. (See Figure 12)
I SD ≤ 25A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS ,
TJ ≤ 175°C
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
30
––– –––
showing the
A
G
integral reverse
––– ––– 160
p-n junction diode.
S
––– ––– 1.3
V
TJ = 25°C, IS = 17A, VGS = 0V
––– 80 120
ns
TJ = 25°C, IF = 25A
––– 210 320
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
t=60s, ƒ=60Hz
Uses IRLZ44N data and test conditions
D
S
IRLIZ44N
1000
1000
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTT OM 2.5V
TOP
ID , D ra in -to -S o u rce C u rre n t (A )
ID , D ra in -to -S o u rc e C u rre n t (A )
TOP
100
10
2.5 V
2 0µ s PU L SE W ID TH
T J = 2 5°C
1
0.1
1
10
A
100
10
2 .5V
20 µ s PU LSE W ID TH
T J = 1 75°C
1
100
0.1
V D S , Drain-to-S ource Voltage (V )
3.0
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce
(N o rm a li ze d )
I D , D r ain- to-S ourc e C urre nt (A )
T J = 2 5 °C
100
TJ = 1 7 5 ° C
10
V DS = 2 5 V
2 0 µ s P U L S E W ID T H
3.0
4.0
5.0
6.0
7.0
8.0
V G S , Ga te-to-S o urce V oltage (V )
Fig 3. Typical Transfer Characteristics
A
100
Fig 2. Typical Output Characteristics
1000
2.0
10
V D S , Drain-to-Source V oltage (V )
Fig 1. Typical Output Characteristics
1
1
9.0
A
I D = 41 A
2.5
2.0
1.5
1.0
0.5
V G S = 10 V
0.0
-60 -40 -20
0
20
40
60
80
A
100 120 140 160 180
T J , Junction T emperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRLIZ44N
2400
C , C a p a c ita n c e (p F )
C is s
V GS
C iss
C rss
C oss
=
=
=
=
15
0V,
f = 1 MH z
C gs + C gd , C ds SH O R TED
C gd
C ds + C gd
V G S , G a te -to -S o u rce V o lta g e (V )
2800
2000
1600
C o ss
1200
800
C rss
400
0
10
V D S = 44 V
V D S = 28 V
12
9
6
3
FO R TEST CIR CU IT
SEE FIG UR E 13
0
A
1
I D = 25A
0
100
V D S , Drain-to-Source V oltage (V)
20
30
40
50
60
A
70
Q G , T otal Gate C harge (nC )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPE R ATIO N IN TH IS A RE A LIMITE D
BY R D S(o n)
I D , D ra in C u rre n t (A )
I S D , R e v e rse D ra in C u rre n t (A )
10
100
TJ = 17 5°C
100
10µs
100µ s
10
1m s
T J = 25 °C
VG S = 0 V
10
0.4
0.8
1.2
1.6
2.0
V S D , S ource-to-Drain Voltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
2.4
10m s
T C = 25 °C
T J = 17 5°C
S ing le Pulse
1
1
A
10
V D S , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
100
IRLIZ44N
35
RD
VDS
I D , Drain Current (A)
30
VGS
D.U.T.
RG
25
+
- VDD
20
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15
Fig 10a. Switching Time Test Circuit
10
VDS
5
90%
0
25
50
75
100
125
TC , Case Temperature
150
175
( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
(Z thJC )
10
D = 0.50
1
Thermal Response
0.20
0.10
0.05
P DM
0.1
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + T C
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
10
IRLIZ44N
D.U.T.
RG
+
V
- DD
IAS
5.0 V
tp
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
E A S , S in g le P u ls e A va la n c h e E n e rg y (m J)
500
L
VDS
TO P
BO TTOM
400
ID
1 0A
17A
25 A
300
200
100
0
V D D = 2 5V
25
50
A
75
100
125
150
Starting TJ , Junction T emperature (°C)
tp
VDD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
VDS
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
5.0 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
175
IRLIZ44N
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
Driver Gate Drive
Period
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D=
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRLIZ44N
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417 )
10.40 (.409 )
ø
3 .40 (.1 33)
3 .10 (.1 23)
4.80 (.189 )
4.60 (.181 )
-A3.7 0 (.145)
3.2 0 (.126)
16 .0 0 (.630)
15 .8 0 (.622)
2.80 (.110)
2.60 (.102)
L EA D AS SIGN M EN T S
1 - GA T E
2 - D R AIN
3 - SO U R C E
7.10 (.280 )
6.70 (.263 )
1.15 (.045)
M IN .
NO T ES :
1 D IM E N SION IN G & T O LER AN C IN G
PE R A N SI Y1 4.5M , 1982
1
2
3
2 C O N T R OLL IN G D IM EN SION : IN C H .
3.30 (.130)
3.10 (.122)
-B -
13 .7 0 (.540)
13 .5 0 (.530)
C
A
1.40 (.05 5)
3X
1.05 (.04 2)
0.90 (.035 )
3X 0.70 (.028 )
0.25 (.010)
3X
M
A M
0.48 (.019 )
0.44 (.017 )
2.85 (.1 12)
2.65 (.1 04)
B
2 .5 4 (.100)
2X
D
B
M IN IM U M C R E EP AG E
D IST A N C E B ET W E EN
A -B -C -D = 4.80 (.189 )
Part Marking Information
TO-220 Fullpak
E X AM
PLE PLE
: T HI
IS AISN AIRF
1010
E XAM
: S
T HIS
N IRF
I840G
W ITW
H ITH
A S SAS
E MB
SE LY
MBLY
CODE
E401
LO TLOT
CO DE
9B 1M
A
IN TE R NA T ION A L
INT ER NAT IONA L
R EC T IF IER
IRIRF
F 1010
RE CTIF IER
I840G
LO GO
9246
LOGO
A SAS
S EM
B LY
SE MBLY
LOLOT
T CO
DE E
COD
9BE 401 1M
9 24 5
P A RT NU M BE R
A
PA RT NU MBE R
D A TE C OD E
(YDYW
ATEW )CODE
W )A R
Y(YYW
Y = YE
YY
=
AR
W W = YE
WE
EK
W W = W E EK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
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IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
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IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/97