ISSI IS32WV204816B ® 2M x 16 (32-Mbit) PSEUDO STATIC RAM MAY 2004 FEATURES DESCRIPTION • Access time: 70ns The ISSI IS32WV204816B is a high-performance CMOS Pseudo Static RAM, organized as 2Meg x 16 bits. • TTL compatible inputs and outputs; tri-state I/O • Wide Power supply voltage: 2.2V to 3.6V • CMOS Standby: 70µA (32-Mbit) • Deep Power Down Standby: 5µA (32-Mbit) • Deep Power-Down Mode: Data Invalid • Page Operation Mode: Four Word Access • Logic compatible with SRAM R/W (WE) pin. ISSI CMOS technology provides high density, high speed low power devices that features SRAM-like write timing. Data is written to memory cells on the rising edge of the WE signal. With a page size of 4 words, the device has a page access operation. The device also supports deep powerdown mode providing low-power standby. The IS32WV204816B is packaged in a 48-pin mini-BGA (6mm x 8mm). • Industrial Temperature Range: -40oC to 85oC FUNCTIONAL BLOCK DIAGRAM A0-A1 A2-A20 DECODER 2Mb x 16 MEMORY ARRAY VDD GND I/O DATA CIRCUIT I/O0-I/O15 UB LB CS1 CS2 WE OE COLUMN I/O CONTROL CIRCUIT Copyright © 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 1 ISSI IS32WV204816B ® PIN CONFIGURATIONS 48-pin mini-BGA (B) (6mm x 8mm) 48-pin mini-BGA (M) (6mm x 8mm) 1 2 3 4 5 6 A LB OE A0 A1 A2 CS2 B I/O8 UB A3 A4 CS1 I/O0 C I/O9 I/O10 A5 A6 I/O1 I/O2 A15 D GND I/O11 A17 A7 I/O3 VDD` I/O7 A16 E VDD I/O12 NC A16 I/O4 GND I/O12 I/O14 NC F I/O14 I/O13 A14 A15 I/O5 I/O6 I/O11 VDD I/O13 I/O15 G I/O15 A19 A12 A13 WE I/O7 I/O3 I/O4 I/O6 GND H A18 A8 A9 A10 A11 A20 1 2 3 4 5 6 A A4 A17 UB CS2 A8 A12 B A3 A7 LB WE A9 A13 C A2 A6 A18 A20 A10 A14 D A1 A5 NC A19 A11 E A0 I/O0 I/O2 I/O5 F CS1 I/O8 I/O10 G OE I/O9 H GND I/O1 PIN DESCRIPTIONS A0-A20 Address Inputs A0-A1 Page Address Inputs I/O0 to I/O15 Data Input/Outputs 2 WE Write Enable OE Output Enable CS1 Chip Enable Input CS2 Chip Select Input LB, UB Lower & Upper Data Byte Control Input VDD Power GND Ground NC No Connection Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 ISSI IS32WV204816B ® TRUTH TABLE Function CS1 CS2 OE WE LB UB ADD I/O0 to I/O7 I/O8 to I/O15 Power Read: Word L H L H L L XX I/OOUT I/OOUT ICC1 Read: Lower Byte L H L H L H XX I/OOUT HIGH-Z ICC1 Read: Upper Byte L H L H H L XX HIGH-Z I/OOUT ICC1 Write: Word L H X L L L XX DIN DIN ICC1 Write: Lower L H X L L H XX DIN INVALID ICC1 Write: Upper L H X L H L XX INVALID DIN ICC1 Outputs Disabled L H H H X X XX HIGH-Z HIGH-Z I SB Standby H H X X X X X HIGH-Z HIGH-Z I SB Deep Power-Down Standby H L X X X X X HIGH-Z HIGH-Z ISB3 L = VIL, H =VIH, X = VIL or VIH, High-Z = High-impedance. XX = At CS1 falling edge, all addresses (A2 to A20) are valid "IN". Page address signals (A0 and A1) must be VIH or VIL, during entire cycle. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 3 ISSI IS32WV204816B ® ABSOLUTE MAXIMUM RATINGS(1) Symbol VT VDD IOUT PD TSTG Parameters Voltage on Any Pin Relative to GND Supply Voltage Output Current Power Dissipation Storage Temperature Rating –0.2 to VDD+3.6 –0.2 to VDD+3.6 50 0.6 –55 to +150 Unit V V mA W °C Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. CAPACITANCE(1,2) Symbol Parameter CIN1 CIN2 CIO Input Capacitance: A0-A20 Input Capacitance: CS1, CS2, OE, WE, LB, UB Data Input/Output Capacitance: I/O0-I/O15 Max. Unit 10 10 10 pF pF pF Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25°C, f = 1 MHz. 4 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 ISSI IS32WV204816B ® RECOMMENDED OPERATING CONDITIONS (Voltages are referenced to GND.) Symbol VDD VIH VIL VDH Parameter Supply Voltage Input High Voltage Input Low Voltage Data Retention Supply Voltage Min. 2.2 2.0 –0.2 2.0 Typ. — — — Max. 3.6 VDD + 03 0.4 3.0 Unit V V V V ELECTRICAL CHARACTERISTICS(1) (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter IIL Input Leakage Current IIO Output Leakage Current VOH VOL ICC1 Output High Voltage Level Output Low Voltage Level Operating Current ICC2 Page Access Operating Current Standby Current: TTL Standby Current: CMOS Standby Current: Deep Power-down ISB1 ISB2 ISB3 Test Condition Any input 0V ≤ VIN ≤ VDD Other inputs not under test = 0V Output is disabled (Hi-Z) 0V ≤ VOUT ≤ VDD IOH = –0.5 mA IOL = 1.0 mA CS1 =VIH, IOUT = 0mA CS1 Cycling, tRC = tRC (min.) CS1=VIL, CS2=VIH, IOUT = 0mA Page Add. Cycling, tPC (min.) CS1=VIH, CS2=VIH CS1=Vss-0.2V, CS2=VDD-0.2V CS1=0.2V Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 Min. –1.0 Max. 1.0 Unit µA –1.0 1.0 µA 1.9 — — — 0.2 30 V V mA — 25 mA — — — 1 70 5 mA µA µA 5 ISSI IS32WV204816B ® AC CHARACTERISTICS (Recommended Operating Conditions unless otherwise noted.) 6 Symbol Parameter tRC tCE tP tCEA tOEA tOEP tBEA tAPH tASC tAHC tASO, tASW tAHO, tAHW tWHC tRCS tWOS tRCH tWP tWCH tCWL tWBH tBWL tWR tDSW tDSC tDSB tDHW tDHC tDHB Random Read or Write Cycle Time CS1 Pulse Width Pre-charge Time CS1 Access Time OE Access Time OE Pulse Width LB,UB Access Time Address (A0 and A1) Hold Time Address Setup Time Address Hold Time Address Setup Time Address Hold Time WE Hold Time Read Command Setup Time Write Command Setup Time Read Command Hold Time WE Pulse Width CS1 to End of Write Write Command to CS1 Lead Time LB,UB to End of Write Write Command to LB, UB Lead time Write Recovery Time Data Set-up Time from WE Data Set-up Time from CS1 Data Set-up Time from LB, UB Data Hold Time from WE Data Hold Time from CS1 Data Hold Time from LB, UB Min. Max. Units 85 70 15 — — 70 — 70 -10 65 -10 30 8 8 18 8 70 70 70 45 70 0 25 25 25 0 0 0 — 10K — 70 70 — 25 — — — — — — — — — — — — — — — — — — — — — Continued ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 ISSI IS32WV204816B ® AC CHARACTERISTICS Continued (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter Min. Max. Units tCLZ tOLZ tBLZ tWLZ tCHZ tOHZ tBHZ tWHZ tPC tAA tAOH tCS tCH tDPD CS1 Low to Output Active OE Low to Output Active LB, UB Low to Output Active WE Low to Output Active CS1 High to Output High-Z OE High to Output High-Z LB, UB High to Output High-Z OE High to Output High-Z Page Mode Cycle Time Page Mode Address Access Time Page Mode Output Data Hold Time CS1 Set-up Time CS1 Hold Time CS1 Pulse Width (Deep Power Down) 10 0 0 0 — — — — 25 — 5(1) 0 200 10 — — — — 20 20 20 20 — 25 — — — — ns ns ns ns ns ns ns ns ns ns ns ns µs ms AC Notes: 1. Guarantee minimum 10ns of data valid time under any specific operating condition. 2. After power-up, an initial pause of 200 us with CS2 high is required with the output open condition. 3. Parameters tCHZ, tOHZ, tBHZ and TWHZ define the time at which the output goes the into the open condition and are not output voltage reference levels. 4. During write cycles, input data is latched on the earliest of WE, LB/UB, or CS1 rising edge. Therefore, input data must be valid during the set-up time (tDSC, tDSB or tDSW) and hold time (tDHC, tDHB or tDHW). 5. Address (A2 to A20) inputs are latched on the falling edge of OE or WE. Address (A2 to A20) input must be valid during the set-up time (tASO or tASW) and hold time (tAHO or tAHW). 6. Data can not be retained at deep power-down stand-by mode. 7. If OE is high during the write cycle, the outputs will remain at high impedance. 8. During the output state of I/O signals, input signals of reverse polarity must not be applied. 9. trising = tfalling = 5ns for inputs. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 7 ISSI IS32WV204816B ® AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Time Input and Output Timing and Reference Level Output Load Unit VDD-0.2V to VDD+0.2V 5 ns VREF See Figures 1 and 2 (1) Note 1. All AC test to output Load Figure 1, except High-Z use output load Figure 2. 2.2V to 3.6V R1(Ω) 3070 R2(Ω) 3150 VREF 1.5V VTM 2.8V AC TEST LOADS R1 R1 VTM 1.8V OUTPUT OUTPUT 30 pF Including jig and scope Figure 1 8 R2 5 pF Including jig and scope R2 Figure 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 ISSI IS32WV204816B ® AC WAVEFORMS Read Timing tRC tCE tP CS1 tCH CS2 tASC tAPH A0~A1 tAHC A2~A20 tASO tP tAHO OE tRCH tRCS WE tOEP LB,UB tOEA tBEA tOLZ tCHZ tBHZ tOHZ tBLZ I/O tCLZ tCEA For shaded areas either OE or CS1 = High. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 9 ISSI IS32WV204816B ® AC WAVEFORMS Page Read timing (four word access) tRC tP tCE CS1 tCH CS2 tASC tAHC tPC tPC tPC A0~A1 tAPH A2~A20 tP tASO tAHO OE tRCS tRCH WE LB,UB tOEA tBEA tOLZ tAOH tBLZ I/O Dout tAOH Dout tAOH Dout tCHZ Dout tCLZ tCEA tAA tAA tAA For shaded areas either OE or CS1 = High. 10 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 ISSI IS32WV204816B ® AC WAVEFORMS WE Control Write) Write Timing (WE tRC tCE tP CS1 tCH CS2 tWR tASC tAPH A0~A1 tASW tAHW A2~A20 OE tWCH WE tP tCWL tWHC tWP LB, UB tWBH tDSW Din Dout Data Input Valid High Impedance Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 tDHW 11 ISSI IS32WV204816B ® AC Wave Forms LB UB Control Write) Write Timing (LB LB/UB tRC tP tCE CS1 tCH CS2 tWR tASC tAPH A0~A1 tASW tAHW A2~A20 tWCH WE tWHC tP tCWL tWP tBWL LB, UB tWBH tDSB Din Dout 12 tDHB Data Input Valid High Impedance Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 ISSI IS32WV204816B ® AC Wave Forms CS1 Control Write) Write Timing (CS1 tRC tP tCE CS1 tCH CS2 tAHC tWR tASC tAPH A0~A1 tASW tAHW A2~A20 tCWL tWHC WE tBWL LB, UB tDSC Din tDHC Data Input Valid tCLZ tWHZ Dout High Impedance OE = High. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 13 ISSI IS32WV204816B ® Deep Power-Down Timing CS1 tDPD CS2 tCS tCH Note: During deep power-down stand-by mode, data can not be retained. Prohibition Timing (Timing shown is prohibited.) CS1 CS2 OE WE Note: A malfunction may occur, since devices go into test modes for internal use, if both OE and WE go Low coincident with or before falling edge of CS1. 14 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 ISSI IS32WV204816B ® ORDERING INFORMATION Industrial Range: –40°C to +85°C Speed (ns) 70 Order Part No. Package IS32WV204816B-70MI IS32WV204816B-70BI Mini BGA (6mm x 8mm) (0.8 mm Pitch) Mini BGA (6mm x 8mm) (0.75 mm Pitch) Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 04/29/04 15 ISSI ® PACKAGING INFORMATION Mini Ball Grid Array Package Code: B (48-pin) Top View Bottom View φ b (48x) 1 2 3 4 5 6 6 A 4 3 2 1 A e B B C C D D D 5 D1 E E F F G G H H e E E1 A2 Notes: 1. Controlling dimensions are in millimeters. A A1 SEATING PLANE mBGA - 6mm x 8mm mBGA - 8mm x 10mm MILLIMETERS INCHES MILLIMETER Sym. Min. Typ. Max. Min. Typ. Max. N0. Leads 48 Sym. Min. Typ. Max. N0. Leads 48 INCHES Min. Typ. Max. A — — 1.20 — — 0.047 A — — 1.20 — — 0.047 A1 0.24 — 0.30 0.009 — 0.012 A1 0.24 — 0.30 0.009 — 0.012 A2 0.60 — — 0.024 — — A2 0.60 — — 0.024 — — D 7.90 — 8.10 0.311 — 0.319 D 9.90 — 10.10 0.390 — 0.398 D1 E 5.25 BSC 5.90 — 6.10 0.207 BSC 0.232 — 0.240 D1 E 5.25 BSC 7.90 — 0.207 BSC 8.10 0.311 — 0.319 E1 3.75 BSC 0.148 BSC E1 3.75 BSC 0.148 BSC e 0.75 BSC 0.030 BSC e 0.75 BSC 0.030 BSC 0.012 0.014 0.016 b b 0.30 0.35 0.40 0.30 0.35 0.40 0.012 0.014 0.016 Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 01/15/03 ISSI PACKAGING INFORMATION ® Mini Ball Grid Array Package Code: M (48-pin) Top View Bottom View φ b (48x) 1 2 3 4 5 6 6 A D 5 4 3 2 1 A e B B C C D D D1 E E F F G G H H e E E1 A2 A SEATING PLANE Notes: 1. Controlling dimensions are in millimeters. A1 Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 01/15/03 ISSI PACKAGING INFORMATION ® Mini Ball Grid Array Package Code: M (48-pin) mBGA - 6mm x 8mm MILLIMETERS INCHES Sym. Min. Typ. Max. Min. Typ. Max. N0. Leads 48 A — — 1.20 .— — 0.047 A1 0.25 — 0.40 0.010 — 0.016 A2 0.60 — — 0.024 — D 7.90 8.00 8.10 0.311 0.314 0.319 5.60BSC 0.220BSC E 5.90 6.00 6.10 0.232 0.236 0.240 E1 4.00BSC 0.157BSC e 0.80BSC 0.031BSC D1 b 0.40 0.45 0.50 — 0.016 0.018 0.020 mBGA - 7.2mm x 8.7mm mBGA - 9mm x 11mm MILLIMETERS INCHES Sym. Min. Typ. Max. Min. Typ. Max. N0. Leads 48 MILLIMETERS INCHES Sym. Min. Typ. Max. Min. Typ. Max. N0. Leads 48 A — — 1.20 — — 0.047 A A1 0 .24 — 0.30 0.009 — 0.012 A1 A2 0.60 — — 0.024 — — A2 D 8.60 8.70 8.80 D 10.90 11.00 11.10 0.429 0.433 0.437 5.25BSC 0.207BSC D1 0.339 0.343 0.346 — — 1.20 — — 0.047 0.24 — 0.30 0.60 — — 0.009 — 0.012 0.024 — — 5.25BSC 0.207BSC E 7.10 7.20 7.30 0.280 0.283 0.287 E E1 3.75BSC 0.148BSC E1 3.75BSC 0.148BSC e 0.75BSC 0.030BSC e 0.75BSC 0.030BSC 0.012 0.014 0.016 b b 2 0.30 0.35 0.40 D1 8.90 0.30 9.00 0.35 9.10 0.40 0.350 0.354 0.358 0.012 0.014 0.016 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 01/15/03