www.fairchildsemi.com FAN8037 (KA3037) 7-CH Motor Driver Features Description • • • • • • • • The FAN8037 is a monolithic integrated circuit suitable for a 7-ch motor driver which drives the tracking actuator, focus actuator, sled motor, tray motor, changer motor, panel motor and, spindle motor of the CDP/CAR-CD systems. 4-CH balanced transformerless (BTL) driver 3-CH (forward - reverse) control DC motor driver Operating supply voltage (4.5 V ~ 13.2 V) Built-in thermal shut down circuit (TSD) Built-in all channel mute circuit Built-in power save mode circuit Built-in stand by mode circuit Built-in variable regulator 48-QFPH-1414 Target Application • • • • Ordering Information Compact disk player (Tray, Changer) Video compact disk player (Tray, Changer) Car compact disk player (Tray, Changer) Mixing with compact disk player and mini disk player (Tray, Changer, Panel) Device Package Operating Temp. FAN8037 48-QFPH-1414 −35°C ~ +85°C Rev. .1.0.2 May. 2000. ©2000 Fairchild Semiconductor International 1 FAN8037 (KA3037) REGOX PVCC1 DO1+ DO1− DO2+ 45 REGX 46 RESX IN1.1 47 VREF IN1.2 48 SVCC OUT1 Pin Assignments 44 43 42 41 40 39 38 37 IN2.1 1 36 DO2− IN2.2 2 35 PGND1 OUT2 3 34 DO3+ IN3.1 4 33 DO3− IN3.2 5 32 DO4+ OUT3 6 31 DO4− FAN8037 CTL1 10 27 DO6+ FWD1 11 26 DO6− REV1 12 25 DO7+ 13 14 15 16 17 18 2 19 20 21 22 23 24 DO7− PGND2 PVCC2 28 MUTE 9 PS OUT4 SB DO5− CTL3 29 REV3 8 FWD3 IN4.2 SGND DO5+ REV2 30 FWD2 7 CTL2 IN4.1 FAN8037 (KA3037) Pin Definitions Pin Number Pin Name I/O Pin Function Descrition 1 IN2.1 I CH2 op-amp input (+) 2 IN2.2 I CH2 op-amp input (−) 3 OUT2 O CH2 op-amp output 4 IN3.1 I CH3 op-amp input (+) 5 IN3.2 I CH3 op-amp input (−) 6 OUT3 O CH3 op-amp output 7 IN4.1 I CH4 op-amp input (+) 8 IN4.2 I CH4 op-amp input (−) 9 OUT4 O CH4 op-amp output 10 CTL1 I CH5 motor speed control 11 FWD1 I CH5 forward input 12 REV1 I CH5 reverse input 13 CTL2 I CH6 motor speed control 14 FWD2 I CH6 forward input 15 REV2 I CH6 reverse input 16 SGND - Signal groung 17 FWD3 I CH7 forward input 18 REV3 I CH7 reverse input 19 CTL3 I CH7 motor speed control 20 SB I Stand by 21 PS I Power save 22 MUTE I All mute 23 PVCC2 - Power supply voltage (For CH5, CH6, CH7) 24 DO7− O CH7 drive ouptut (−) 25 DO7+ O CH7 drive output (+) 26 DO6− O CH6 drive output (−) 27 DO6+ O CH6 drive output (+) 28 PGND2 - Power ground2 (FOR CH5, CH6, CH7) 29 DO5− O CH5 drive output (−) 30 DO5+ O CH5 drive output (+) 31 DO4− O CH4 drive output (−) 32 DO4+ O CH4 drive output (+) 3 FAN8037 (KA3037) Pin Definitions (Continued) Pin Number Pin Name I/O Pin Function Descrition 33 DO3− O CH3 drive output (−) 34 DO3+ O CH3 drive output (+) 35 PGND1 - Power ground 1 (FOR CH1, CH2, CH3, CH4) 36 DO2− O CH2 drive output (−) 37 DO2+ O CH2 drive output (+) 38 DO1− O CH1 drive output (−) 39 DO1+ O CH1 drive output (+) 40 PVCC1 - Power supply voltage (FOR CH1, CH2, CH3, CH4) 41 REGOX I Regulator feedback input 42 REGX O Regulator output 43 RESX I Regulator reset input 44 VREF I Bias voltage input 45 SVCC - Signal supply voltage 46 IN1.1 I CH1 op-amp input (+) 47 IN1.2 I CH1 op-amp input (−) 48 OUT1 O CH1 op-amp output 4 FAN8037 (KA3037) Internal Block Diagram OUT1 48 IN1.2 47 IN1.1 46 SVCC VREF RESX 45 44 43 REGX REGOX PVCC1 DO1+ 42 41 40 DO1− DO2+ 38 37 39 + IN2.1 1 IN2.2 2 − − + − + − OUT2 3 IN3.1 4 IN3.2 5 OUT3 PGND1 34 DO3+ − 33 DO3− − 32 DO4+ 31 DO4− 30 DO5+ + − − + + 6 + + − IN4.1 35 + + + − DO2− − + + − 36 + − − 7 M S C S W IN4.2 8 OUT4 9 M S C S W + D − D 29 DO5− + D 28 PGND2 − D 27 DO6+ + D − 26 DO6− D 25 DO7+ CTL1 10 M S C S W FWD1 11 STAND BY T.S.D REV1 12 ALL MUTE POWER SAVE 13 14 CTL2 FWD2 15 16 REV2 SGND 17 FWD3 18 REV3 Notes: 1. SW = Logic switch 2. MSC = Motor speed control 3. D = Output driver 5 19 20 21 CTL3 SB PS 22 23 24 MUTE PVCC2 DO7− FAN8037 (KA3037) Equivalent Circuits Description Pin No. Input OPIN (+) OPIN (−) 46,47,1,2 4,5,7,8 Internal circuit SVCC SVCC 46 1 SVCC 0.05k 0.05k 4 7 Input opout 48,3,6,9 SVCC SVCC 48 3 6 9 CTL 10,13,19 SVCC SVCC 0.05k 10 13 19 Logic drive FWD input REV input 11,12, 14,15, 17,18 1k SVCC 11 12 14 15 0.05k 30k 17 18 30k 6 47 2 5 8 FAN8037 (KA3037) Equivalent Circuits (Continued) Description Pin No. Power save Standby 20,21 Internal circuit SVCC SVCC 20 21 50k 0.05k 50k Mute 22 SVCC SVCC 0.05k 50k 22 50k Logic drive output 24, 25 26, 27 29,30 SVCC PVCC2 30k 24 25 26 27 1k 29 30 25k 4-CH drive output 31, 32 33, 34 36, 37 38, 39 SVCC PVCC1 31 32 33 34 36 37 38 39 20k 20k 25k 7 FAN8037 (KA3037) Equivalent Circuits (Continued) Description Pin No. Ref 44 Internal circuit SVCC SVCC 20k 20k 1k 1k 0.05k 44 RESX 43 SVCC SVCC 0.05k 50k 43 50k REG0X 41 SVCC SVCC 0.05k 41 1k REGX 42 SVCC SVCC 42 0.05k 0.5k 60k 25k 8 FAN8037 (KA3037) Absolute Maximum Ratings ( Ta=25°°C) Parameter Symbol Value Unit SVCCMAX 18 V PVCC1 18 V PVCC2 18 V PD 3note W Operating Temperature TOPR −35 ~ +85 °C Storge Temperature TSTG −55 ~ +150 °C Maximum Output Current IOMAX 1 A Maximum Supply Voltage Power Dissipation Notes: 1. When mounted on 70mm × 70mm × 1.6mm PCB 2. Power dissipation reduces 24mW/°C for using above TA = 25°C 3. Do not exceed PD and SOA (Safe Operating Area) Pd (mW) 3,000 2,000 1,000 0 0 25 50 75 100 125 150 175 Ambient temperature, Ta [°C] Recommended Operating Conditions ( Ta=25°°C) Parameter Operating Supply Voltage Symbol Min. Typ. Max. Unit SVCC 4.5 - 13.2 V PVCC1 4.5 - SVCC V PVCC2 4.5 - SVCC V 9 FAN8037 (KA3037) Electrical Characteristics (SVCC = PVCC1 = PVCC2 = 8V, TA = 25°C, unless otherwise specified) Parameter Symbol Conditions Quiescent circuit current ICC Under no-load Power save on current IPS Pin21=GND Min. Typ. Max. Units 15 25 35 mA - 1 2 mA Stand by on voltage VSBON Pin20=Variation - - 0.5 V Stand by off voltage VSBOFF Pin20=Variation 2 - - V Power save on voltage VPSON Pin21=Variation - - 0.5 V Power save off voltage VPSOFF Pin21=Variation 2 - - V All mute on voltage VMON Pin22=Variation - - 0.5 V All mute off voltage VMOFF Pin22=Variation 2 - - V DRIVER CIRCUIT (RL=12Ω Ω) Output offset voltage VOO VIN=2.5V −80 - +80 mV Maximum output voltage 1 VOM1 VCC=PVCC1=PVCC2=8V, RL=12Ω 5.5 6.5 - V Maximum output voltage 2 VOM2 VCC=PVCC1=PVCC2=13V, RL=24Ω 10.5 11.5 - V Closed-loop voltage gain AVF VIN=0.1Vrms,f=1kHz 10.5 12 13.5 dB Slew rate SR Square, Vout=4Vp-p,f=120kHz - 2 - V/µs INPUT OPAMP CIRCUIT Input offset voltage Input bias current VOF - −30 - +30 mV IB - - - 300 nA High level output voltage VOH RL=Open 7.2 7.7 - V Low level output voltage VOL RL=Open - 0.2 0.5 V Output sink current ISINK RL=50Ω 2 4 - mA ISOURCE RL=50Ω 2 4 - mA VIN=−75dB - 70 - dB Square, Vout=2Vp-p, f=120kHz - 2.5 - V/µs Output source current Open loop voltage gain Slew rate GVO SR 10 FAN8037 (KA3037) Electrical Characteristics (Continued) (SVCC = PVCC1 = PVCC2 = 8V, TA = 25°C, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Units - 2 - - V TRAY, CHANGER,PANEL DRIVE CIRCUIT (RL=45Ω Ω) Input high level voltage VIH Input low level voltage VIL - - - 0.5 V Output voltage 1 VO1 VCC=8V, VCTL=2.5V, RL=12Ω - 5 - V Output voltage 2 VO2 VCC=8V, VCTL=3V, RL=45Ω - 6 - V Output voltage 3 VO3 VCC=13V, VCTL=4.5V, RL=45Ω - 9 - V Output load regulation ∆VRL VCTL=3V, IL=100mA → 400mA - 300 700 mV Output offset voltage 1 VOO1 VIN=5V, 5V −40 - +40 mV Output offset voltage 2 VOO2 VIN=0V, 0V −40 - +40 mV ∆VRL IL=0 → 200mA −40 0 +10 V VARIABLE REGULATOR CIRCUIT Load regulation Line regulation ∆VCC IL=200mA, VCC=6V → 9V −20 0 +30 mV Regulator output voltage 1 VREG1 IL=100mA 4.75 5.0 5.25 V Regulator output voltage 2 VREG2 IL=100mA 3.135 3.3 3.465 V Regulator reset on voltage Reson Pin43=Varivation - - 0.5 V Regulator reset off voltage Resoff Pin43=Varivation 2 - - V 11 FAN8037 (KA3037) Application Information 1. THERMAL SHUTDOWN SVCC • When the chip temperature reaches to 175°C, then the TSD circuit is activated. • This shuts down the bias current of the output drivers, and all the output drivers are in cut-off state. Thus the chip temperature begins to decrease. • when the chip temperature falls to 150°C, the TSD circuit is deactivated and the output drivers are normally operated. • The TSD circuit has the hysteresis temperature of 25°C. IREF Output driver bias R1 Q0 R2 Hysteresis Ihys R3 2. ALL MUTE FUNCTION • When the pin22 is high, the TR Q1 is turned on and Q2 is off, so the bias circuit is enabled. On the other hand, when the pin22 is Low (GND) , the TR Q1 is turned off and Q2 is on, so the bias circuit is disabled. • This function will cause all the output drivers to be in mute state. • Truth table is as follows; Pin#22 FAN8037 HIGH MUTE-OFF LOW MUTE-ON Bias blocks (4-Ch BTL and 3-Ch logic loading) SVCC Q2 22 Q1 3. POWER SAVE FUNCTION • When the pin21 is high, the TR Q3 is turned on and Q4 is off, so the bias circuit is enabled. On the other hand, when the pin21 is Low (GND) , the TR Q3 is turned off and Q4 is on, so the bias circuit is disabled. • That is, this function will cause all the circuit blocks of the chip except for the variable regulator to be in the off state. thus the low power quiescent state is established • Truth table is as follows; Pin#21 FAN8037 HIGH POWER SAVE OFF LOW POWER SAVE ON 12 SVCC Main Bias (except for variable reg.) Q4 21 Q3 FAN8037 (KA3037) 4. STANDBY FUNCTION • When the pin20 is high, the TR Q5 is turned on and Q6 is off, and the bias circuit is enabled. On the other hand, when the pin20 is Low (GND) , the TR Q5 is turned off and Q6 is on, and the bias circuit is disabled. • This function will cause the output drivers of the 4-CH BTL circuit (Focus, Tracking, Spindle, Sled) to be in off state. • Truth table is as follows Pin20 KA3037 HIGH STANDBY OFF LOW STANDBY ON SVCC Bias block (4-CH BTL output driver) Q6 20 Q5 5. REGULATOR & RESET FUNCTION The regulator and reset circuits are illustrated in the figure 1. • The external circuit is composed of the PNP transistor(KSB772), capacitor(about 33µF) and 2 feedback resistors. • The capacitor is used as a ripple filter and should have good temperature characteristics. • The regulator output voltage is determined as follows. VREG = (1+R1/R2) × 2.5 • When the voltage of the pin 43 (Vreset) is high, the regulator circuit operates normally. If the voltage of pin 43 is low, the regulator circuit is disabled . SVCC KSB772 VREG 33µF Vreset R1 R2 43 2.5V 42 41 40 − + FAN8037 Figure 1. Regulator circuit 13 FAN8037 (KA3037) 6. FOCUS, TRACKING ACTUATOR, SPINDLE, SLED MOTOR DRIVE PART R2 R1 OPin+ OPin- 46 1 4 7 47 2 5 8 48 3 6 9 Vref − Vin + − R1 Vp R2 44 DOP + R2 37 34 32 38 36 33 31 M R2 R1 39 + DON − R2 PVCC1 Dp 60k + Vp − 62k Qp • Vref is given by the external bias voltage of the pin 44. • The input signal (Vin) through pins 46,1,4 and 7 is amplified one time and then fed to the output stage. (assume that input opamp was used as a buffer) • The total closed loop voltage gain is as follows Vin = Vref + ∆V DOP = Vp + 2 ∆V DON = Vp – 2 ∆V Vout = DOP – DON = 4 ∆V Vout Gain = 20 log ------------- = 20 log 4 = 12dB ∆V • To change the total closed loop voltage gain, use the input opamp as an amplifier • The output stage is the balanced transformerless (BTL) driver. • The bias voltage Vp is expressed as ; 62k Vp = ( PVCC1 – VDp – VcesatQp ) × -------------------------- + VcesatQp 60k + 62k PVCC1 – VDp + VcesatQp = --------------------------------------------------------------------------- + VcesatQp 1.97 14 ---------- (1) FAN8037 (KA3037) 7. TRAY, CHANGER,PANEL MOTOR DRIVE PART out 1 out 2 25 27 30 M 24 26 29 D D LEVEL SHIFT 6.5V M.S.C CTL1,2,3 V(out1,out2) 10 13 19 S.W 0 IN VCTL IN FWD 11 14 17 3.25V REV 12 15 18 • Rotational direction control The forward and reverse rotational direction is controlled by FWD (pin 11,14, 17) and REV (pin 12,15,18) and the input conditions are as follows. INPUT OUTPUT FWD REV OUT 1 OUT 2 State H H Vp Vp Brake H L H L Forward L H L H Reverse L L - - Hign impedance • Where Vp(Power reference voltage) is approximately about 3.75V at PVCC2=8V ) according to equation (1). • Where out1 pins are pins24,26,29 and out2 pins are pins25,27,30 • Motor speed control (When SVCC=PVCC2=8V) - Maximum torque is obtained when the pins (10,13 and 19 (CTL1, 2, 3)) are open. - If the voltages of the pins (10,13 and 19 (CTL1, 2, 3)) are 0V, the motor will not operate. - When the control voltage of the pins 10,13 and 19 (CTL1, 2, 3) are between 0 and 3.25V, the differential output voltage(V(out1,out2)) is about two times of control voltage. Hence, the control to the differential output gain is two. - When the control voltage is greater than 3.25V, the output voltage is saturated at the 6.5V due to the output swing limitation. 15 FAN8037 (KA3037) 8. BOOTSTRAPPED OPERATION • IC has two kinds of power supplies, the power supply , SVCC is for predrivers and the other circuit blocks(SVCC). PVCC1 and PVCC2 are for the power transistors. • When SVCC=PVCCn (n=1,2), no bootstrapped operation occurs. Thus the single-ended maximum output voltage is SVCC PVCC Q3 SVCC – ( VcesatQ3 + Vbe1 ) ≅ SVCC – 1V Q1 • If larger output swing is requied, use the bootstrap function. When the bootsrap function is operated. SVCC > PVCCn + 1V • In this mode, the single-ended maximum output voltage is PVCCn – VcesatQ1 ≅ PVCCn – 0.5 ; Thus wide output dynamic range can be obtained. Vout Q2 PreDriver (PD) 16 Power TRs FAN8037 (KA3037) Typical Performance Characteristics VCC & ICC ICC (mA) TEMP & ICC ICC (mA) 40 40 35 35 30 30 25 25 20 20 15 15 10 10 5 5 0 0 VCC=4.5V VCC=13.2 V VCC=8V 4 6 8 10 12 14 16 18 -50 -30 -10 10 30 50 VCC (V) 90 110 TEMP (°C) VCC & VOM1 VOM1 (V) 70 VCC & VOM2 14 14 VOM2 (V) 12 12 10 10 8 8 6 6 4 VOM1_CH2 2 6 8 10 12 VO M2_C H3 VO M2_C H4 0 VOM1_CH4 4 VO M2_C H2 2 VOM1_CH3 0 VO M2_C H1 4 VOM1_CH1 4 14 6 8 10 12 VCC (V) 8 VOUT (V) 14 VCC (V) IOM & VOUT AVF (dB) 7 VCC & AVF 13 6 CH 1_UPP 5 11 CH 1_LOW CH 2_UPP 4 9 CH 2_LOW 3 CH 3_UPP CH 3-LOW 2 7 CH 4_UPP 1 CH 4_LOW 5 0 0 0.2 0.4 0.6 0.8 4 1 6 8 10 12 14 VCC (V) IOM (A) 17 FAN8037 (KA3037) Typical Performance Characteristics (Continued) TEMP & VOM VOM(V) VCC & VO1 VO1 (V) 6 12 5 4 8 3 2 4 VO_CH5 VO_CH6 1 VOM1 VO_CH7 VOM 2 0 -50 0 -30 -10 10 30 50 70 90 110 6 8 10 12 TEMP (°C) 14 Vctl & VO (Loading) VO(V) 14 VCC (V) 12 12 VO(V) TEMP & VO (Loading) 10 10 8 8 6 6 4 4 VO1 2 VO_12 ohm 2 VO2 VO_24 ohm VO3 0 -50 0 0 2 4 6 -30 -10 10 30 50 70 Vctl (V) 6 VREG(V) 6 5 5 4 4 3 3 2 2 8 10 12 VREG1 VREG2 VREG2 0 -50 0 6 TEMP & VREG VREG(V) 1 VREG1 4 110 TEMP (°C) VCC & VREG 1 90 14 -30 -10 10 30 50 70 90 110 TEMP (°C) VCC (V) 18 FAN8037 (KA3037) Typical Performance Characteristics (Continued) 7 Isource (mA) VCC & Isource 50 VCC & Isink Isink (mA) 45 6 40 5 35 4 30 25 3 20 2 15 10 1 5 0 0 4 6 8 10 12 14 4 VCC (V) 6 8 10 12 14 VCC (V) 19 FAN8037 (KA3037) Test Circuits VCC 50Ω 1 VREF 2.5V R2 2 100µF + 22µF + IL + 1000µF OP IN (+) R1 RIPPLE OP IN (-) RL1 39 38 RL2 37 DO2+ REGX 2 IN2.2 OP OUT 40 DO1− 41 DO1+ 42 PVCC1 43 RESX 44 VREF 45 SVCC 46 REGOX OP IN (-) 47 IN1.1 OP IN (+) 48 IN1.2 IN2.1 1 OUT1 OP OUT DO2- 36 PGND2 35 3 OUT2 DO3+ 34 OP IN (+) 4 IN3.1 DO3− 33 OP IN (-) 5 IN3.2 DO4+ 32 OP OUT 6 OUT3 DO4− 31 RL3 RL4 FAN8037 OP IN (+) 7 IN4.1 DO5+ 30 OP IN (-) 8 IN4.2 DO5− 29 RL5 PS MUTE PVCC2 13 14 15 16 17 18 19 20 21 22 23 DO7− SB 12 CTL3 DO6− REV3 11 FWD1 FWD3 DO6+ 27 SGND REV1 IN1B 10 CTL1 REV2 IN1A PGND1 28 FWD2 CTL1 9 OUT4 CTL2 OP OUT IL RL6 26 DO7+ IL 25 24 RL7 IL CTL2 IN2A IN2B IN3A IN3B IL CTL3 OP-AMP PART OPIN(+) OPIN(−) A B OPOUT D 1 VPULSE 2 3 VA 1 2 3 VOUT 50Ω VB C 1 20 2 IL VCC IL FAN8037 (KA3037) Typical Application Circuits 1 [Voltage control mode] VCC REGOUT R2 + 22µF R1 48 47 46 45 44 43 42 41 40 39 38 37 IN1.2 IN1.1 SVCC VREF RESX REGX REGOX PVCC1 DO1+ DO1− DO2+ 1 TRACKING OUT1 IN2.1 FOCUS 2 IN2.2 36 DO2− PGND2 35 3 OUT2 DO3+ 34 4 IN3.1 DO3− 33 5 IN3.2 DO4+ 32 6 OUT3 DO4− 31 M SLED M SPINDLE FAN8037 7 IN4.1 DO5+ 30 8 IN4.2 DO5− 29 9 OUT4 PGND2 28 10 CTL1 DO6+ 27 11 FWD1 DO6− 26 M TRAY REV2 SGND FWD3 REV3 CLT3 SB PS MUTE PVCC2 13 14 15 16 17 18 19 20 21 22 23 DO7− FWD2 12 REV1 CTL2 M CHANGER 24 DO7+ 25 M PANEL ALL MUTE POWER SAVE FOCUS, TRACKING, SLED SPINDLE MUTE VREF FOCUS TRACKING SLED SPINDLE INPUT INPUT INPUT INPUT [SERVO PRE AMP] TY CG PL TRAY CHANGER PANEL INPUT CONTROL INPUT INPUT [CONTROLLER] Notes: Radiation pin is connected to the internal GND of the package. Connect the pin to the external GND. 21 Where TY is tray motor. CG is changer motor PL is panel motor FAN8037 (KA3037) Typical Application Circuits 2 [Differential PWM control mode ] VCC REGOUT R2 + 22µF R1 48 47 46 45 44 43 42 41 40 39 38 37 IN1.2 IN1.1 SVCC VREF RESX REGX REGOX PVCC1 DO1+ DO1− DO2+ 1 TRACKING OUT1 IN2.1 FOCUS 2 IN2.2 36 DO2− PGND2 35 3 OUT2 DO3+ 34 4 IN3.1 DO3− 33 5 IN3.2 DO4+ 32 6 OUT3 DO4− 31 M SLED M SPINDLE FAN8037 7 IN4.1 DO5+ 30 8 IN4.2 DO5− 29 9 OUT4 PGND2 28 10 CTL1 DO6+ 27 11 FWD1 DO6− 26 M TRAY REV2 SGND FWD3 REV3 CLT3 SB PS MUTE PVCC2 13 14 15 16 17 18 19 20 21 22 23 DO7− FWD2 12 REV1 CTL2 M CHANGER 24 DO7+ 25 M PANEL ALL MUTE POWER SAVE FOCUS, TRACKING, SLED SPINDLE MUTE VREF FOCUS TRACKING SLED SPINDLE INPUT INPUT INPUT INPUT [SERVO PRE AMP] TY CG PL TRAY CHANGER PANEL CONTROL INPUT INPUT INPUT [CONTROLLER] Notes: Radiation pin is connected to the internal GND of the package. Connect the pin to the external GND 22 Where TY is tray motor. CG is changer motor PL is panel motor FAN8037 (KA3037) DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 12/1/00 0.0m 001 Stock#DSxxxxxxxx 2000 Fairchild Semiconductor International