SEMICONDUCTOR KF4N20LD/I TECHNICAL DATA N CHANNEL MOS FIELD EFFECT TRANSISTOR General Description KF4N20LD This planar stripe MOSFET has better characteristics, such as fast switching time, low on resistance, low gate charge and excellent avalanche characteristics. It is mainly suitable for LED Lighting and switching mode power supplies. A C K DIM MILLIMETERS _ 0.20 A 6.60 + _ 0.20 6.10 + B _ 0.30 5.34 + C _ 0.20 D 0.70 + _ 0.15 E 2.70 + _ 0.10 2.30 + F 0.96 MAX G 0.90 MAX H _ 0.20 1.80 + J _ 0.10 2.30 + K _ 0.50 + 0.10 L _ 0.10 M 0.50 + 0.70 MIN N L D B FEATURES ・VDSS(Min.)= 200V, ID= 3.6A H J ・Drain-Source ON Resistance : RDS(ON)=1.05 Ω(max) @VGS =10V E N G ・Qg(typ.) =2.9nC F F M ・Vth(Max.)= 2V 1 MAXIMUM RATING (Tc=25℃) 2. CATHODE SYMBOL RATING UNIT Drain-Source Voltage VDSS 200 V Gate-Source Voltage VGSS ±20 V Pulsed (Note1) Single Pulsed Avalanche Energy (Note 2) Repetitive Avalanche Energy (Note 1) Peak Diode Recovery dv/dt (Note 3) Drain Power Dissipation TC=25℃ 7* EAS 52 mJ EAR 3 mJ KF4N20LI A H J C dv/dt Derate above25℃ Tj Tstg Storage Temperature Range DPAK (1) A IDP PD Maximum Junction Temperature 2.2 5.5 V/ns D @TC=100℃ 3.6 ID 31 W B Drain Current 3. ANODE 0.25 W/℃ 150 ℃ -55～150 M K @TC=25℃ 1. ANODE 3 P N ℃ Thermal Characteristics E CHARACTERISTIC 2 G Thermal Resistance, Junction-to-Case RthJC 4.0 ℃/W Thermal Resistance, Junction-toAmbient RthJA 110 ℃/W F 1 L F 2 3 * : Drain current limited by maximum junction temperature. DIM MILLIMETERS A B _ 0.2 6.6 + _ 0.2 6.1 + C _ 0.3 5.34 + D _ 0.2 0.7 + E _ 0.3 9.3 + F _ 0.2 2.3 + G _ 0.1 0.76 + H _ 0.1 2.3 + J _ 0.1 0.5 + K _ 0.2 1.8 + L _ 0.1 0.5 + M N _ 0.1 1.0 + 0.96 MAX P _ 0.3 1.02 + 1. ANODE 2. CATHODE 3. ANODE PIN CONNECTION IPAK(1) 2010. 8. 20 Revision No : 0 1/6 KF4N20LD/I ELECTRICAL CHARACTERISTICS (Tc=25℃) CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT 200 - - V ID=250μA, Referenced to 25℃ - 0.2 - V/℃ Static Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient BVDSS ΔBVDSS/ΔTj ID=250μA, VGS=0V Drain Cut-off Current IDSS VDS=200V, VGS=0V, - - 10 μA Gate Threshold Voltage Vth VDS=VGS, ID=250μA 1.0 - 2.0 V Gate Leakage Current IGSS VGS=±20V, VDS=0V - - ±100 nA VGS=10V, ID=1.8A - 0.85 1.05 0.89 1.10 - 2.9 3.8 - 0.6 - - 2.2 - - 10 - - 20 - - 15 - RDS(ON) Drain-Source ON Resistance VGS=5V, ID=1.8A Ω Dynamic Qg Total Gate Charge Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-on Delay time td(on) tr Turn-on Rise time td(off) Turn-off Delay time VDS=150V, ID=3.6A VGS=5V (Note4,5) VDD=100V, ID=3.6A RG=25Ω (Note4,5) VGS=5V nC ns Turn-off Fall time tf - 15 - Input Capacitance Ciss - 170 220 Output Capacitance Coss - 25 - Reverse Transfer Capacitance Crss - 4.0 - - - 1 - - 4 IS=1A, VGS=0V - - 1.4 V VDS=25V, VGS=0V, f=1.0MHz pF Source-Drain Diode Ratings Continuous Source Current IS Pulsed Source Current ISP Diode Forward Voltage VSD Reverse Recovery Time trr IS=3.6A, VGS=0V, - 100 - ns Reverse Recovery Charge Qrr dIs/dt=100A/㎲ - 0.30 - μC VGS<Vth A Note 1) Repetivity rating : Pulse width limited by junction temperature. Note 2) L = 78mH, IS=1A, VDD=50V, RG = 25Ω, Starting Tj = 25℃. Note 3) IS ≤2A, dI/dt≤300A/㎲, VDD≤BVDSS, Starting Tj = 25℃. Note 4) Pulse Test : Pulse width ≤ 300㎲, Duty Cycle ≤ 2%. Note 5) Essentially independent of operating temperature. Marking KF4N20LW LD 2010. 8. 20 KF4N20LW LI Revision No : 0 2/6 KF4N20LD/I VGS = 3V 0 2 4 6 8 3.0 2.5 2.0 1.5 1.0 0.5 6 2010. 8. 20 Revision No : 0 3/6 KF4N20LD/I Fig 7. C - VDS Fig8. Qg- VGS 12 Gate - Source Voltage VGS (V) Capacitance (pF) 1000 Ciss 100 Coss 10 Crss 1 0 5 10 15 20 25 30 35 ID=4A 10 VDS = 40V 8 6 VDS = 160V 4 2 0 0 40 1 3 2 7 8 5 10 Drain Current ID (A) Operation in this area is limited by RDS(ON) Drain Current ID (A) 6 Fig10. ID - Tj Fig9. Safe Operation Area 10µs 100µs 1 1ms 10ms DC 0.1 Tc= 25 C Tj = 150 C Single pulse 4 3 2 1 0 100 10 1 5 Gate - Charge Qg (nC) Drain - Source Voltage VDS (V) 0.01 4 1000 0 50 25 Drain - Source Voltage VDS (V) 75 100 125 150 Junction Temperature Tj ( C) Fig11. Transient Thermal Response Curve Transient Thermal Resistance 10 Duty=0.5 0.20 1 PDM 0.10 t1 t2 0.05 2 0.0 1 0.0 - Duty Factor, D= t1/t2 Tj(max) - Tc - RthJC = PD lse le Pu ng Si 0.1 10-4 10-3 10-2 10-1 100 1 10 TIME (sec) 2010. 8. 20 Revision No : 0 4/6 KF4N20LD/I Fig12. Gate Charge VGS 5V RL 0.8 VDSS ID 1.0 mA Q VDS Qgd Qgs Qg VGS Fig13. Single Pulsed Avalanche Energy EAS= 1 LIAS2 2 BVDSS BVDSS - VDD BVDSS L IAS 50V 25Ω ID(t) VDS VGS 10 V VDD VDS(t) Time tp Fig14. Resistive Load Switching VDS 90% RL 0.5 VDSS VGS 10% 25 Ω VDS 10V 2010. 8. 20 VGS Revision No : 0 td(on) ton tr td(off) tf toff 5/6 KF4N20LD/I Fig15. Source - Drain Diode Reverse Recovery and dv /dt Body Diode Forword Current DUT VDS ISD di/dt (DUT) L IRM IS 0.5 VDSS Body Diode Reverse Current VDS (DUT) driver Body Diode Recovery dv/dt VSD VDD 10V 2010. 8. 20 VGS Revision No : 0 Body Diode Forword Voltage drop 6/6