STMICROELECTRONICS L4993MDTR

L4993
Low drop voltage regulator
Features
Max DC supply voltage
VS
40V
Max output voltage tolerance
∆V0
+/-2%
Max dropout voltage
Vdp
400 mV
Output current
I0
150 mA
Quiescent current
Iqn
79 µA(1)
SO-8
SO-20
1. Typical value with watchdog disabled.
■
Operating DC supply voltage range 5.6V to
31V
■
Reset circuit sensing the output voltage down
to 1V
■
Programmable reset pulse delay with external
capacitor
■
Watchdog
■
Programmable watchdog timer with external
capacitor
■
Enable input for enabling/disabling the
watchdog functionality
■
Thermal shutdown and short circuit protection
■
Wide temperature range (Tj = -40°C to 150°C)
Table 1.
Description
The L4993 is a monolithic integrated 5V Voltage
regulator with a low drop voltage at currents up to
150mA.The output voltage regulating element
consists in a p-channel MOS and the regulation is
performed regardless of input voltage transients
up to 40V. The high precision of the output voltage
is obtained with a pre-trimmed reference voltage.
The L4993 is protected against short circuit and
an over-temperature protection switches off the
device in case of extremely high power dissipation. The L4993 watchdog is active when the
Enable is high. State of the art features like reset
and watchdog make this device particularly
suitable to supply microprocessor systems in
automotive applications.
Device summary
Order codes
Package
April 2008
Tube
Tape & reel
SO-8
L4993D
L4993DTR
SO-20 (16+2+2)
L4993MD
L4993MDTR
Rev 6
1/30
www.st.com
30
Contents
L4993
Contents
1
Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.5
Test circuit and waveforms plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.5.1
3
4
5
6
2/30
Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3
Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2
SO-20 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2
SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3
SO-20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.4
SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.5
SO-20 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
L4993
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Watchdog Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SO-20 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SO-20 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3/30
List of figures
L4993
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
4/30
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pins configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Output voltage vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output voltage vs. Vs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Drop Voltage vs. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current consumption vs. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current consumption vs. Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current limitation vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current limitation vs. Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Short Circuit Current vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Short Circuit Current vs. Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VWEn_high vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VWEN_LOW vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Vrhth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Vrlth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Vwhth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Vwlth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Icr & Icwc vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Idr & Icwd vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Twop vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
PSRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Load regulation test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Maximum load variation response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
L4993 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Behavior of output current versus regulated voltage Vo . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Reset timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Watchdog timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 18
SO-8 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Thermal fitting model of Vreg in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SO-20 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 21
SO-20 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 22
Thermal fitting model of Vreg in SO-20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SO-20 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SO-20 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
SO-20 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
L4993
1
Block diagram and pins description
Block diagram and pins description
Figure 1.
Block diagram
5V, 150 mA
IO
IS
Thermal
protection
VS
+
-
ICW
Watchdog
Iwi
VO
VWi
VCW
IWEn
Voltage reference
IRes
VWEn
Icr
Reset
VRes
Vcr
Gnd
5/30
Block diagram and pins description
Table 2.
Pin
L4993
Pins description
SO-8 (D)
SO-20 (MD)
WEn
1
1
Watchdog Enable input
If high watchdog functionality is active
Gnd
2
4
Ground reference
name
Gnd
Function
Ground
Connected these pins to a heat spreader ground
5, 6, 15, 16
Res
3
7
Reset output.
It is pulled down when output voltage goes below Vo_th
or frequency at Wi is too low.
Leave floating if not used.
Vcr
4
10
Reset timing adjust.
A capacitor between Vcr pin and gnd, sets the reset
delay time (trd)
Vcw
5
11
Watchdog timer adjust
A capacitor between Vcw pin and gnd, sets the time
response of the watchdog monitor.
Wi
6
14
Watchdog input.
If the frequency at this input pin is too low, the Reset
output is activated.
Connect to ground if not used
Vos
7
17
Voltage regulator output
Block to ground with a capacitor >100nF (needed for
regulator stability)
Vs
8
20
Supply voltage
Block to ground directly at IC pin with a capacitor
2, 3, 8, 9, 12,
13, 18, 19
N.C.
Figure 2.
WEn
GND
Res
Vcr
Not connected
Pins configuration
1
2
3
4
8
SO-8
7
6
5
Vs
Vos
Wi
Vcw
WEn
1
20
Vs
N.C.
N.C.
2
19
18
17
16
15
14
N.C.
N.C.
Vos
GND
GND
GND
Res
N.C.
N.C.
Vcr
6/30
3
4
5
6
7
SO-20
8
9
13
10
11
12
GND
GND
Wi
N.C.
N.C.
Vcw
L4993
Electrical specifications
2
Electrical specifications
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
-0.3 to 40
V
VVsdc
DC supply voltage
IVsdc
Input current
VVo
DC output voltage
-0.3 to 6
IVo
DC output current
Internally limited
VWi
Watchdog input voltage
-0.3 to VVo + 0.3
V
Vod
Open drain output voltage
-0.3 to VVo + 0.3
V
Iod
Open drain output current
Internally limited
Vcr
Reset delay voltage
-0.3 to VVo + 0.3
V
Vcw
Watchdog delay voltage
-0.3 to VVo + 0.3
V
Watchdog Enable input voltage
-0.3 to VVo +0.3
V
-40 to 150
°C
VWEn
Tj
Internally limited
Junction temperature
V
VESD
ESD voltage level (HBM-MIL STD 883C)
±2
kV
VESD
ESD voltage level (CDM AEC-Q100-011)
750
V
Note:
Maximum ratings are absolute ratings; exceeding any one of these values may cause
permanent damage to the integrated circuit.
2.2
Thermal data
For details, please refer to Section 4.1: SO-8 thermal data and Section 4.2: SO-20 thermal
data.
Table 4.
Symbol
Rth-jamb
Thermal data(1)
Parameter
Thermal resistance Junction to Ambient:
SO-8
SO-20
Value
Unit
130
51
°C/W
°C/W
1. The values quoted are for PCB FR4 area= 58mm x 58mm, PCB thickness = 2mm, Cu thickness = 35µm ,
Copper areas: SO-8= 2 cm2, SO-20= 6 cm2.
7/30
Electrical specifications
2.3
L4993
Electrical characteristics
Values specified in this section are for Vs =5.6V to 31V, Tj= -40°C to +150°C unless
otherwise stated.
Table 5.
General
Pin
Symbol
Min.
Typ.
Vo
Vo_ref
Output voltage
Vs = 6 to 31V
Io = 1 to 150mA
4.9
5.0
5.1
V
Vo
Ishort
Short circuit current
Vs = 13.5V(1)
Vo
Ilim(2)
150
280
400
mA
(1)
Output current limitation
Vs = 13.5V
150
320
500
mA
Vs, Vo
Vline
Line regulation voltage
Vs = 6 to 31V
Io = 1 to 150mA
25
mV
Vo
Vload
Vs, Vo
Vdp(3)
Load regulation voltage
Io = 1 to 150mA
25
mV
Drop voltage
Io = 150mA
400
mV
Vs, Vo
SVR
Ripple rejection
fr = 100 Hz (4)
Vs, Vo
Iqn_150
Quiescent current
Vs=13.5V,
Io=150mA,
WEn = high
1.25
2
mA
Vs, Vo
Iqn_50
Quiescent current
Vs=13.5V,
Io= 50mA,
WEn = high
470
1000
µA
Vs, Vo
Iqn_1
Quiescent current
Vs=13.5V,
Io< 1mA,
WEn = high
100
180
µA
Vs, Vo
Iqs
Quiescent current with
watchdog regulator
disabled
Vs=13.5V,
Io< 1mA,
WEn = low
79
125
µA
Tw
Thermal protection
temperature
190
°C
Tw_hy
Parameter
Thermal protection
temperature hysteresis
Test condition
200
Max. Unit
55
dB
150
10
1. See Figure 25.
2. Measured output current when the output voltage has dropped 100mV from its nominal value obtained at
Vs=13.5V and Io= 75mA.
3. Vs-Vo measured when the output voltage has dropped 100mV from its nominal value obtained at
Vs=13.5V and Io= 75mA.
4. Guaranteed by design.
8/30
°C
L4993
Electrical specifications
Table 6.
Reset
Pin
Symbol
Parameter
Test condition
Min.
Res
Vres_l
Reset output low voltage
Res
IRes_h
Reset output high leakage
VRes = 5V
current
Res
R_p_u
Pull up internal resistance
With respect to Vo
12
Res
Vo_th
Vo out of regulation
threshold
Vs = 6 to 31V,
Io = 1 to 150mA
Vcr
Vrlth
Reset delay circuit low
threshold
Vcr
Vrhth
Vcr
Typ. Max.
Rext = 5kΩ to Vo,
Vo > 1V
Unit
0.4
V
1
µA
25
50
kΩ
6%
8%
10%
Below
Vo_ref
Vs = 13.5V
10%
13%
16%
Vo_ref
Reset delay circuit high
threshold
Vs =13.5V
44%
47%
50%
Vo_ref
Icr
Charge current
Vs = 13.5V
8
17.6
30
µA
Vcr
Idr
Discharge current
Vs = 13.5V
8
17.6
30
µA
Res
Trr_2
Reset reaction time(1)
Vo = Vo_th -100mV
100
275
1000
µs
Res
Trd
Reset delay time
Vs = 13.5V,
Ctr = 1nF
65
150
ms
1. When Vo becomes lower than 4V, the reset reaction time decreases down to 2µs assuring a faster reset
condition in this particular case.
Table 7.
Watchdog
Pin
Symbol
Parameter
Test condition
Min.
Typ. Max.
Wi
Vih
Input high voltage
Vs = 13.5V
Wi
Vil
Input low voltage
Vs = 13.5V
Wi
Vih_hyst
Input hysteresis
Vs = 13.5V
500
Wi
Ii
Pull down current
Vs = 13.5V
10
20
µA
Vcw
Vwhth
High threshold
Vs = 13.5V
44%
47%
50%
Vo_ref
Vcw
Vwlth
Low threshold
Vs = 13.5V
10%
13%
16%
Vo_ref
Vcw
Icwc
Charge current
Vs = 13.5V,
Vcw = 0.1V
4
8
14
µA
3.5
Unit
V
1.5
V
mV
9/30
Electrical specifications
Table 7.
Watchdog (continued)
Pin
Symbol
Vcw
Icwd
Discharge current
Vs = 13.5V,
Vcw = 2.5V
1.0
2.13
4.5
µA
Vcw
Twop
Watchdog period
Vs = 13.5V,
Ctw = 47nF
25
50
90
ms
Res
twol
Watchdog output low time
Vs = 13.5V,
Ctw = 47nF
6
10.5
22
ms
Table 8.
10/30
L4993
Parameter
Test condition
Min.
Typ. Max.
Unit
Watchdog Enable
Pin
Symbol
Parameter
WEn
WEn_low
Enable input low voltage
WEn
WEn_high
Enable input high voltage
WEn
WEn_hyst
Enable input hysteresis
WEn
Ileak
Pull down current
Test condition
Min.
Typ. Max.
1
3
WEn = 5V
Unit
V
V
500
800
1100
mV
2
8
20
µA
L4993
Electrical specifications
2.4
Electrical characteristics curves
Figure 3.
Output voltage vs. Tj
Figure 4.
Vo_ref (V)
Output voltage vs. Vs
Vo_ref (V)
10
5,5
Vs= 13.5V
I0 = 75mA
5,4
9
5,3
8
5,2
7
5,1
6
I0 = 75 mA
Tj = 25 °C
5
5
4,9
4
4,8
3
4,7
2
4,6
1
4,5
0
-50
-25
0
25
50
75
100
125
150
0
5
10
15
Tj(°C )
Figure 5.
20
25
30
35
Vs (V )
Drop Voltage vs. Output Current
Vdp (V)
Figure 6.
Current consumption vs. Output
Current
Iqn (µA)
1500
0,3
0,25
Vs= 13.5 V
Tj= 25 °C
En= High
1200
Tj= 125 °C
0,2
900
0,15
600
0,1
Tj= 25 °C
300
0,05
0
0
-50
0
50
100
150
200
-50
0
50
Io (mA)
Figure 7.
100
150
200
Io (mA)
Current consumption vs. Input
Voltage
Iqn(µA )
Figure 8.
Current limitation vs. Tj
Ilim (mA)
1200
600
1100
Tj = 25 °C
En = High
1000
500
Io= 100mA
900
800
400
Vs= 13.5V
700
600
300
Io =50mA
500
400
200
300
200
100
Io = 1mA
100
0
0
0
5
10
15
20
Vs (V )
25
30
35
-50
-25
0
25
50
75
100
125
150
Tj(°C )
11/30
Electrical specifications
Figure 9.
L4993
Current limitation vs. Input Voltage
Figure 10. Short Circuit Current vs. Tj
Ilim (mA)
Ishort (mA)
350
600
325
500
Tj = 25 °C
300
400
275
Vs= 13.5V
300
Tj = 125 °C
250
200
225
100
200
0
0
5
10
15
20
25
30
35
-50
-25
0
25
Vs (V )
50
75
100
125
150
125
150
Tj(°C )
Figure 11. Short Circuit Current vs. Input
Voltage
Figure 12. VWEn_high vs. Tj
Vwen_high (V)
Ishort (mA )
4
350
3,5
Vs= 5.6V to 31V
300
3
Tj = 25 °C
2,5
250
Tj = 150 °C
2
200
1,5
1
150
0
5
10
15
20
25
30
-50
35
-25
0
25
Figure 13. VWEN_LOW vs. Tj
75
100
Figure 14. Vrhth vs. Tj
Vwen_low (V)
Vrhth (% Vo_ref )
2
60
1,9
55
1,8
Vs= 5.6V to 31V
50
Vs= 5.6V to 31V
1,7
45
1,6
40
1,5
35
1,4
30
-50
-25
0
25
50
Tj(°C )
12/30
50
Tj(°C )
Vs (V )
75
100
125
150
-50
-25
0
25
50
Tj(°C )
75
100
125
150
L4993
Electrical specifications
Figure 15. Vrlth vs. Tj
Figure 16. Vwhth vs. Tj
Vrlth (% Vo_ref)
Vwhth (% Vo_ref )
50
60
55
Vs= 5.6V to 31V
40
Vs= 5.6V to 31V
50
30
45
20
40
10
35
0
30
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
Tj(°C )
50
75
100
125
150
Tj(°C )
Figure 17. Vwlth vs. Tj
Figure 18. Icr & Icwc vs. Tj
Vwlth (% Vo_ref)
Icr & Icwc (µA)
50
30
Vs= 5.6V to 31V
25
Vs= 5.6V to 31V
40
20
Icr
30
15
20
10
10
Icwc
5
0
0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
Tj(°C )
50
75
100
125
150
Tj(°C )
Figure 19. Idr & Icwd vs. Tj
Figure 20. Twop vs. Tj
Idr & Icwd (µA)
Twop (ms)
30
80
Vs= 5.6V to 31V
25
70
20
Vs= 5.6V to 31V
Ctw= 47nF
60
Idr
15
50
10
40
5
30
Icwd
0
20
-50
-25
0
25
50
Tj(°C )
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Tj(°C )
13/30
Electrical specifications
L4993
Figure 21. PSRR
C0 = 4.7µF
PSRR [dB]
80
70
60
50
40
30
20
10
0,1
1
10
100
1000
0
10000
FREQUENCY [KHz]
2.5
Test circuit and waveforms plot
2.5.1
Load regulation
Figure 22. Load regulation test circuit
10
Figure 23. Maximum load variation response
V0 [1V / div]
I0 [50mA / div]
0,00E+00
5,00E-05
1,00E-04
1,50E-04
2,00E-04
Time [s]
14/30
2,50E-04
3,00E-04
3,50E-04
4,00E-04
L4993
3
Application information
Application information
Figure 24. L4993 application schematic
Vi
Vo
Vs
C01
Thermal
protection
Cs
+
-
Vcw
Ctw
Wi
C02
Watchdog
Voltage reference
WEn
Res
Reset
Vcr
Ctr
Gnd
Note:
The input capacitor Cs > 200nF is necessary for the smoothing of line disturbances. The
output capacitor C01 > 100nF is necessary for the stability of the regulation loop. In order to
damp output voltage oscillations during high load current surges, it is recommended put an
additional electrolytic capacitor C02 > 10µF at the output pin.
3.1
Voltage regulator
Voltage regulator uses a p-channel transistor as a regulating element. With this structure,
very low dropout voltage at current up to 500mA is obtained. The output voltage is regulated
up to transient input supply voltage of 40V. No functional interruption due to over-voltage
pulses is generated. A short circuit protection to GND is provided. The voltage regulator
watchdog functionality can be disabled by putting WEn low.
Figure 25. Behavior of output current versus regulated voltage Vo
Vo
Vo_ref
Ishort Ilim
Iout
15/30
Application information
3.2
L4993
Reset
The reset circuit supervises the output voltage Vo. The Vo_th reset threshold is defined with
the in-ternal reference voltage and a resistor output divider. If the output voltage becomes
lower than Vo_th then Res goes low with a reaction time trr. The reset low signal is
guaranteed for an output voltage Vo greater than 1V.
When the output voltage becomes higher than Vo_th then Res goes high with a delay trd.
This delay is obtained by an internal oscillator.
The oscillator period is given by:
Tosc = [(Vrhth-Vrlth) x Ctr] / Icr + [(Vrhth-Vrlth) x Ctr] / Idr
where:
Icr:
is an internally generated charge current
Idr:
is an internally generated discharge current
Vrhth, Vrlth:
are two voltages defined with the output voltage and a resistor output
divider
Ctr:
is an external capacitance.
trd is given by:
trd = 512 x Tosc
Reset is active when En is high.
Figure 26. Reset timing diagram
Wi
Vo
Vcr
Vout_th
< trr
trr
Tosc
trd = 512 Tosc
Res
16/30
Vrhth
Vrlth
L4993
3.3
Application information
Watchdog
A connected microcontroller is monitored by the watchdog input Wi. If pulses are missing,
the Reset output pin is set to low. The pulse sequence time can be set within a wide range
with the external capacitor, Ctw. The watchdog circuit discharges the capacitor Ctw, with the
constant current Icwd. If the lower threshold Vwlth is reached, a watchdog reset is
generated. To prevent this the microcontroller must generate a positive edge during the
discharge of the capacitor before the voltage has reached the threshold Vwlth. In order to
calculate the minimum time t, during which the micro-controller must output the positive
edge, the following equation can be used:
(Vwhth-Vwlth) x Ctw = Icwd x t
Every Wi positive edge switches the current source from discharging to charging. The same
happens when the lower threshold is reached. When the voltage reaches the upper
threshold, Vwhth, the current switches from charging to discharging. The result is a
saw-tooth voltage at the watchdog timer capacitor Ctw.
Figure 27. Watchdog timing diagram
Wi
twop
Vwhth
Vcw
Vwlth
Vwlth
twol
Res
17/30
Package and PCB thermal data
L4993
4
Package and PCB thermal data
4.1
SO-8 thermal data
Figure 28. SO-8 PC board
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB
thickness = 2mm, Cu thickness = 35µm , Copper areas: from minimum pad lay-out to 2cm2).
Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition
170
RTHj_amb(°C/W)
160
150
140
130
120
110
0
18/30
0,5
1
1,5
PCB Cu heatsink area (cm^2)
2
2,5
L4993
Package and PCB thermal data
Figure 30. SO-8 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
Footprint
2 cm2
100
10
1
0,0001
0,001
0,01
0,1
1
Time (s)
10
100
1000
Equation 1: pulse calculation formula
Z
THδ
= R
TH
⋅ δ+Z
THtp
( 1 – δ)
where δ = tP/T
Figure 31. Thermal fitting model of Vreg in SO-8
19/30
Package and PCB thermal data
Table 9.
20/30
L4993
SO-8 thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
4.21
R2 (°C/W)
2.11
R3 (°C/W)
2
R4 (°C/W)
41
R5 (°C/W)
40
R6 (°C/W)
58
C1 (W.s/°C)
0.00029
C2 (W.s/°C)
0.0024
C3 (W.s/°C)
0.03
C4 (W.s/°C)
0.04
C5 (W.s/°C)
0.1
C6 (W.s/°C)
1.05
2
40
2
L4993
4.2
Package and PCB thermal data
SO-20 thermal data
Figure 32. SO-20 PC board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm,PCB
thickness = 2mm, Cu thickness=35µm , Copper areas: from minimum pad lay-out to 6cm2).
Figure 33. Rthj-amb Vs. PCB copper area in open box free air condition
70
68
66
RTHj_amb(°C/W)
Note:
64
62
60
58
56
54
52
50
0
1
2
3
4
5
PCB Cu heatsink area (cm^2)
6
7
21/30
Package and PCB thermal data
L4993
Figure 34. SO-20 thermal impedance junction ambient single pulse
ZTH (°C/W)
100
Footprint
6 cm2
10
1
0,0001
0,001
0,01
0,1
1
Time (s)
Equation 2: pulse calculation formula
Z
THδ
= R
TH
⋅ δ+Z
THtp
( 1 – δ)
where δ = tP/T
Figure 35. Thermal fitting model of Vreg in SO-20
22/30
10
100
1000
L4993
Package and PCB thermal data
Table 10.
SO-20 thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
4.21
R2 (°C/W)
2.11
R3 (°C/W)
2.2
R4 (°C/W)
10
R5 (°C/W)
15
R6 (°C/W)
35
C1 (W.s/°C)
0.00029
C2 (W.s/°C)
0.0024
C3 (W.s/°C)
0.015
C4 (W.s/°C)
0.15
C5 (W.s/°C)
1.5
C6 (W.s/°C)
4
2
18
7
23/30
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
L4993
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second-level interconnect. The category of
Second-Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
5.2
SO-8 package information
Figure 36. SO-8 package dimensions
24/30
L4993
Package and packing information
Table 11.
SO-8 mechanical data
Millimeters
Symbol
Min.
Typ.
A
Max.
1.75
A1
0.10
A2
1.25
b
0.28
0.48
c
0.17
0.23
D(1)
4.80
4.90
5.00
E
5.80
6.00
6.20
E1(2)
3.80
3.90
4.00
e
0.25
1.27
h
0.25
0.50
L
0.40
1.27
L1
k
ccc
1.04
0°
8°
0.10
1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs
shall not exceed 0.15mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25mm per side.
25/30
Package and packing information
5.3
L4993
SO-20 package information
Figure 37. SO-20 package dimensions
Table 12.
SO-20 mechanical data
Millimeters
Symbol
Min.
Typ.
Max.
A
2.35
2.65
A1
0.10
0.30
B
0.33
0.51
C
0.23
0.32
D(1)
12.60
13.00
E
7.40
7.60
e
1.27
H
10.0
10.65
h
0.25
0.75
L
0.40
1.27
k
0°
8°
ddd
0.10
1. “D” dimension does not include mold flash, protusions or gate burrs. Mold flash, protusions or gate burrs
shall not exceed 0.15mm per side.
26/30
L4993
5.4
Package and packing information
SO-8 packing information
Figure 38. SO-8 tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
3.2
6
0.6
All dimensions are in mm.
Figure 39. SO-8 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (+ 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
27/30
Package and packing information
5.5
L4993
SO-20 packing information
Figure 40. SO-20 tube shipment (no suffix)
C
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
40
800
532
3.5
13.8
0.6
A
Figure 41. SO-20 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
D
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
60
30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (+ 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
24
4
12
1.5
1.5
11.5
6.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
Empty components pockets
saled with cover tape.
User direction of feed
28/30
No components
500mm min
500mm min
L4993
6
Revision history
Revision history
Table 13.
Document revision history
Date
Revision
June-2004
1
Initial release.
18-Jan-2007
2
Updated Table 5., 6, 7 and 8.
01-Jun-2007
3
Document put in corporate technical literature template.
Updated Table 4.
22-Aug-2007
4
Table 5: General: updated Ishort, Ilim, Iq, Trr2, Vih_hist parameters.
29-Aug-2007
5
Added list of tables and figures.
Added Section 4: Package and PCB thermal data.
6
Document restructured.
Changed Figure 1: Block diagram.
Updated Table 5: General:
– changed Ishort max value from 4000 mA to 400 mA
– changed Iqn_150 typ. value from 1.45 mA to 1.25 mA
– changed Iqn_50 typ. value from 538 µA to 470 µA
– changed Iqn_1 typ. value from 120 µA to 100 µA.
Updated Table 6: Reset:
– corrected trd formula.
Updated Table 7: Watchdog:
– changed Vwlth values in Vo_ref percentages
– changed Vwhth values in Vo_ref percentages.
Added Figure 24: L4993 application schematic.
Added Section 2.4: Electrical characteristics curves.
Added Section 2.5: Test circuit and waveforms plot.
08-Apr-2008
Changes
29/30
L4993
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30/30