VNL5090N3-E, VNL5090S5-E
OMNIFET III fully protected low-side driver
Datasheet - production data
Description
2
1
2
The VNL5090N3-E and VNL5090S5-E are
monolithic devices made using
STMicroelectronics® VIPower® technology,
intended for driving resistive or inductive loads
with one side connected to the battery. Built-in
thermal shutdown protects the chip from
overtemperature and short-circuit.
3
SOT-223
SO-8
Features
Type
Vclamp
RDS(on)
ID
41 V
90 mΩ
13 A
Output current limitation protects the devices in
an overload condition. In case of long duration
overload, the device limits the dissipated power to
a safe level up to thermal shutdown
intervention.Thermal shutdown, with automatic
restart, allows the devices to recover normal
operation as soon as a fault condition disappears.
Fast demagnetization of inductive loads is
achieved at turn-off.
VNL5090N3-E
VNL5090S5-E
• Automotive qualified
• Drain current: 13 A
• ESD protection
• Overvoltage clamp
• Thermal shutdown
• Current and power limitation
• Very low standby current
• Very low electromagnetic susceptibility
• Compliant with European directive 2002/95/EC
• Open drain status output (VNL5090S5-E only)
• Specially intended for 2 x R10W or 4 x R5W
automotive signal lamps
Table 1. Devices summary
Order codes
Package
Tube
Tape and reel
SOT-223
—
VNL5090N3TR-E
SO-8
VNL5090S5-E
VNL5090S5TR-E
April 2015
This is information on a product in full production.
DocID022568 Rev 7
1/28
www.st.com
Contents
VNL5090N3-E, VNL5090S5-E
Contents
1
Block diagrams and pins configurations . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1
4
5
6
2/28
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1
SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1
ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2
SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.3
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.4
SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.5
SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DocID022568 Rev 7
VNL5090N3-E, VNL5090S5-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Devices summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
PowerMOS section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Input section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Status pin (VNL5090S5-E only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic input (VNL5090S5-E only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Openload detection (VNL5090S5-E only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Supply section (VNL5090S5-E only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table (VNL5090S5-E only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
SOT-223 thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SO-8 thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DocID022568 Rev 7
3/28
3
List of figures
VNL5090N3-E, VNL5090S5-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
4/28
VNL5090N3-E block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
VNL5090S5-E block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
VNL5090N3-E current and voltage conventions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
VNL5090S5-E current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Configuration diagrams (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VNL5090N3-E application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VNL5090S5-E application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Maximum demagnetization energy (VCC = 16 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SOT-223 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . 16
SOT-223 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal fitting model of a LSD in SOT-223 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SO-8 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . 19
SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Thermal fitting model of a LSD in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SOT-223 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
DocID022568 Rev 7
VNL5090N3-E, VNL5090S5-E
1
Block diagrams and pins configurations
Block diagrams and pins configurations
Figure 1. VNL5090N3-E block diagram
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Figure 2. VNL5090S5-E block diagram
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DocID022568 Rev 7
5/28
27
Block diagrams and pins configurations
VNL5090N3-E, VNL5090S5-E
Table 2. Pin function
Name
Function
INPUT
Voltage controlled input pin with hysteresis, CMOS compatible; It controls
output switch state(1)
DRAIN
PowerMOS drain
SOURCE
PowerMOS source and ground reference for the control section
SUPPLY
VOLTAGE
Supply voltage connected to the signal part (5 V)
STATUS
Open drain digital diagnostic pin(2)
1. Internally connected to Vsupply in the VNL5090N3-E
2. Valid for VNL5090S5-E only.
Figure 3. VNL5090N3-E current and voltage conventions
Figure 4. VNL5090S5-E current and voltage conventions
6/28
DocID022568 Rev 7
VNL5090N3-E, VNL5090S5-E
Block diagrams and pins configurations
Figure 5. Configuration diagrams (top view)
SOT-223
SO-8
Table 3. Suggested connections for unused and N.C. pins
Connection / pin
Status
N.C.
Input
Floating
X(1)
X
X
To ground
Not allowed
X
Through 10 kΩ resistor
1. X: do not care.
DocID022568 Rev 7
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27
Electrical specifications
VNL5090N3-E, VNL5090S5-E
2
Electrical specifications
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the Table 4 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Table 4. Absolute maximum ratings
Value
Symbol
Parameter
Unit
SOT-223
VDS
ID
DC drain current
-ID
Reverse DC drain current
IS
DC supply current
IIN
DC input current
ISTAT
DC status current
VESD1
Electrostatic discharge
(R = 1.5 kΩ; C = 100 pF)
– DRAIN
– SUPPLY, INPUT, STATUS
VESD2
Electrostatic discharge on output pin only
(R = 330 Ω, C = 150 pF)
Internally clamped
V
Internally limited
A
12.5
A
—
-1 to 10
-1 to 10
—
mA
mA
-1 to 10
mA
5000
4000
V
V
2000
V
Junction operating temperature
-40 to 150
°C
Tstg
Storage temperature
-55 to 150
°C
EAS
Single pulse avalanche energy
(L = 1.1 mH, Tj = 150°C, RL = 0, IOUT = IlimL)
50
mJ
Tj
2.2
Drain-source voltage (VIN = 0 V)
SO-8
Thermal data
Table 5. Thermal data
Maximum value
Symbol
Parameter
Rthj-amb Thermal resistance junction-ambient
Unit
SOT-223
SO-8
147(1)
102
2
°C/W
1. When mounted on a standard single-sided FR4 board with 0.5 cm of Cu (at least 35 µm thick) connected
to all DRAIN pins
8/28
DocID022568 Rev 7
VNL5090N3-E, VNL5090S5-E
2.3
Electrical specifications
Electrical characteristics
Values specified in this section are for Vsupply = VIN = 4.5 V to 5.5 V, -40°C < Tj < 150°C,
unless otherwise stated.
Table 6. PowerMOS section
Symbol
Vsupply
RON
Parameter
Test conditions
Min.
Typ.
Max.
Unit
3.5
5
5.5
V
Operating supply voltage
ON-state resistance
ID = 1.6 A; Tj = 25°C;
Vsupply = VIN = 5 V
90
ID = 1.6 A; Tj = 150°C;
Vsupply = VIN = 5 V
180
ID = 1.6 A; Tj = 150°C;
Vsupply = VIN = 4.5 V(1)
190
VCLAMP Drain-source clamp voltage VIN = 0 V; ID = 1.6 A
VCLTH
IDSS
Drain-source clamp
threshold voltage
OFF-state output current
41
46
52
VIN = 0 V; ID = 2 mA
36
VIN = 0 V; VDS = 13 V;
Tj = 25°C
0
3
VIN = 0 V; VDS = 13 V;
Tj = 125°C
0
5
mΩ
V
V
µA
1. Valid only for VNL5090N3-E.
Table 7. Source drain diode
Symbol
VSD
Parameter
Test conditions
Forward on voltage
ID = 1.6 A; VIN = 0 V
Min.
Typ.
Max.
Unit
—
0.8
—
V
Table 8. Input section(1)
Symbol
Parameter
Test conditions
IISS
Supply current from input pin
ON-state: Vsupply = VIN = 5 V;
VDS = 0 V
VICL
Input clamp voltage
VINTH
Min.
IS = 1 mA
Max.
Unit
30
65
µA
5.5
7
V
IS = -1 mA
Input threshold voltage
Typ.
-0.7
VDS = VIN; ID = 1 mA
1
3.5
V
1. Valid for VNL5090N3-E option (input and supply pins connected together)
Table 9. Status pin (VNL5090S5-E only)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
VSTAT
Status low output voltage
ISTAT = 1 mA
0.5
V
ILSTAT
Status leakage current
Normal operation,
VSTAT = 5 V
10
µA
DocID022568 Rev 7
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27
Electrical specifications
VNL5090N3-E, VNL5090S5-E
Table 9. Status pin (VNL5090S5-E only) (continued)
Symbol
Parameter
Test conditions
CSTAT
Status pin input capacitance
VSTCL
Status clamp voltage
Min.
Typ.
Normal operation,
VSTAT = 5 V
ISTAT = 1 mA
5.5
Max.
Unit
100
pF
7
V
ISTAT = -1 mA
-0.7
Table 10. Logic input (VNL5090S5-E only)
Symbol
Parameter
Test conditions
VIL
Low-level input voltage
IIL
Low-level input current
VIH
High-level input voltage
IIH
High-level input current
VI(hyst)
Input hysteresis voltage
VICL
VIN = 0.9 V
Min.
Typ.
Max.
Unit
0.9
V
1
µA
2.1
V
VIN = 2.1 V
10
0.13
IIN = 1 mA
Input clamp voltage
µA
V
5.5
7
V
IIN = -1 mA
-0.7
Table 11. Openload detection (VNL5090S5-E only)
Symbol
VOl
td(oloff)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
0.6
1.2
1.7
V
45
425
1100
µs
Typ.
Max.
Unit
OFF-state; Tj = 25°C;
VIN = VDRAIN = 0 V;
10
25
ON-state; VIN = 5 V; VDS = 0 V
25
Openload OFF-state voltage
detection threshold
VIN = 0 V
Delay between INPUT falling
edge and STATUS falling edge IOUT = 0 A
in openload condition
Table 12. Supply section (VNL5090S5-E only)
Symbol
IS
VSCL
10/28
Parameter
Supply current
Supply clamp voltage
Test conditions
ISCL = 1 mA
ISCL = -1 mA
DocID022568 Rev 7
Min.
µA
5.5
65
7
V
-0.7
VNL5090N3-E, VNL5090S5-E
Electrical specifications
Table 13. Switching characteristics
SOT-223(1)
Symbol
Parameter
SO-8
Unit
Test conditions
Min.
Typ.
Max
Min.
Typ.
Max.
td(ON)
Turn-on delay
time
RL = 8.2 Ω,
VCC = 13 V(2)
—
8
—
—
8
—
µs
td(OFF)
Turn-off delay
time
RL = 8.2 Ω,
VCC = 13 V(2)
—
3.4
—
—
18
—
µs
tr
Rise time
RL = 8.2 Ω,
VCC = 13 V(2)
—
10
—
—
10
—
µs
tf
Fall time
RL = 8.2 Ω,
VCC = 13 V(2)
—
2.7
—
—
10
—
µs
WON
Switching energy
losses at turn-on
RL = 8.2 Ω,
VCC = 13 V(2)
—
57
—
—
57
—
µJ
WOFF
Switching energy
losses at turn-off
RL = 8.2 Ω,
VCC = 13 V(2)
—
14
—
—
55
—
µJ
1. 3.5 V ≤ Vsupply = VIN ≤ 5.5 V
2. See Figure 6: Switching characteristics
Note:
See Figure 7: VNL5090N3-E application schematic and Figure 8: VNL5090S5-E application
schematic
Table 14. Protection and diagnostics
Test conditions(1)
Symbol
Parameter
IlimH
DC short-circuit current
VDS = 13 V;
Vsupply = VIN = 5 V
IlimL
Short-circuit current
during thermal cycling
VDS = 13 V; TR < Tj < TTSD;
Vsupply = VIN = 5 V
8
A
tdlimL
Step response current
limit
VDS = 13 V; Vinput = 5 V
44
µs
TTSD
Shutdown temperature
TR(2)
Reset temperature
TRS (3)
Thermal reset of
STATUS
THYST
Thermal hysteresis
(TTSD - TR)
Min.
Typ.
Max.
Unit
13
18
25
A
150
175
TRS + 1 TRS + 5
135
200
°C
°C
°C
7
°C
1. Vsupply = Vinput in VNL5090N3-E version.
2. Valid for VNL5090S5-E option.
DocID022568 Rev 7
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Electrical specifications
VNL5090N3-E, VNL5090S5-E
Table 15. Truth table (VNL5090S5-E only)
Conditions
INPUT
DRAIN
STATUS
Normal operation
L
H
H
L
H
H
Current limitation
L
H
H
X
H
H
Overtemperature
L
H
H
H
H
L
Undervoltage
L
H
H
H
X
X
Output voltage < VOL
L
H
L
L
L
H
Figure 6. Switching characteristics
12/28
DocID022568 Rev 7
VNL5090N3-E, VNL5090S5-E
Application information
Figure 7. VNL5090N3-E application schematic
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Figure 8. VNL5090S5-E application schematic
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DocID022568 Rev 7
13/28
27
Application information
3.1
VNL5090N3-E, VNL5090S5-E
MCU I/O protection
ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from
latching up(a). The value of these resistors is a compromise between the leakage current of
microcontroller and the current required by the LSD I/Os (input levels compatibility) with the
latch-up limit of microcontroller I/Os:
Equation 1
( V OHμC – V IH )
0.7
-------------------- ≤ R prot ≤ ---------------------------------------I latchup
I IH max
Let:
•
Ilatchup > 20 mA
•
VOHµC > 4.5 V
•
35 Ω ≤ Rprot ≤ 100 KΩ
Then, the recommended value is Rprot = 1 KΩ
Figure 9 shows the turn-off current drawn during the demagnetization.
a. In case of negative transient on the drain pin.
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Application information
Figure 9. Maximum demagnetization energy (VCC = 16 V)
91/ 0D[LPXPWXUQRIIFXUUHQWYHUVXVLQGXFWDQFH
,$
91/6LQJOH3XOVH
5HSHWLWLYHSXOVH7MVWDUW &
5HSHWLWLYHSXOVH7MVWDUW &
/P+
91/ 0D[LPXPWXUQRII(QHUJ\YHUVXV7GHPDJ
91/6LQJOH3XOVH
5HSHWLWLYHSXOVH7MVWDUW &
5HSHWLWLYHSXOVH7MVWDUW &
(>P-@
7GHPDJ>PV@
*$3*&)7
DocID022568 Rev 7
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Package and PC board thermal data
VNL5090N3-E, VNL5090S5-E
4
Package and PC board thermal data
4.1
SOT-223 thermal data
Figure 10. SOT-223 PC board
GAPGCFT00530
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area = 30 mm x 58 mm, PCB
thickness = 2 mm, Cu thickness = 35 µm, copper areas: from minimum pad lay-out to
0.8 cm2).
Figure 11. SOT-223 Rthj-amb vs PCB copper area in open box free air condition
57+MDPE
IRRWSULQW
24 (J?A MB &:
3&%&XKHDWVLQNDUHDFPA UHIHUWR3&%OD\RXW
*$3*&)7
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Package and PC board thermal data
Figure 12. SOT-223 thermal impedance junction ambient single pulse
=7+&:
&XIRR WSULQW
&X FP
7LPHV
*$3*&)7
Equation 2: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = tP/T
Figure 13. Thermal fitting model of a LSD in SOT-223
GAPGCFT00533
Note:
The fitting model is a semplified thermal tool and is valid for transient evolutions where the
embedded protections (power limitation or thermal cycling during thermal shutdown) are not
triggered.
DocID022568 Rev 7
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Package and PC board thermal data
VNL5090N3-E, VNL5090S5-E
Table 16. SOT-223 thermal parameters
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Area/island (cm2)
Footprint
R1 (°C/W)
0.8
R2 (°C/W)
1
R3 (°C/W)
4.5
R4 (°C/W)
24
R5 (°C/W)
0.1
R6 (°C/W)
115
C1 (W.s/°C)
0.00004
C2 (W.s/°C)
0.0003
C3 (W.s/°C)
0.03
C4 (W.s/°C)
0.16
C5 (W.s/°C)
1000
C6 (W.s/°C)
0.4
DocID022568 Rev 7
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45
2
VNL5090N3-E, VNL5090S5-E
4.2
Package and PC board thermal data
SO-8 thermal data
Figure 14. SO-8 PC board
GAPGCFT00534
Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB
thickness = 2 mm, Cu thickness = 35 µm (front and back side), Copper areas: from
minimum pad lay-out to 2 cm2).
Figure 15. SO-8 Rthj-amb vs PCB copper area in open box free air condition
57+MDPE
IRRWSULQW
24 (J?A MB &:
Note:
3&%&XKHDWVLQNDUHDFPA UHIHUWR3&%OD\RXW
*$3*&)7
DocID022568 Rev 7
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Package and PC board thermal data
VNL5090N3-E, VNL5090S5-E
Figure 16. SO-8 thermal impedance junction ambient single pulse
=7+&:
&X IRRWSULQW
&X FP
7LPHV
*$3*&)7
Equation 3: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = tP/T
Figure 17. Thermal fitting model of a LSD in SO-8
GAPGCFT00533
Note:
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The fitting model is a semplified thermal tool and is valid for transient evolutions where the
embedded protections (power limitation or thermal cycling during thermal shutdown) are not
triggered.
DocID022568 Rev 7
VNL5090N3-E, VNL5090S5-E
Package and PC board thermal data
Table 17. SO-8 thermal parameters
Area/island (cm2)
Footprint
R1 (°C/W)
0.8
R2 (°C/W)
2.7
R3 (°C/W)
3.5
R4 (°C/W)
21
R5 (°C/W)
16
R6 (°C/W)
58
C1 (W.s/°C)
0.00005
C2 (W.s/°C)
0.001
C3 (W.s/°C)
0.0075
C4 (W.s/°C)
0.045
C5 (W.s/°C)
0.35
C6 (W.s/°C)
1.05
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2
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Package and packing information
VNL5090N3-E, VNL5090S5-E
5
Package and packing information
5.1
ECOPACK®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
SOT-223 mechanical data
Figure 18. SOT-223 package dimensions
0046067
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Package and packing information
Table 18. SOT-223 mechanical data
mm.
inch
DIM.
Min.
Typ.
A
Max.
Typ.
1.8
Max.
0.071
B
0.6
0.7
0.85
0.024
0.027
0.033
B1
2.9
3
3.15
0.114
0.118
0.124
c
0.24
0.26
0.35
0.009
0.01
0.014
D
6.3
6.5
6.7
0.248
0.256
0.264
e
2.3
0.09
e1
4.6
0.181
E
3.3
3.5
3.7
0.13
0.138
0.146
H
6.7
7
7.3
0.264
0.276
0.287
V
A1
5.3
Min.
10 (max)
0.02
0.1
0.0008
0.004
SO-8 mechanical data
Figure 19. SO-8 package dimensions
GAPGCFT00145
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Package and packing information
VNL5090N3-E, VNL5090S5-E
Table 19. SO-8 mechanical data
Millimeters
Symbol
Min.
Typ.
A
Max.
1.75
A1
0.10
A2
1.25
b
0.28
0.48
c
0.17
0.23
D(1)
4.80
4.90
5.00
E
5.80
6.00
6.20
E1(2)
3.80
3.90
4.00
e
0.25
1.27
h
0.25
0.50
L
0.40
1.27
L1
k
1.04
0°
ccc
8°
0.10
1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.
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5.4
Package and packing information
SOT-223 packing information
The devices can be packed in tube or tape and reel shipments (see the Table 1: Devices
summary on page 1).
Figure 20. SOT-223 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
12.4
60
18.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (+ 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
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Package and packing information
5.5
VNL5090N3-E, VNL5090S5-E
SO-8 packing information
Figure 21. SO-8 tube shipment (no suffix)
B
Base q.ty
Bulk q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
3.2
6
0.6
All dimensions are in mm.
Figure 22. SO-8 tape and reel shipment (suffix “TR”)
Reel dimensions
Base q.ty
Bulk q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape hole spacing
Component spacing
Hole diameter
Hole diameter
Hole position
Compartment depth
Hole spacing
W
P0 (± 0.1)
P
D (+ 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
Empty components pockets
saled with cover tape.
User direction of feed
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500mm min
500mm min
VNL5090N3-E, VNL5090S5-E
6
Revision history
Revision history
Table 20. Document revision history
Date
Revision
Changes
15-Dec-2011
1
Initial release.
20-Jan-2012
2
Table 4: Absolute maximum ratings:
– -ID: updated value
18-Apr-2012
3
Updated Features list
10-Aug-2012
4
Updated Table 13: Switching characteristics
18-Sep-2013
5
Updated disclaimer.
13-Nov-2013
6
Updated Features list
Table 8: Input section:
– IISS: updated maximum value
Table 12: Supply section (VNL5090S5-E only):
– IIS: updated maximum value
Updated Figure 7: VNL5090N3-E application schematic and
Figure 8: VNL5090S5-E application schematic
Updated Section 3.1: MCU I/O protection
01-Apr-2015
7
Updated Table 1: Devices summary
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ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
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© 2015 STMicroelectronics – All rights reserved
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