Ordering number : EN5800 CMOS LSI LC75874E, 75874W 1/4-Duty General-Purpose LCD Display Driver Overview Package Dimensions The LC75874E and LC75874W are 1/4-duty generalpurpose microprocessor-controlled LCD driver that can be used in applications such as frequency display in products with electronic tuning. In addition to being able to drive up to 264 segments directly, the LC75874E and LC75874W can also control up to 8 general-purpose output ports. Since the LC75874E and LC75874W use separate power supply systems for the LCD drive block and the logic block, the LCD driver block power-supply voltage can be set to any voltage in the range 2.7 to 6.0 V, regardless of the logic block power-supply voltage. unit: mm 3174-QFP80E [LC75874E] Features • Support for 1/4-duty 1/2-bias or 1/4-duty 1/3-bias drive techniques under serial data control (up to 264 segments) • Serial data input supports CCB format communication with the system controller. • Serial data control of the power-saving mode based backup function and the all segments forced off function. • Serial data control of switching between the segment output port and general-purpose output port functions. • High generality, since display data is displayed directly without the intervention of a decoder circuit. • Independent VLCD for the LCD driver block (VLCD can be set to any voltage in the range 2.7 to 6.0 V, regardless of the logic block power-supply voltage.) • The INH pin allows the display to be forced to the off state. • RC oscillator circuit SANYO: QFP80E unit: mm 3220-SQFP80 [LC75874W] SANYO: SQFP80 • CCB is a trademark of SANYO ELECTRIC CO., LTD. • CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO. SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 31398RM (OT) No. 5800-1/16 LC75874E, 75874W Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Maximum supply voltage Input voltage Output voltage Output current Allowable power dissipation Symbol Conditions Ratings Unit VDD max VDD –0.3 to +7.0 VLCD max VLCD –0.3 to +7.0 VIN1 CE, CL, DI, INH VIN2 OSC VIN3 VLCD1, VLCD2 –0.3 to +7.0 –0.3 to VDD + 0.3 V –0.3 to VLCD + 0.3 VOUT1 OSC VOUT2 S1 to S66, COM1 to COM4, P1 to P8 IOUT1 S1 to S66 IOUT2 COM1 to COM4 3 IOUT3 P1 to P8 5 Pd max V –0.3 to VDD + 0.3 –0.3 to VLCD + 0.3 300 Ta = 85°C 200 V µA mA mW Operating temperature Topr –40 to +85 °C Storage temperature Tstg –55 to +125 °C Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V Parameter Supply voltage Input voltage Symbol Conditions Ratings min typ max VDD VDD 2.7 6.0 VLCD VLCD 2.7 6.0 VLCD1 VLCD1 2/3 VLCD VLCD VLCD2 VLCD2 1/3 VLCD VLCD Unit V V Input high-level voltage VIH CE, CL, DI, INH 0.8 VDD 6.0 V Input low-level voltage VIL CE, CL, DI, INH 0 0.2 VDD V Recommended external resistance ROSC OSC 43 kΩ Recommended external capacitance COSC OSC 680 pF Guaranteed oscillation range fOSC OSC 25 50 100 kHz Data setup time tds CL, DI: Figure 2 160 ns Data hold time tdh CL, DI: Figure 2 160 ns CE wait time tcp CE, CL: Figure 2 160 ns CE setup time tcs CE, CL: Figure 2 160 ns CE hold time tch CE, CL: Figure 2 160 ns High-level clock pulse width tøH CL: Figure 2 160 ns Low-level clock pulse width tøL CL: Figure 2 160 ns Rise time tr CE, CL, DI: Figure 2 160 Fall time tf CE, CL, DI: Figure 2 160 INH switching time tc INH, CE: Figure 3 10 ns ns µs No. 4465-No. 5800-2/16 LC75874E, 75874W Electrical Characteristics for the Allowable Operating Ranges Parameter Symbol Conditions Hysteresis VH CE, CL, DI, INH Input high-level current IIH CE, CL, DI, INH: VI = 6.0 V IIL CE, CL, DI, INH: VI = 0 V Input low-level current Output high-level voltage Output low-level voltage Output middle-level voltage*1 Oscillator frequency Current drain Ratings min typ Unit max 0.1 VDD VOH1 S1 to S66: IO = –20 µA V 5.0 –5.0 µA µA VLCD – 0.9 VOH2 COM1 to COM4: IO = –100 µA VLCD – 0.9 VOH3 P1 to P8: IO = –1 mA VLCD – 0.9 V VOL1 S1 to S66: IO = 20 µA 0.9 VOL2 COM1 to COM4: IO = 100 µA 0.9 VOL3 P1 to P8: IO = 1 mA 0.9 VMID1 COM1 to COM4: 1/2 bias, IO = ±100 µA 1/2 VLCD – 0.9 1/2 VLCD + 0.9 VMID2 S1 to S66: 1/3 bias, IO = ±20 µA 2/3 VLCD – 0.9 2/3 VLCD + 0.9 VMID3 S1 to S66: 1/3 bias, IO = ±20 µA 1/3 VLCD – 0.9 1/3 VLCD + 0.9 VMID4 COM1 to COM4: 1/3 bias, IO = ±100 µA 2/3 VLCD – 0.9 2/3 VLCD + 0.9 VMID5 COM1 to COM4: 1/3 bias, IO = ±100 µA 1/3 VLCD – 0.9 1/3 VLCD + 0.9 fOSC OSC: ROSC = 43 kΩ, COSC = 680 pF IDD1 VDD: Power-saving mode 40 50 60 V V kHz 5 IDD2 VDD: VDD = 6.0 V, outputs open, fOSC = 50 kHz ILCD1 VLCD: Power-saving mode ILCD2 ILCD3 230 460 VLCD: VLCD = 6.0 V, outputs open, 1/2 bias, fOSC = 50 kHz 200 400 VLCD: VLCD = 6.0 V, outputs open, 1/3 bias, fOSC = 50 kHz 120 240 5 µA Note: *1 Excluding the bias voltage generation divider resistors built in the VLCD1 and VLCD2. (See Figure 1.) VLCD VLCD1 VLCD2 Figure 1 No. 4465No. 5800-3/16 LC75874E, 75874W 1. When CL is stopped at the low level 2. When CL is stopped at the high level Figure 2 Block Diagram No. 4465-No. 5800-4/16 LC75874E, 75874W Pin Functions Symbol Pin No. LC75874E Function Active I/O Handling when unused Segments outputs for displaying the display data transferred by serial data input. The S1/P1 to S8/P8 pins can be used as general-purpose output ports under serial data control. — O Open LC75874W S1/P1 to S8/P8 1 to 8 S9 to S66 9 to 66 79, 80, 1 to 6 7 to 64 COM1 COM2 COM3 COM4 67 68 69 70 65 66 67 68 Common driver outputs. The frame frequency fo is fOSC/512 Hz. — O Open OSC 76 74 Oscillator connection. An oscillator circuit can be formed by connecting an external resistor and capacitor at this pin. — I/O VDD CE 78 76 Serial data transfer inputs. Connected to the controller. H I CE: Chip enable CL: Synchronization clock DI: Transfer data CL 79 77 DI 80 78 I GND — I L I GND Display off control input INH 77 75 INH = low (VSS) ......Display forced off S1/P1 to S8/P8 = low (VSS) (These pins are forcibly set to the segment output port function and held at the VSS level.) S9 to S66 = low (VSS) COM1 to COM4 = low (VSS) INH = high (VDD).....Display on However, serial data transfer is possible when the display is forced off by this pin. VLCD1 73 71 Used to apply the LCD drive 2/3 bias voltage externally. Connect this pin to VLCD2 when using a 1/2-bias drive scheme. — I Open VLCD2 74 72 Used to apply the LCD drive 1/3 bias voltage externally. Connect this pin to VLCD1 when using a 1/2-bias drive scheme. — I Open VDD 71 69 Logic block power supply. In the range 2.7 to 6.0 V. — — — VLCD 72 70 LCD driver block power supply. In the range 2.7 to 6.0 V. — — — VSS 75 73 Ground pin. Connect to ground. — — — Pin Assignments Top view No. 4465No. 5800-5/16 LC75874E, 75874W Serial Data Transfer Format 1. When CL is stopped at the low level CCB address 8 bits Display data 68 bits Control data 10 bits 2 bits CCB address 8 bits Display data 68 bits Fixed data 10 bits 2 bits DD DD CCB address 8 bits Display data 64 bits Fixed data 14 bits 2 bits CCB address 8 bits Display data 64 bits Fixed data 14 bits 2 bits DD DD Note: DD is the direction data. No. 4465-No. 5800-6/16 LC75874E, 75874W 2. When CL is stopped at the high level CCB address 8 bits Display data 68 bits Control data 10 bits 2 bits CCB address 8 bits Display data 68 bits Control data 10 bits 2 bits DD DD CCB address 8 bits Display data 64 bits Control data 14 bits 2 bits CCB address 8 bits Display data 64 bits Control data 14 bits 2 bits DD DD Note: DD is the direction data. • • • • • • CCB address......45H D1 to D264........Display data P0 to P3 .............Segment output port/general-purpose output port switching control data DR .....................1/2-bias drive or 1/3-bias drive switching control data SC......................Segments on/off control data BU .....................Normal mode/power-saving mode control data No. 4465-No. 5800-7/16 LC75874E, 75874W Serial Data Transfer Example 1. When 201 or more segments are used All 320 bits of serial data must be sent. 8 bits 80 bits 2. When fewer than 201 segments are used Either 80, 160 or 240 bits of serial data may be sent, depending on the number of segments used. However, the serial data shown below (the D1 to D68 display data and the control data) must be sent. 80 bits 8 bits Control Data Functions 1. P0 to P3: Segment output port/general-purpose output port switching control data These control data bits switch the segment output port/general-purpose output port functions of the S1/P1 to S8/P8 output pins. Control data Output pin state P0 P1 P2 P3 S1/P1 S2/P2 S3/P3 S4/P4 S5/P5 S6/P6 S7/P7 S8/P8 0 0 0 0 S1 S2 S3 S4 S5 S6 S7 S8 0 0 0 1 P1 S2 S3 S4 S5 S6 S7 S8 0 0 1 0 P1 P2 S3 S4 S5 S6 S7 S8 0 0 1 1 P1 P2 P3 S4 S5 S6 S7 S8 0 1 0 0 P1 P2 P3 P4 S5 S6 S7 S8 0 1 0 1 P1 P2 P3 P4 P5 S6 S7 S8 0 1 1 0 P1 P2 P3 P4 P5 P6 S7 S8 0 1 1 1 P1 P2 P3 P4 P5 P6 P7 S8 1 0 0 0 P1 P2 P3 P4 P5 P6 P7 P8 Note: Sn (n = 1 to 8): Segment output port function Pn (n = 1 to 8): General-purpose output port function Note that when the general-purpose output port function is selected, the correspondence between the output pins and the display data will be that shown in the table. Output pin Corresponding display data Output pin Corresponding display data S1/P1 D1 S5/P5 D17 S2/P2 D5 S6/P6 D21 S3/P3 D9 S7/P7 D25 S4/P4 D13 S8/P8 D29 For example, if the general-purpose output port function is selected for the S4/P4 output pin, that output pin will output a high level (VLCD) when the display data D13 is 1, and a low level (VSS) when the D13 is 0. No. 4465-No. 5800-8/16 LC75874E, 75874W 2. DR: 1/2-bias drive or 1/3-bias drive switching control data This control data bit selects either 1/2-bias drive or 1/3-bias drive. DR Drive scheme 0 1/3-bias drive 1 1/2-bias drive 3. SC: Segment on/off control data This control data controls the on/off state of the segments. SC Display state 0 On 1 Off Note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off waveforms from the segment output pins. 4. BU: Normal mode/power-saving mode control data This control data bit selects either normal mode or power-saving mode. BU Mode 0 Normal mode 1 Power saving mode. In this mode, the OSC pin oscillator is stopped and the common and segment output pins go to the V SS level. However, the S1/P1 to S8/P8 output pins can be used as general-purpose output ports under the control of the data bits P0 to P3. No. 4465-No. 5800-9/16 LC75874E, 75874W Display Data and Output Pin Correspondence COM1 COM2 COM3 COM4 COM1 COM2 COM3 S1/P1 Output pin D1 D2 D3 D4 S34 D133 D134 D135 D136 S2/P2 D5 D6 D7 D8 S35 D137 D138 D139 D140 Output pin COM4 S3/P3 D9 D10 D11 D12 S36 D141 D142 D143 D144 S4/P4 D13 D14 D15 D16 S37 D145 D146 D147 D148 S5/P5 D17 D18 D19 D20 S38 D149 D150 D151 D152 S6/P6 D21 D22 D23 D24 S39 D153 D154 D155 D156 S7/P7 D25 D26 D27 D28 S40 D157 D158 D159 D160 S8/P8 D29 D30 D31 D32 S41 D161 D162 D163 D164 S9 D33 D34 D35 D36 S42 D165 D166 D167 D168 S10 D37 D38 D39 D40 S43 D169 D170 D171 D172 S11 D41 D42 D43 D44 S44 D173 D174 D175 D176 S12 D45 D46 D47 D48 S45 D177 D178 D179 D180 S13 D49 D50 D51 D52 S46 D181 D182 D183 D184 S14 D53 D54 D55 D56 S47 D185 D186 D187 D188 S15 D57 D58 D59 D60 S48 D189 D190 D191 D192 S16 D61 D62 D63 D64 S49 D193 D194 D195 D196 S17 D65 D66 D67 D68 S50 D197 D198 D199 D200 S18 D69 D70 D71 D72 S51 D201 D202 D203 D204 S19 D73 D74 D75 D76 S52 D205 D206 D207 D208 S20 D77 D78 D79 D80 S53 D209 D210 D211 D212 S21 D81 D82 D83 D84 S54 D213 D214 D215 D216 S22 D85 D86 D87 D88 S55 D217 D218 D219 D220 S23 D89 D90 D91 D92 S56 D221 D222 D223 D224 S24 D93 D94 D95 D96 S57 D225 D226 D227 D228 S25 D97 D98 D99 D100 S58 D229 D230 D231 D232 S26 D101 D102 D103 D104 S59 D233 D234 D235 D236 S27 D105 D106 D107 D108 S60 D237 D238 D239 D240 S28 D109 D110 D111 D112 S61 D241 D242 D243 D244 S29 D113 D114 D115 D116 S62 D245 D246 D247 D248 S30 D117 D118 D119 D120 S63 D249 D250 D251 D252 S31 D121 D122 D123 D124 S64 D253 D254 D255 D256 S32 D125 D126 D127 D128 S65 D257 D258 D259 D260 S33 D129 D130 D131 D132 S66 D261 D262 D263 D264 Note: This table assumes that the segment output port function is selected for the S1/P1 to S8/P8 output pins. For example, the table below lists the output states for the S11 output pin. Display data D41 D42 D43 D44 Output pin (S11) state 0 0 0 0 The LCD segments corresponding to COM1, COM2, COM3, and COM4 are off. 0 0 0 1 The LCD segments corresponding to COM4 are on. 0 0 1 0 The LCD segments corresponding to COM3 are on. 0 0 1 1 The LCD segments corresponding to COM3 and COM4 are on. 0 1 0 0 The LCD segments corresponding to COM2 are on. 0 1 0 1 The LCD segments corresponding to COM2 and COM4 are on. 0 1 1 0 The LCD segments corresponding to COM2 and COM3 are on. 0 1 1 1 The LCD segments corresponding to COM2, COM3, and COM4 are on. 1 0 0 0 The LCD segments corresponding to COM1 are on. 1 0 0 1 The LCD segments corresponding to COM1 and COM4 are on. 1 0 1 0 The LCD segments corresponding to COM1 and COM3 are on. 1 0 1 1 The LCD segments corresponding to COM1, COM3, and COM4 are on. 1 1 0 0 The LCD segments corresponding to COM1 and COM2 are on. 1 1 0 1 The LCD segments corresponding to COM1, COM2, and COM4 are on. 1 1 1 0 The LCD segments corresponding to COM1, COM2, and COM3 are on. 1 1 1 1 The LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. No. 4465-No. 5800-10/16 LC75874E, 75874W 1/4-Duty 1/2-Bias Drive Scheme COM1 COM2 COM3 COM4 LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are off. LCD driver output when only LCD segments corresponding to COM1 are on (lit). LCD driver output when only LCD segments corresponding to COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM2 are on. LCD driver output when only LCD segments corresponding to COM3 are on. LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. LCD driver output when only LCD segments corresponding to COM4 are on. LCD driver output when LCD segments corresponding to COM2 and COM4 are on. LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. 1/4-Duty 1/2-Bias Waveforms No. 4465-No. 5800-11/16 LC75874E, 75874W 1/4-Duty 1/3-Bias Drive Scheme COM1 COM2 COM3 COM4 LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are off. LCD driver output when only LCD segments corresponding to COM1 are on (lit). LCD driver output when only LCD segments corresponding to COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM2 are on. LCD driver output when only LCD segments corresponding to COM3 are on. LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. LCD driver output when only LCD segments corresponding to COM4 are on. LCD driver output when LCD segments corresponding to COM2, and COM4 are on. LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. 1/4-Duty 1/3-Bias Waveforms No. 4465-No. 5800-12/16 LC75874E, 75874W Display Control and the INH Pin Since the LSI internal data (the display data D1 to D264 and the control data) is undefined when power is first applied, applications should prevent meaningless displays with the following procedure. First, set the INH pin low at the same time as power is applied to turn off the display. This will set the S1/P1 to S8/P8, S9 to S66, and COM1 to COM4 pins low. While the INH pin is held low, the control microprocessor should send the serial data. Finally, the application can set the INH pin to high. (See Figure 3.) Notes on Power Supply Sequences Applications must observe the following sequences when power is turned on or off. • Power on: Turn on the logic power supply (VDD) first → then turn on the LCD driver power supply (VLCD). • Power off: Turn off the LCD driver power supply (VLCD) first → then turn off the logic power supply (VDD). However, if the logic and LCD driver block use a shared power supply, then the power supplies can be turned on and off at the same time. Transfer of display and control data Internal data (D1 to D68, P0 to P3, DR, SC, BU) Undefined Defined Undefined Internal data (D69 to D136) Undefined Defined Undefined Internal data (D137 to D200) Undefined Defined Undefined Internal data (D201 to D264) Undefined Defined Notes: t1 ≥ 0 t2 > 0 t3 ≥ 0 (t2 > t3) tc ....... 10 µs min. Undefined Figure 3 Notes on Controller Transfer of Display Data Since the LC75874E and LC75874W accept the display data (D1 to D264) divided into four separate transfer operations, we recommend that applications make a point of completing all four data transfers within a period of less than 30 ms to prevent observable degradation of display quality. No. 4465-No. 5800-13/16 LC75874E, 75874W Sample Application Circuit 1 1/2 Bias (for normal LCD panels) General-purpose output ports Used for functions such as backlight control LCD panel (up to 264 segments) *2 C ≥ 0.047 µF From the controller Note: *2 When a capacitor except the recommended external capacitance (Cosc = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. Sample Application Circuit 2 1/2 Bias (for large LCD panels) General-purpose output ports 10 kΩ ≥ R ≥ 1 kΩ C ≥ 0.047 µF Used for functions such as backlight control LCD panel (up to 264 segments) *2 From the controller Note: *2 When a capacitor except the recommended external capacitance (Cosc = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. No. 4465-No. 5800-14/16 LC75874E, 75874W Sample Application Circuit 3 1/3 Bias (for nornal LCD panels) General-purpose output ports Used for functions such as backlight control LCD panel (up to 264 segments) *2 C ≥ 0.047 µF From the controller Note: *2 When a capacitor except the recommended external capacitance (Cosc = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. Sample Application Circuit 4 1/3 Bias (for large LCD panels) General-purpose output ports 10 kΩ ≥ R ≥ 1 kΩ C ≥ 0.047 µF Used for functions such as backlight control LCD panel (up to 264 segments) *2 From the controller Note: *2 When a capacitor except the recommended external capacitance (Cosc = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200 pF. No. 4465-No. 5800-15/16 LC75874E, 75874W ■ No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. ■ Anyone purchasing any products described or contained herein for an above-mentioned use shall: ➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. ■ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of March, 1998. Specifications and information herein are subject to change without notice. PS No. 5800-16/16