NSC LM3940IT-3.3

LM3940
1A Low Dropout Regulator for 5V to 3.3V Conversion
General Description
Features
The LM3940 is a 1A low dropout regulator designed to provide 3.3V from a 5V supply.
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The LM3940 is ideally suited for systems which contain both
5V and 3.3V logic, with prime power provided from a 5V bus.
Because the LM3940 is a true low dropout regulator, it can
hold its 3.3V output in regulation with input voltages as low
as 4.5V.
The T0-220 package of the LM3940 means that in most applications the full 1A of load current can be delivered without
using an additional heatsink.
The surface mount TO-263 package uses minimum board
space, and gives excellent power dissipation capability when
soldered to a copper plane on the PC board.
Output voltage specified over temperature
Excellent load regulation
Guaranteed 1A output current
Requires only one external component
Built-in protection against excess temperature
Short circuit protected
Applications
n Laptop/Desktop Computers
n Logic Systems
Typical Application
DS012080-1
*Required if regulator is located more than 1" from the power supply filter capacitor or if battery power is used.
**See Application Hints.
© 1999 National Semiconductor Corporation
DS012080
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LM3940 1A Low Dropout Regulator for 5V to 3.3V Conversion
May 1999
Connection Diagram/Ordering Information
DS012080-2
DS012080-3
3-Lead TO-220 Package
(Front View)
Order Part Number LM3940IT-3.3
NSC Drawing Number TO3B
3-Lead TO-263 Package
(Front View)
Order Part Number LM3940IS-3.3
NSC Drawing Number TS3B
DS012080-10
3-Lead SOT-223
(Front View)
Order Part Number LM3940IMP-3.3
Package Marked L52B
NSC Drawing Number MA04A
DS012080-27
DS012080-28
16-Lead Ceramic Dual-in-Line Package
(Top View)
Order Part Number LM3940J-3.3-QML
5962-9688401QEA
NSC Drawing Number J16A
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16-Lead Ceramic Surface-Mount Package
(Top View)
Order Part Number LM3940WG-3.3-QML
5962-9688401QXA
NSC Drawing Number WG16A
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Absolute Maximum Ratings (Note 1)
Operating Junction Temperature Range
−40˚C to +125˚C
Lead Temperature (Soldering, 5 seconds)
260˚C
Power Dissipation (Note 2)
Internally Limited
Input Supply Voltage
7.5V
ESD Rating (Note 3)
2 kV
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature Range
−65˚C to +150˚C
Electrical Characteristics
Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = 5V, IL = 1A, COUT = 33 µF.
Symbol
VO
Parameter
Output Voltage
Line Regulation
Conditions
5 mA ≤ IL ≤ 1A
Typical
3.3
IL = 5 mA
LM3940 (Note 4)
min
max
3.20
3.40
3.13
3.47
20
40
35
50
Units
V
mV
4.5V ≤ VO ≤ 5.5V
Load Regulation
50 mA ≤ IL ≤ 1A
Output Impedance
IL (DC) = 100 mA
IL (AC) = 20 mA (rms)
f = 120 Hz
80
ZO
IQ
en
VO − VIN
Quiescent Current
4.5V ≤ VIN ≤ 5.5V
IL = 5 mA
VIN = 5V
35
mΩ
10
15
mA
20
110
Output Noise Voltage
IL = 1A
BW = 10 Hz–100 kHz
IL = 5 mA
150
Dropout Voltage
IL = 1A
0.5
200
250
µV (rms)
0.8
(Note 5)
V
1.0
IL = 100 mA
110
150
mV
200
IL(SC)
Short Circuit Current
RL = 0
1.7
1.2
A
Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions.
Note 2: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ, the junction-to-ambient thermal resistance, θJ−A, and the
ambient temperature, TA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.
The value of θJ−A (for devices in still air with no heatsink) is 60˚C/W for the TO-220 package, 80˚C/W for the TO-263 package, and 174˚C/W for the SOT-223 package.
The effective value of θJ−A can be reduced by using a heatsink (see Application Hints for specific information on heatsinking).
Note 3: ESD rating is based on the human body model: 100 pF discharged through 1.5 kΩ.
Note 4: All limits guaranteed for TJ = 25˚C are 100% tested and are used to calculate Outgoing Quality Levels. All limits at temperature extremes are guaranteed
via correlation using standard Statistical Quality Control (SQC) methods.
Note 5: Dropout voltage is defined as the input-output differential voltage where the regulator output drops to a value that is 100 mV below the value that is measured
at VIN = 5V.
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Typical Performance Characteristics
Dropout Voltage
Dropout Voltage
vs Temperature
Output Voltage
vs Temperature
DS012080-13
DS012080-15
DS012080-14
Quiescent Current
vs Temperature
Quiescent Current vs Load
Quiescent Current vs VIN
DS012080-18
DS012080-17
DS012080-16
Line Transient Response
Load Transient Response
Ripple Rejection
DS012080-20
DS012080-19
DS012080-21
Low Voltage Behavior
Output Impedance
DS012080-22
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Peak Output Current
DS012080-23
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DS012080-24
Application Hints
The figure below shows the voltages and currents which are
present in the circuit, as well as the formula for calculating
the power dissipated in the regulator:
EXTERNAL CAPACITORS
The output capacitor is critical to maintaining regulator stability, and must meet the required conditions for both ESR
(Equivalent Series Resistance) and minimum amount of capacitance.
MINIMUM CAPACITANCE:
The minimum output capacitance required to maintain stability is 33 µF (this value may be increased without limit).
Larger values of output capacitance will give improved transient response.
ESR LIMITS:
The ESR of the output capacitor will cause loop instability if
it is too high or too low. The acceptable range of ESR plotted
versus load current is shown in the graph below. It is essential that the output capacitor meet these requirements,
or oscillations can result.
DS012080-6
IIN = IL + IG
PD = (VIN − VOUT) IL + (VIN) IG
FIGURE 2. Power Dissipation Diagram
The next parameter which must be calculated is the maximum allowable temperature rise, TR (max). This is calculated by using the formula:
TR (max) = TJ (max) − TA (max)
Where: TJ (max) is the maximum allowable junction temperature, which is 125˚C for commercial
grade parts.
TA (max) is the maximum ambient temperature
which will be encountered in the application.
Using the calculated values for TR(max) and PD, the maximum allowable value for the junction-to-ambient thermal resistance, θ(J−A), can now be found:
θ(J−A) = TR (max)/PD
IMPORTANT: If the maximum allowable value for θ(J−A) is
found to be ≥ 60˚C/W for the TO-220 package, ≥ 80˚C/W for
the TO-263 package, or ≥174˚C/W for the SOT-223 package, no heatsink is needed since the package alone will dissipate enough heat to satisfy these requirements.
If the calculated value for θ(J−A)falls below these limits, a
heatsink is required.
DS012080-5
FIGURE 1. ESR Limits
It is important to note that for most capacitors, ESR is specified only at room temperature. However, the designer must
ensure that the ESR will stay inside the limits shown over the
entire operating temperature range for the design.
For aluminum electrolytic capacitors, ESR will increase by
about 30X as the temperature is reduced from 25˚C to
−40˚C. This type of capacitor is not well-suited for low temperature operation.
Solid tantalum capacitors have a more stable ESR over temperature, but are more expensive than aluminum electrolytics. A cost-effective approach sometimes used is to parallel
an aluminum electrolytic with a solid Tantalum, with the total
capacitance split about 75/25% with the Aluminum being the
larger value.
If two capacitors are paralleled, the effective ESR is the parallel of the two individual values. The “flatter” ESR of the Tantalum will keep the effective ESR from rising as quickly at low
temperatures.
HEATSINKING TO-220 PACKAGE PARTS
The TO-220 can be attached to a typical heatsink, or secured to a copper plane on a PC board. If a copper plane is
to be used, the values of θ(J−A) will be the same as shown in
the next section for the TO-263.
HEATSINKING
A heatsink may be required depending on the maximum
power dissipation and maximum ambient temperature of the
application. Under all possible operating conditions, the junction temperature must be within the range specified under
Absolute Maximum Ratings.
To determine if a heatsink is required, the power dissipated
by the regulator, PD, must be calculated.
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Application Hints
As a design aid, Figure 4 shows the maximum allowable
power dissipation compared to ambient temperature for the
TO-263 device (assuming θ(J−A) is 35˚C/W and the maximum junction temperature is 125˚C).
(Continued)
If a manufactured heatsink is to be selected, the value of
heatsink-to-ambient thermal resistance, θ(H−A), must first be
calculated:
θ(H−A) = θ(J−A) − θ(C−H) − θ(J−C)
Where: θ(J−C)
is defined as the thermal resistance from
the junction to the surface of the case. A
value of 4˚C/W can be assumed for θ(J−C)
for this calculation.
is defined as the thermal resistance beθ(C−H)
tween the case and the surface of the heatsink. The value of θ(C−H) will vary from
about 1.5˚C/W to about 2.5˚C/W (depending on method of attachment, insulator,
etc.). If the exact value is unknown, 2˚C/W
should be assumed for θ(C−H).
When a value for θ(H−A) is found using the equation shown,
a heatsink must be selected that has a value that is less than
or equal to this number.
DS012080-8
FIGURE 4. Maximum Power Dissipation vs TAMB for
the TO-263 Package
Figure 5 and Figure 6 show the information for the SOT-223
package. Figure 6 assumes a θ(J−A) of 74˚C/W for 1 ounce
copper and 51˚C/W for 2 ounce copper and a maximum
junction temperature of 125˚C.
θ(H−A) is specified numerically by the heatsink manufacturer
in the catalog, or shown in a curve that plots temperature rise
vs power dissipation for the heatsink.
HEATSINKING TO-263 AND SOT-223 PACKAGE PARTS
Both the TO-263 (“S”) and SOT-223 (“MP”) packages use a
copper plane on the PCB and the PCB itself as a heatsink.
To optimize the heat sinking ability of the plane and PCB,
solder the tab of the package to the plane.
Figure 3 shows for the TO-263 the measured values of θ(J−A)
for different copper area sizes using a typical PCB with 1
ounce copper and no solder mask over the copper area used
for heatsinking.
DS012080-11
FIGURE 5. θ(J−A) vs Copper (2 ounce) Area for the
SOT-223 Package
DS012080-7
FIGURE 3. θ(J−A) vs Copper (1 ounce) Area for the
TO-263 Package
As shown in the figure, increasing the copper area beyond 1
square inch produces very little improvement. It should also
be observed that the minimum value of θ(J−A) for the TO-263
package mounted to a PCB is 32˚C/W.
DS012080-12
FIGURE 6. Maximum Power Dissipation vs TAMB for
the SOT-223 Package
Please see AN1028 for power enhancement techniques to
be used with the SOT-223 package.
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Physical Dimensions
inches (millimeters) unless otherwise noted
3-Lead SOT-223 Package
Order Part Number LM3940IMP-3.3
NSC Package Number MA04A
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
3-Lead TO-220 Package
Order Part Number LM3940IT-3.3
NSC Package Number TO3B
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
3-Lead TO-263 Package
Order Part Number LM3940IS-3.3
NSC Package Number TS3B
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Ceramic Dual-in-Line Package
Order Part Number LM3940J-3.3-QML
5962-9688401QEA
NSC Drawing Number J16A
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10
LM3940 1A Low Dropout Regulator for 5V to 3.3V Conversion
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Ceramic Surface-Mount Package
Order Part Number LM3940WG-3.3-QML
5962-9688401QXA
NSC Package Number WG16A
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