LINER LTC3576

LTC3576/LTC3576-1
Switching Power Manager
with USB On-the-Go + Triple
Step-Down DC/DCs
DESCRIPTION
FEATURES
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The LTC®3576/LTC3576-1 are highly integrated power
management and battery charger ICs for Li-Ion/Polymer
battery applications. They each include a high efﬁciency,
bidirectional switching PowerPath™ manager with automatic load prioritization, a battery charger, an ideal diode, a
controller for an external high voltage switching regulator
and three general purpose step-down switching regulators
with I2C adjustable output voltages. The internal switching regulators automatically limit input current for USB
compatibility and can also generate 5V at 500mA for USB
on-the-go applications when powered from the battery.
Both the USB and external switching regulator power paths
feature Bat-Track optimized charging to provide maximum
power to the application from supplies as high as 38V. An
overvoltage circuit protects the LTC3576/LTC3576-1 from
damage due to high voltage on the VBUS or WALL pins with
just two external components. The LTC3576/LTC3576-1 are
available in a low proﬁle 38-pin (4mm × 6mm × 0.75mm)
QFN package.
Bidirectional Switching Regulator with BatTrack™ Adaptive Output Control Provides Efﬁcient
Charging and a 5V Output for USB On-The-Go
Bat-Track Control of External High Voltage StepDown Switching Regulator
Overvoltage Protection Guards Against Damage
“Instant-On” Operation with Discharged Battery
Triple Step-Down Switching Regulators with I2C
Adjustable Outputs (1A/400mA/400mA IOUT)
180mΩ Internal Ideal Diode + External Ideal Diode
Controller Powers the Load in Battery Mode
Li-Ion/Polymer Battery Charger (1.5A Max ICHG)
Battery Float Voltage: 4.2V (LTC3576), 4.1V (LTC3576-1)
Compact (4mm × 6mm × 0.75mm) 38-pin QFN Package
APPLICATIONS
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HDD-Based Media Players
GPS, PDAs, Digital Cameras, Smart Phones
Automotive Compatible Portable Electronics
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Bat-Track
and PowerPath are trademarks of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6522118, 6404251.
TYPICAL APPLICATION
High Efﬁciency PowerPath Manager with Overvoltage Protection
and Triple Step-Down Regulator
AUTOMOTIVE
FIREWIRE, ETC.
PowerPath Switching Regulator Efﬁciency
to System Load (PVOUT/PVBUS)
LT3653
USB OR
5V AC
ADAPTER
OVERVOLTAGE
PROTECTION
EXTERNAL HIGH VOLTAGE
BUCK CONTROLLER
100
90
TO OTHER
LOADS
CC/CV
BATTERY
CHARGER
CHARGE
80
EFFICIENCY (%)
USB COMPLIANT
BIDIRECTIONAL
SWITCHING
REGULATOR
OPTIONAL
0V
BAT = 3.3V
60
50
40
30
+
LTC3576/LTC3576-1
BAT = 4.2V
70
Li-Ion
T
20
VBUS = 5V
IBAT = 0mA
10x MODE
10
3.3V/20mA
ALWAYS ON LDO
ENABLE
CONTROLS
6
TRIPLE
HIGH EFFICIENCY
STEP-DOWN
SWITCHING
REGULATORS
I2C PORT
1
2
3
0.8V TO 3.6V/400mA
0.8V TO 3.6V/400mA
0.8V TO 3.6V/1A
RST
2
RTC/LOW
POWER LOGIC
MEMORY
0
10
100
LOAD CURRENT (mA)
1000
3576 TA01b
I/O
CORE
μPROCESSOR
I 2C
3576 TA01
3576f
1
LTC3576/LTC3576-1
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2, 3)
VBUS, WALL (Transient) t < 1ms,
Duty Cycle < 1% .......................................... –0.3V to 7V
VBUS, WALL (Static), BAT, VIN1, VIN2, VIN3,
VOUT, ENOTG, NTC, SDA, SCL, DVCC,
RST3, CHRG ................................................ –0.3V to 6V
ILIM0, IILIM1 .........–0.3V to Max(VBUS, VOUT, BAT) + 0.3V
EN1, EN2, EN3 ...............................–0.3V to VOUT + 0.3V
FBx (x = 1, 2, 3) ..............................–0.3V to VINx + 0.3V
IOVSENS...................................................................10mA
ICLPROG ....................................................................3mA
ICHRG, IRST3 ............................................................50mA
IPROG ........................................................................2mA
ILDO3V3 ...................................................................30mA
ISW1, ISW2 (Continuous) .......................................600mA
ISW, ISW3, IBAT, IVOUT (Continuous) ..............................2A
Maximum Junction Temperature........................... 125°C
Operating Temperature Range.................. –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
BAT
VOUT
VBUS
VBUS
SW
ILIM0
ILIM1
TOP VIEW
38 37 36 35 34 33 32
CLPROG 1
31 IDGATE
LDO3V3 2
30 CHRG
NTCBIAS 3
29 PROG
NTC 4
28 ACPR
OVGATE 5
27 WALL
OVSENS 6
26 VC
39
FB1 7
25 FB2
VIN1 8
24 VIN2
SW1 9
23 SW2
EN1 10
22 EN2
21 RST3
ENOTG 11
20 FB3
DVCC 12
EN3
NC
SW3
VIN3
NC
SCL
SDA
13 14 15 16 17 18 19
UFE PACKAGE
38-LEAD (4mm s 6mm) PLASTIC QFN
TJMAX = 125°C, θJA = 34°C/W
EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3576EUFE#PBF
LTC3576EUFE#TRPBF
3576
38-Lead (4mm × 6mm) Plastic QFN
–40°C to 85°C
LTC3576EUFE-1#PBF
LTC3576EUFE-1#TRPBF
35761
38-Lead (4mm × 6mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based ﬁnish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the speciﬁcations which apply over the full operating
temperature range, otherwise speciﬁcations are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PowerPath Switching Regulator—Step-Down Mode
VBUS
Input Supply Voltage
IVBUS(LIM)
Total Input Current
1× Mode
5× Mode
10× Mode
Low Power Suspend Mode
High Power Suspend Mode
IVBUSQ (Note 4)
Input Quiescent Current
1× Mode
5×, 10× Modes
Low/High Power Suspend Modes
4.35
l
l
l
l
l
82
440
800
0.32
1.6
5.5
90
472
880
0.39
2.05
7
17
0.045
100
500
1000
0.5
2.5
V
mA
mA
mA
mA
mA
mA
mA
mA
3576f
2
LTC3576/LTC3576-1
ELECTRICAL CHARACTERISTICS
The l denotes the speciﬁcations which apply over the full operating
temperature range, otherwise speciﬁcations are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
hCLPROG
(Note 4)
Ratio of Measured VBUS Current to
CLPROG Program Current
1x Mode
5x Mode
10x Mode
Low Power Suspend Mode
High Power Suspend Mode
210
1160
2200
9.6
56
mA/mA
mA/mA
mA/mA
mA/mA
mA/mA
1x Mode, BAT = 3.3V
5x Mode, BAT = 3.3V
10x Mode, BAT = 3.3V
Low Power Suspend Mode
High Power Suspend Mode
121
667
1217
0.31
2
mA
mA
mA
mA
mA
IVOUT(POWERPATH) VOUT Current Available Before
Discharging Battery
VCLPROG
CLPROG Servo Voltage in Current Limit
Switching Modes
Suspend Modes
VUVLO
VBUS Undervoltage Lockout
Rising Threshold
Falling Threshold
VDUVLO
VBUS to BAT Differential Undervoltage
Lockout
Rising Threshold
Falling Threshold
VOUT
VOUT Voltage
1x, 5x, 10x Modes, 0V < BAT < 4.2V,
IVOUT = 0mA, Battery Charger Off
USB Suspend Modes, IVOUT = 250μA
MIN
0.26
1.6
TYP
MAX
0.41
2.4
1.18
100
3.95
4.30
4.00
UNITS
V
mV
4.35
200
50
V
V
mV
mV
3.4
4.5
BAT + 0.3
4.6
4.7
4.7
V
V
1.8
2.25
2.7
MHz
fOSC
Switching Frequency
RPMOS_
PMOS On-Resistance
0.18
Ω
NMOS On-Resistance
0.30
Ω
POWERPATH
RNMOS_
POWERPATH
IPEAK_POWERPATH Peak Inductor Current Limit
1x Mode (Note 5)
5x Mode (Note 5)
10x Mode (Note 5)
1
2
3
A
A
A
RSUSP
Closed Loop
10
Ω
Suspend LDO Output Resistance
PowerPath Switching Regulator—Step-Up Mode (USB On-the-Go)
VBUS
Output Voltage
VOUT
Input Voltage
IVBUS
Output Current Limit
VBUS Leakage Current in Shutdown
0mA ≤ IVBUS ≤ 500mA, VOUT > 3.2V
l
On-the-Go Disabled, VBUS < UVLO
4.75
5.25
V
2.9
5.5
V
150
mA
nA
550
–150
680
0
IPEAK
Peak Inductor Current Limit
(Note 5)
1.8
A
IOTGQ
VOUT Quiescent Current
VOUT = 3.8V, IVBUS = 0mA (Note 6)
1.38
mA
VCLPROG
Output Current Limit Servo Voltage
1.15
V
VOUT(UVLO)
VOUT UVLO—VOUT Falling
VOUT UVLO—VOUT Rising
tSCFAULT
Short-Circuit Fault Delay
2.5
VBUS < 4V and PMOS Switch Off
2.6
2.8
2.9
7.2
V
V
ms
Bat-Track Switching Regulator Control
VWALL
Absolute WALL Input Threshold
Rising Threshold
Hysteresis
4.2
4.3
1.1
4.4
V
V
ΔVWALL
Differential WALL Input Threshold
WALL-BAT Falling
Hysteresis
0
30
60
45
mV
mV
VOUT
Regulation Target Under VC Control
3.55
BAT + 0.3
V
IWALLQ
WALL Quiescent Current
100
μA
RACPR
ACPR Pull-Down Strength
100
Ω
VHACPR
ACPR High Voltage
VOUT
V
VLACPR
ACPR Low Voltage
0
V
3576f
3
LTC3576/LTC3576-1
ELECTRICAL CHARACTERISTICS
The l denotes the speciﬁcations which apply over the full operating
temperature range, otherwise speciﬁcations are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
6.1
6.35
1.88•VOVSENS
0
1.25
6.7
12
OVGATE Time to Reach Regulation
With 6.2k Series Resistor
VOVSENS < VOVCUTOFF
VOVSENS > VOVCUTOFF
OVGATE CLOAD = 1nF
V
V
V
ms
BAT Regulated Output Voltage
LTC3576
4.179
4.165
4.079
4.065
980
185
4.200
4.200
4.100
4.100
1030
206
3.6
4.221
4.235
4.121
4.135
1065
223
6
V
V
V
V
mA
mA
μA
28
45
μA
Overvoltage Protection
Overvoltage Protection Threshold
VOVCUTOFF
OVGATE Output Voltage
VOVGATE
tRISE
Battery Charger
VFLOAT
LTC3576-1
ICHG
Constant Current Mode Charger Current
IBAT
Battery Drain Current
VPROG
VPROG_TRKL
VC/10
hPROG
ITRKL
VTRKL
ΔVTRKL
ΔVRECHRG
tTERM
tBADBAT
hC/10
VCHRG
ICHRG
RON_CHG
TLIM
NTC
VCOLD
RPROG = 1k
RPROG = 5k
VBUS > VUVLO, Suspend Mode,
IVOUT = 0μA
VBUS = 0V, IVOUT = 0μA
(Ideal Diode Mode)
PROG Pin Servo Voltage
PROG Pin Servo Voltage in Trickle Charge BAT < VTRKL
C/10 Threshold Voltage at PROG
Ratio of IBAT to PROG Pin Current
Trickle Charge Current
BAT < VTRKL, RPROG = 1k
Trickle Charge Threshold Voltage
BAT Rising
Trickle Charge Hysteresis Voltage
Recharge Battery Threshold Voltage
Threshold Voltage Relative to VFLOAT
Safety Timer Termination Period
Bad Battery Termination Time
End of Charge Current Ratio
CHRG Pin Output Low Voltage
CHRG Pin Leakage Current
Battery Charger Power FET OnResistance (Between VOUT and BAT)
Junction Temperature in Constant
Temperature Mode
Timer Starts When VBAT = VFLOAT
BAT < VTRKL
(Note 7)
ICHRG = 5mA
VCHRG = 5V
Cold Temperature Fault Threshold Voltage Rising Threshold
Hysteresis
VHOT
Hot Temperature Fault Threshold Voltage
VDIS
NTC Disable Threshold Voltage
INTC
Ideal Diode
VFWD
RDROPOUT
IMAX_DIODE
NTC Leakage Current
Forward Voltage
Internal Diode On-Resistance Dropout
Diode Current Limit
Falling Threshold
Hysteresis
Falling Threshold
Hysteresis
NTC = NTCBIAS = 5V
l
l
2.7
1.000
0.100
100
1030
100
2.85
135
3.0
UNITS
V
V
mV
mA/mA
mA
V
mV
–75
–100
–125
mV
3.3
0.4
0.085
4
0.5
0.1
65
5
0.6
0.112
100
1
0.18
Hour
Hour
mA/mA
mV
μA
Ω
110
°C
75
76.5
1.5
78
%NTCBIAS
%NTCBIAS
33.4
34.9
1.5
1.7
50
36.4
%NTCBIAS
%NTCBIAS
%NTCBIAS
mV
nA
0.7
–50
IVOUT = 10mA
IVOUT = 200mA
50
15
0.18
2
2.7
mV
Ω
A
3576f
4
LTC3576/LTC3576-1
ELECTRICAL CHARACTERISTICS
The l denotes the speciﬁcations which apply over the full operating
temperature range, otherwise speciﬁcations are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
0mA < ILDO3V3 < 20mA
3.1
3.3
3.5
UNITS
Always On 3.3V LDO Supply
VLDO3V3
Regulated Output Voltage
RCL_LDO3V3
Closed-Loop Output Resistance
2.7
Ω
ROL_LDO3V3
Dropout Output Resistance
23
Ω
V
Logic (ILIM0, ILIM1, EN1, EN2, EN3, ENOTG, and SCL, SDA when DVCC = 0V)
VIL
Logic Low Input Voltage
VIH
Logic High Input Voltage
IPD1
ILIM0, ILIM1, EN1, EN2, EN3, ENOTG, SCL,
SDA Pull-Down Current
0.4
1.2
V
V
2
μA
I2C Port
DVCC
Input Supply
IDVCC
DVCC Current
VDVCC(UVLO)
DVCC UVLO
ADDRESS
I2C Address
VIH, SDA, SCL
Input High Threshold
1.6
SCL/SDA = 0kHz, DVCC = 3.3V
5.5
V
0.5
μA
1.0
V
0001001[0]
70
%DVCC
VIL, SDA, SCL
Input Low Threshold
IPD2, SDA, SCL
Pull-Down Current
30
VOL
Digital Output Low (SDA)
fSCL
Clock Operating Frequency
tBUF
Bus Free Time Between Stop and Start
Condition
1.3
μs
tHD_STA
Hold Time After (Repeated) Start
Condition
0.6
μs
tSU_STA
Repeated Start Condition Setup Time
0.6
μs
tSU_STO
Stop Condition Setup Time
0.6
μs
tHD_DAT(O)
Data Hold Time Output
0
tHD_DAT(I)
Data Hold Time Input
0
ns
tSU_DAT
Data Setup Time
100
ns
tLOW
SCL Low Period
1.3
μs
tHIGH
SCL High Period
0.6
tf
SDA/SCL Fall Time
20
300
ns
tr
SDA/SCL Rise Time
20
300
ns
tSP
Input Spike Suppression Pulse Width
50
ns
5.5
V
2.6
2.8
2.9
V
V
2.25
2.7
MHz
50
nA
2
ISDA = 3mA
%DVCC
μA
0.4
V
400
kHz
900
ns
μs
General Purpose Switching Regulators 1, 2 and 3
VIN1,2,3
Input Supply Voltage
(Note 8)
2.7
VOUT(UVLO)
VOUT UVLO—VOUT Falling
VOUT UVLO—VOUT Rising
VIN1,2,3 Connected to VOUT Through
Low Impedance. Switching
Regulators are Disabled in UVLO
2.5
VFB1,2,3 = 0.85V
–50
fOSC
Switching Frequency
IFB1,2,3
FBx Input Current
D1,2,3
Maximum Duty Cycle
RSW1,2,3_PD
SWx Pull-Down in Shutdown
1.8
100
%
10
kΩ
3576f
5
LTC3576/LTC3576-1
ELECTRICAL CHARACTERISTICS
The l denotes the speciﬁcations which apply over the full operating
temperature range, otherwise speciﬁcations are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
IVIN1,2,3
Pulse Skip Mode Input Current
IOUT1,2,3 = 0μA (Note 9)
MIN
90
®
Burst Mode Input Current
IOUT1,2,3 = 0μA (Note 9)
20
35
μA
LDO Mode Input Current
IOUT1,2,3 = 0μA (Note 9)
15
25
μA
1
μA
0.78
0.80
0.82
V
0.405
0.425
0.445
Shutdown Input Current Limit
IOUT1,2,3 = 0μA, FB1,2,3 = 0V
VFBHIGH1,2,3
Maximum Servo Voltage
Full Scale (1,1,1,1) (Note 10)
VFBLOW1,2,3
Minimum Servo Voltage
Zero Scale (0,0,0,0) (Note 10)
VLSB1,2,3
VFB1,2 Servo Voltage Step Size
RLDO_CL1,2,3
LDO Mode Closed-Loop ROUT
RLDO_OL1,2,3
LDO Mode Open-Loop ROUT
l
TYP
MAX
UNITS
μA
V
25
mV
VFB1,2,3 = VOUT1,2 3 = 0.8V
0.25
Ω
(Note 11)
2.5
Ω
General Purpose Switching Regulator 1 and 2
ILIM1,2
PMOS Switch Current Limit
Pulse Skip/Burst Mode Operation
(Note 5)
600
IOUT1,2
Available Output Current
LDO Mode
50
RP1,2
PMOS RDS(ON)
0.6
Ω
RN1,2
NMOS RDS(ON)
0.7
Ω
900
1300
mA
mA
General Purpose Switching Regulator 3
ILIM3
PMOS Switch Current Limit
Pulse Skip/Burst Mode Operation
(Note 5)
IOUT3
Available Output Current
LDO Mode
RP3
PMOS RDS(0N)
RN3
NMOS RDS(ON)
tRST3
Power-On Reset Time for Switching
Regulator
1300
1800
50
mA
mA
0.18
VFB3 Within 92% of Final Value to
RST3 Hi-Z
2800
Ω
0.3
Ω
230
ms
Burst Mode is a registered trademark of Linear Technology Corporation.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3576E/LTC3576E-1 are guaranteed to meet performance
speciﬁcations from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: The LTC3576E/LTC3576E-1 include overtemperature protection
that is intended to protect the device during momentary overload
conditions. Junction temperature will exceed 125°C when overtemperature
protection is active. Continuous operation above the speciﬁed maximum
operating junction temperature may impair device reliability.
Note 4: Total input current is the sum of quiescent current, IVBUSQ, and
measured current given by VCLPROG/RCLPROG • (hCLPROG + 1).
Note 5: The current limit features of this part are intended to protect the
IC from short term or intermittent fault conditions. Continuous operation
above the maximum speciﬁed pin current rating may result in device
degradation or failure.
Note 6: The bidirectional switcher’s supply current is bootstrapped to VBUS
and in the application will reﬂect back to VOUT by (VBUS/VOUT) •
1/efﬁciency. Total quiescent current is the sum of the current into the
VOUT pin plus the reﬂected current.
Note 7: hC/10 is expressed as a fraction of the measured full charge
current with indicated PROG resistor.
Note 8: VOUT not in UVLO.
Note 9: FBx above regulation such that regulator is in sleep. Speciﬁcation
does not include resistive divider current reﬂected back to VINx.
Note 10: Applies to pulse skip and Burst Mode operation only.
Note 11: Inductor series resistance adds to open-loop ROUT.
3576f
6
LTC3576/LTC3576-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise speciﬁed.
1.0
0.20
INTERNAL IDEAL
DIODE ONLY
0.4
0.2
4.25
INTERNAL IDEAL
DIODE
0.15
VOUT (V)
0.6
0
4.50
BAT = 4V
RESISTANCE (Ω)
0.10
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
0.05
BAT = 3.4V
3.75
VBUS = 5V
0
0.04
0.12
0.16
0.08
FORWARD VOLTAGE (V)
0
2.7
0.20
3.0
3.6
3.9
3.3
BATTERY VOLTAGE (V)
3576 G01
3.25
4.2
3576 G03
Battery and VBUS Currents
vs Load Current
Battery Charge Current vs
Temperature
750
600
VBUS = 5V
5x MODE
VBUS CURRENT
500
700
CURRENT (mA)
600
500
400
300
200
250
BATTERY CURRENT
(CHARGING)
0
–250
100
–500
0
2.7
3.0
3.9
3.6
3.3
BATTERY VOLTAGE (V)
4.2
VBUS = 5V
BAT = 3.8V
5x MODE
RCLPROG = 3.01k BATTERY CURRENT
RPROG = 1k
(DISCHARGING)
THERMAL REGULATION
300
200
0
–40 –20
0
20 40 60 80
TEMPERATURE (°C)
Battery Charging Efﬁciency vs
Battery Voltage with No External
Load (PBAT/PVBUS)
PowerPath Switching Regulator
Efﬁciency vs Load Current
VOUT
50mV/DIV
AC COUPLED
100
95
90
90
1x MODE
RCLPROG = 3.01k
RPROG = 1k
85
80
EFFICIENCY (%)
100 120
3576 G06
3576 G05
PowerPath Switching Regulator
Transient Response
0mA
400
100
0 100 200 300 400 500 600 700 800 900 1000
LOAD CURRENT (mA)
3576 G04
IVOUT
500mA/DIV
RPROG = 2k
500
CHARGE CURRENT (mA)
900
800
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
LOAD CURRENT (A)
0
3576 G02
USB Limited Load Current vs Battery
Voltage (Battery Charger Disabled)
LOAD CURRENT (mA)
4.00
3.50
5x, 10x MODE
EFFICIENCY (%)
CURRENT (A)
0.25
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
0.8
VOUT Voltage vs Load Current
(Battery Charger Disabled)
Ideal Diode Resistance
vs Battery Voltage
Ideal Diode V-I Characteristics
70
60
50
1x MODE
80
75
70
65
5x MODE
60
VBUS = 5V
VOUT = 3.65V
CHARGER OFF
10x MODE
20μs/DIV
3576 G07
40
55
30
10
100
LOAD CURRENT (mA)
1000
3576 G08
50
2.7
3.0
3.9
3.6
3.3
BATTERY VOLTAGE (V)
4.2
3576 G09
3576f
7
LTC3576/LTC3576-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise speciﬁed.
VBUS Quiescent Current vs
VBUS Voltage (Suspend)
VOUT Voltage vs Load Current in
Suspend
60
5.0
4.5
VOUT (V)
40
30
4.0
3.5
LOW POWER SUSPEND
20
3.0
10
0
0
1
2
3
BUS VOLTAGE (V)
2.5
5
4
0.5
0
HIGH POWER
SUSPEND
1.0
1.5
2.0
1.0
LOAD CURRENT (mA)
0
2.5
0
0.5
1.5
2.0
1.0
LOAD CURRENT (mA)
Normalized Battery Charger Float
Voltage vs Temperature
1.001
4.7
VBUS = 5V
IVOUT = 0V
RCLPROG = 3.01k
RPROG = 1k
4.5
4.3
NORMALIZED FLOAT VOLTAGE
RCLPROG = 3.01k
RPROG = 2k
5x MODE
4.1
VOUT (V)
400
200
3.9
5x MODE
3.7
3.5
1x MODE
3.3
3.1
100
2.5
3576 G12
VOUT Voltage vs Battery Voltage
(Charger Overprogrammed)
300
LOW POWER SUSPEND
3576 G11
Battery Charge Current vs VOUT
Voltage
500
1.5
0.5
VBUS = 5V
BAT = 3.3V
RCLPROG = 3.01k
3576 G10
600
VBUS = 5V
BAT = 3.3V
RCLPROG = 3.01k
2.0
VBUS CURRENT (mA)
QUIESCENT CURRENT (μA)
2.5
HIGH POWER SUSPEND
50
BATTERY CURRENT (mA)
VBUS Current vs Load Current in
Suspend
1.000
0.999
0.998
0.997
2.9
0
3.40 3.45 3.50 3.55 3.60 3.65 3.70 3.75 3.80
VOUT (V)
2.7
2.7
3.0
3.6
3.9
3.3
BATTERY VOLTAGE (V)
3576 G13
60
VBUS = 5V
15
10
1x MODE
5
35
10
TEMPERATURE (°C)
60
85
40
30
20
3576 G16
0
–40
85
30
10
–15
60
35
VBUS = 5V
BATTERY CURRENT (μA)
QUIESCENT CURRENT (μA)
5x MODE
35
10
TEMPERATURE (°C)
Battery Drain Current vs
Temperature
50
20
–15
3576 G15
VBUS Quiescent Current in
Suspend vs Temperature
25
QUIESCENT CURRENT (mA)
0.996
–40
3576 G14
VBUS Quiescent Current vs
Temperature
0
–40
4.2
25
20
15
10
BAT = 3.8V
VBUS = 0V
SWITCHING
REGULATORS OFF
5
–15
10
35
TEMPERATURE (°C)
60
85
0
–40
–15
10
35
60
85
TEMPERATURE (°C)
3576 G17
3576 G18
3576f
8
LTC3576/LTC3576-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise speciﬁed.
OTG Boost Quiescent Current
vs VOUT Voltage
OTG Boost Efﬁciency
vs Load Current
OTG Boost VBUS Voltage
vs Load Current
2.5
5.5
100
2.1
90
5.0
1.9
1.5
1.3
VBUS = 4.75V
4.5
EFFICIENCY (%)
1.7
VBUS (V)
QUIESCENT CURRENT (mA)
2.3
IVBUS = 500mA
4.0
1.1
0.9
VOUT = 5V
VOUT = 4.4V
VOUT = 3.8V
VOUT = 3.2V
3.5
0.7
0.5
2.90
3.55
4.20
VOUT (V)
4.85
3.0
5.50
0
70
60
VOUT = 5V
VOUT = 4.4V
VOUT = 3.8V
VOUT = 3.2V
50
200 300 400 500
LOAD CURRENT (mA)
100
80
40
700
600
1
10
100
LOAD CURRENT (mA)
3576 G20
3576 G19
3576 G21
OTG Boost Start-Up Time into
Current Source Load vs VOUT
Voltage
OTG Boost Efﬁciency
vs VOUT Voltage
OTG Boost Burst Mode Current
Threshold vs VOUT Voltage
400
2.50
95
1000
100mA LOAD
TIME (ms)
EFFICIENCY (%)
22μF ON VBUS, 22μF AND
LOAD THROUGH OVP
2.25
85
80
22μF ON VBUS,
NO OVP
2.00
22μF ON VBUS,
LOAD THROUGH OVP
1.75
LOAD CURRENT (mA)
500mA LOAD
90
300
RISING THRESHOLD
FALLING THRESHOLD
200
100
75
70
2.90
1.50
3.55
4.20
4.85
5.50
2.9
VOUT (V)
3.4
3.9
4.4
VOUT (V)
4.9
5.4
0
2.90
3.55
4.20
OTG Boost Start-Up into Current
Source Load
OTG Boost Transient Response
5.50
3576 G24
3576 G23
3576 G22
4.85
VOUT (V)
OTG Boost Burst Mode Operation
VBUS
50mV/DIV
AC COUPLED
VBUS
50mV/DIV
AC COUPLED
IVBUS
200mA/DIV
VSW
1V/DIV
0mA
IVBUS
200mA/DIV
VBUS
2V/DIV
0V
0mA
VOUT = 3.8V
20μs/DIV
3576 G25
VOUT = 3.8V
ILOAD = 500mA
200μs/DIV
3576 G26
0V
VOUT = 3.8V
ILOAD = 10mA
50μs/DIV
3576 G27
3576f
9
LTC3576/LTC3576-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise speciﬁed.
Battery Charging from USB-HV
BUCK-USB
Oscillator Frequency vs
Temperature
USB OTG from BAT-HV BUCK-BAT
2.30
VOUT
1V/DIV
AC COUPLED
VBUS
200mV/DIV
AC COUPLED
IBAT
1A/DIV 0A
HVOK
5V/DIV
0V
HVOK
5V/DIV
0V
VBUS = 5V
HVIN = 12V
USING LT3653
500μs/DIV
3576 G28
2.25
FREQUENCY (MHz)
VOUT
1V/DIV
AC COUPLED
VBUS
100mV/DIV
AC COUPLED
VSW
5V/DIV
0V
2.20
2.15
VOUT = 5V
VOUT = 4.2V
VOUT = 3.6V
VOUT = 3V
VOUT = 2.7V
2.10
VBAT = 3.8V
IBUS = 285mA
HVIN = 12V
USING LT3653
3576 G29
500μs/DIV
2.05
–40
–15
35
10
TEMPERATURE (°C)
60
85
3576 G30
OVP Connect Waveform
Rising OVP Threshold vs
Temperature
OVP Disconnect Waveform
6.280
VBUS
5V/DIV
VBUS
5V/DIV
OVGATE
5V/DIV
OVP THRESHOLD (V)
6.275
OVGATE
5V/DIV
OVP INPUT
VOLTAGE
5V TO 10V
STEP 5V/DIV
OVP INPUT
VOLTAGE
0V TO 5V
STEP 5V/DIV
500μs/DIV
3576 G31
3576 G32
500μs/DIV
6.270
6.265
6.260
6.255
–40
–15
35
10
TEMPERATURE (°C)
60
85
3576 G33
37
QUIESCENT CURRENT (μA)
OVSENS CONNECTED
TO INPUT THROUGH
10 6.2k RESISTOR
OVGATE (V)
8
6
4
2
0
2
4
6
INPUT VOLTAGE (V)
8
3576 G34
100
VOVSENS = 5V
RST3, CHRG PIN CURRENT (mA)
12
0
RST3, CHRG Pin Current vs
Voltage (Pull-Down State)
OVGATE Quiescent Current vs
Temperature
OVGATE vs OVSENS
35
33
31
29
27
–40
–15
35
10
TEMPERATURE (°C)
60
85
3576 G35
VBUS = 5V
BAT = 3.8V
80
60
40
20
0
0
1
3
4
2
RST3, CHRG PIN VOLTAGE (V)
5
3576 G36
3576f
10
LTC3576/LTC3576-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise speciﬁed.
3.3V LDO Output Voltage vs
Load Current, VBUS = 0V
Battery Drain Current vs
Battery Voltage
35
BAT = 3.9V, 4.2V
BAT = 3.4V
BAT = 3.5V
BAT = 3.6V
3.2
0mA
3.0
VLDO3V3
20mV/DIV
AC COUPLED
2.8 BAT = 3V
BAT = 3.1V
BAT = 3.2V
BAT = 3.3V
2.6
5
15
0
20
10
LOAD CURRENT (mA)
IVOUT = 0mA
30
ILDO3V3
5mA/DIV
BATTERY CURRENT (μA)
3.4
OUTPUT VOLTAGE (V)
3.3V LDO Step Response
(5mA to 15mA)
BAT = 3.8V
3576 G38
20μs/DIV
VBUS = 0V
25
20
15
10
VBUS = 5V
(SUSPEND MODE)
5
0
2.7
25
3.0
3.3
3.6
4.2
3.9
BATTERY VOLTAGE (V)
3576 G39
3576 G37
Switching Regulator Soft-Start
Waveform
RDS(ON) for Switching Regulator
Power Switches vs Temperature
Switching Regulator Current Limit
vs Temperature
1.0
2.0
REGULATOR 3
REGULATORS 1, 2
0.8
1.0
ON-RESISTANCE (Ω)
CURRENT LIMIT (A)
VOUT 500mV/DIV
1.5
REGULATORS 1, 2
0.5
0.6
PMOS SWITCH
REGULATOR 3
0.4
NMOS SWITCH
0.2
3576 G40
50μs/DIV
NMOS SWITCH
PMOS SWITCH
VIN1,2,3 = 3.8V
0
–40
–15
35
10
TEMPERATURE (°C)
60
0
–40
85
–15
35
10
TEMPERATURE (°C)
60
3576 G42
3576 G41
Switching Regulators 1, 2
Pulse-Skip Mode Efﬁciency
100
90
90
PULSE-SKIP MODE
80
80
70
70
60
50
40
10
0
–40
–15
100
VOUT1,2 = 2.5V
90
VOUT1,2 = 1.8V
60
50
40
60
50
40
Burst Mode OPERATION
20
20
LDO MODE
10
10
35
10
TEMPERATURE (°C)
60
85
1
10
100
LOAD CURRENT (mA)
1000
3576 G44
VOUT1,2 = 2.5V
VOUT1,2 = 1.2V
VOUT1,2 = 1.8V
70
30
0
0.1
VIN3 = 3.8V
80
VOUT1,2 = 1.2V
30
30
20
VIN3 = 3.8V
Switching Regulators 1, 2
Burst Mode Efﬁciency
EFFICIENCY (%)
100
EFFICIENCY (%)
QUIESCENT CURRENTS (μA)
Switching Regulator Low Power
Quiescent Currents vs Temperature
85
0
0.1
1
10
100
LOAD CURRENT (mA)
1000
3576 G45
3576 G43
3576f
11
LTC3576/LTC3576-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise speciﬁed.
Switching Regulator Constant
Frequency Quiescent Currents
Switching Regulator 3
Pulse-Skip Mode Efﬁciency
100
8
4
SWITCHING
REGULATORS 1, 2
2
1
0
–40
–15
10
35
TEMPERATURE (°C)
90
VOUT3 = 2.5V
60
70
VOUT3 = 1.8V
60
VOUT3 = 1.2V
50
40
60
40
20
20
10
10
10
100
LOAD CURRENT (mA)
1000
VOUT3 = 1.8V
50
30
1
VOUT3 = 2.5V
VOUT3 = 1.2V
70
30
0
0.1
85
VIN3 = 3.8V
80
EFFICIENCY (%)
5
3
100
VIN3 = 3.8V
80
6
EFFICIENCY (%)
QUIESCENT CURRENT (mA)
90
SWITCHING
REGULATOR 3
7
Switching Regulator 3
Burst Mode Efﬁciency
0
0.1
1
10
100
LOAD CURRENT (mA)
3576 G48
3576 G47
3576 G46
Switching Regulators 1, 2
Feedback Voltage vs Load Current
1000
Switching Regulator Mode
Transition, Pulse Skip-LDOPulse Skip
Switching Regulators 1, 2
Transient Response
0.820
Burst Mode
OPERATION
FEEDBACK VOLTAGE (V)
0.815
VOUT3
50mV/DIV
AC COUPLED
VOUT2
50mV/DIV
AC COUPLED
0.810
PULSE-SKIP
MODE
0.805
IOUT2
200mA/DIV
0.800
VSW3
1V/DIV
0V
0mA
0.795
VIN2 = 3.8V
VOUT2 = 3.4V
0.790
0.1
1
10
100
LOAD CURRENT (mA)
50μs/DIV
3576 G50
VIN3 = 3.8V
VOUT3 = 1.8V
IOUT3 = 50mA
50μs/DIV
3576 G51
1000
3576 G49
Switching Regulator 3 Feedback
Voltage vs Load Current
Switching Regulator Mode
Transition, Pulse Skip–Burst
Mode Operation–Pulse Skip
Switching Regulator 3
Transient Response
FEEDBACK VOLTAGE (V)
0.810
0.805
VOUT3
50mV/DIV
AC COUPLED
Burst Mode
OPERATION
0.800
VOUT3
50mV/DIV
AC COUPLED
IOUT3
500mA/DIV
VSW3
1V/DIV
0V
PULSE SKIP MODE
0mA
0.795
VIN3 = 3.8V
VOUT3 = 1.8V
0.790
0.1
1
10
100
LOAD CURRENT (mA)
50μs/DIV
3576 G53
VIN3 = 3.8V
VOUT3 = 1.8V
IOUT3 = 100mA
50μs/DIV
3576 G54
1000
3576 G52
3576f
12
LTC3576/LTC3576-1
PIN FUNCTIONS
CLPROG (Pin 1): USB Current Limit Program and Monitor
Pin. A 1% resistor from CLPROG to ground determines
the upper limit of the current drawn or sourced from the
VBUS pins. A precise fraction, hCLPROG, of the VBUS current is sent to the CLPROG pin when the PMOS switch of
the PowerPath switching regulator is on. The switching
regulator delivers power until the CLPROG pin reaches
1.18V in step-down mode and 1.15V in step-up mode.
When the switching regulator is in step-down mode,
CLPROG is used to regulate the average input current.
Several VBUS current limit settings are available via user
input which will typically correspond to the 500mA and
100mA USB speciﬁcations. When the switching regulator
is in step-up mode (USB on-the-go), CLPROG is used to
limit the average output current to 680mA. A multilayer
ceramic averaging capacitor or R-C network is required
at CLPROG for ﬁltering.
LDO3V3 (Pin 2): 3.3V LDO Output Pin. This pin provides
a regulated always-on 3.3V supply voltage. LDO3V3
gets its power from VOUT. It may be used for light loads
such as a watchdog microprocessor or real time clock.
A 1μF capacitor is required from LDO3V3 to ground. If
the LDO3V3 output is not used it should be disabled by
connecting it to VOUT.
NTCBIAS (Pin 3): NTC Thermistor Bias Output. If NTC
operation is desired, connect a bias resistor between
NTCBIAS and NTC, and an NTC thermistor between NTC
and GND. To disable NTC operation, connect NTC to GND
and leave NTCBIAS open.
NTC (Pin 4): Input to the Thermistor Monitoring Circuits.
The NTC pin connects to a negative temperature coefﬁcient
thermistor, which is typically co-packaged with the battery,
to determine if the battery is too hot or too cold to charge.
If the battery’s temperature is out of range, charging is
paused until it re-enters the valid range. A low drift bias
resistor is required from NTCBIAS to NTC and a thermistor
is required from NTC to ground. To disable NTC operation,
connect NTC to GND and leave NTCBIAS open.
OVGATE (Pin 5): Overvoltage Protection Gate Output.
Connect OVGATE to the gate pin of an external N-channel
MOS pass transistor. The source of the transistor should
be connected to VBUS and the drain should be connected
to the product’s DC input connector. In the absence of an
overvoltage condition, this pin is connected to an internal
charge pump capable of creating sufﬁcient overdrive to fully
enhance the pass transistor. If an overvoltage condition is
detected, OVGATE is brought rapidly to GND to prevent
damage to the LTC3576/LTC3576-1. OVGATE works in
conjunction with OVSENS to provide this protection.
OVSENS (Pin 6): Overvoltage Protection Sense Input.
OVSENS should be connected through a 6.2k resistor to
the input power connector and the drain of an external
N-channel MOS pass transistor. When the voltage on this
pin exceeds VOVCUTOFF, the OVGATE pin will be pulled
to GND to disable the pass transistor and protect the
LTC3576/LTC3576-1. The OVSENS pin shunts current
during an overvoltage transient in order to keep the pin
voltage at 6V.
FB1 (Pin 7): Feedback Input for Switching Regulator 1.
When regulator 1’s control loop is complete, this pin servos
to 1 of 16 possible set points based on the commanded
value from the I2C serial port. See Table 4.
VIN1 (Pin 8): Power Input for Switching Regulator 1.
This pin will generally be connected to VOUT. A 1μF MLCC
capacitor is recommended on this pin.
SW1 (Pin 9): Power Transmission Pin for Switching
Regulator 1.
EN1 (Pin 10): Logic Input. This logic input pin independently enables switching regulator 1. Active high. This
pin is logically ORed with its corresponding bit in the
I2C serial port. See Table 3. Has a 2μA internal pull-down
current source.
ENOTG (Pin 11): Logic Input. This logic input pin independently enables the bidirectional switching regulator to
step up the voltage on VOUT and provide a 5V output on
VBUS for USB on-the-go applications. Active high. This
pin is logically ORed with its corresponding bit in the
I2C serial port. See Table 3. Has a 2μA internal pull-down
current source.
3576f
13
LTC3576/LTC3576-1
PIN FUNCTIONS
DVCC (Pin 12): Logic Supply for the I2C Serial Port. If the
serial port is not needed, it can be disabled by grounding
DVCC. When DVCC is grounded, the I2C bits are set to their
default values. See Table 3.
SCL (Pin 13): Clock Input Pin for the I2C Serial Port. The
I2C logic levels are scaled with respect to DVCC. If DVCC
is grounded, the SCL pin is equivalent to the C2, C4 and
C6 bits in the I2C serial port. SCL in conjunction with SDA
determine the operating modes of switching regulators 1,
2 and 3 when DVCC is grounded. See Tables 3 and 5. Has
a 2μA internal pull-down current source.
SDA (Pin 14): Data Input Pin for the I2C Serial Port. The
I2C logic levels are scaled with respect to DVCC. If DVCC
is grounded, the SDA pin is equivalent to the C3, C5 and
C7 bits in the I2C serial port. SDA in conjunction with SCL
determine the operating modes of switching regulators 1,
2 and 3 when DVCC is grounded. See Tables 3 and 5. Has
a 2μA internal pull-down current source.
NC (Pin 15): Unconnected Pin. This pin is not connected
internally to the part. It is permissible to tie this pin to VIN3
in order to make the VIN3 PCB trace wider.
VIN3 (Pin 16): Power Input for Switching Regulator 3.
This pin will generally be connected to VOUT. A 1μF MLCC
capacitor is recommended on this pin.
SW3 (Pin 17): Power Transmission Pin for Switching
Regulator 3.
NC (Pin 18): Unconnected Pin. This pin is not connected
internally to the part. It is permissible to tie this pin to SW3
in order to make the SW3 PCB trace wider.
EN3 (Pin 19): Logic Input. This logic input pin independently enables switching regulator 3. Active high. This
pin is logically ORed with its corresponding bit in the
I2C serial port. See Table 3. Has a 2μA internal pull-down
current source.
FB3 (Pin 20): Feedback Input for Switching Regulator 3.
When regulator 3’s control loop is complete, this pin servos
to 1 of 16 possible set points based on the commanded
value from the I2C serial port. See Table 4.
RST3 (Pin 21): Logic Output. This in an open-drain output
which indicates that switching regulator 3 has settled to
its ﬁnal value. It can be used as a power-on reset for the
primary microprocessor or to enable the other switching
regulators for supply sequencing.
EN2 (Pin 22): Logic Input. This logic input pin independently enables switching regulator 2. Active high. This
pin is logically ORed with its corresponding bit in the
I2C serial port. See Table 3. Has a 2μA internal pull-down
current source.
SW2 (Pin 23): Power Transmission Pin for Switching
Regulator 2.
VIN2 (Pin 24): Power Input for Switching Regulator 2.
This pin will generally be connected to VOUT. A 1μF MLCC
capacitor is recommended on this pin.
FB2 (Pin 25): Feedback Input for Switching Regulator 2.
When regulator 2’s control loop is complete, this pin servos
to 1 of 16 possible set points based on the commanded
value from the I2C serial port. See Table 4.
VC (Pin 26): Bat-Track External Switching Regulator Control
Output. This pin drives the VC pin of an external Linear
Technology step-down switching regulator. An external Pchannel MOSFET is sometimes required to provide power
to VOUT with its gate tied to the ACPR pin (see Applications
Information). In concert with WALL and ACPR, it will
regulate VOUT to maximize battery charger efﬁciency
WALL (Pin 27): External Power Source Sense Input. WALL
should be connected to the output of the external high
voltage switching regulator and to the drain of an external
P-channel MOSFET if used. It is used to determine when
power is applied to the external regulator. When power
is detected, ACPR is driven low and the USB input is automatically disabled. Pulling this pin above 4.3V enables
the VC pin.
3576f
14
LTC3576/LTC3576-1
PIN FUNCTIONS
ACPR (Pin 28): External Power Source Present Output
(Active Low). ACPR indicates that the output of the external
high voltage step-down switching regulator is suitable for
use by the LTC3576/LTC3576-1. It should be connected to
the gate of an external P-channel MOSFET whose source
is connected to VOUT and whose drain is connected to
WALL. ACPR has a high level of VOUT and a low level of
GND. The USB bidirectional switcher is disabled when
ACPR is low.
PROG (Pin 29): Charge Current Program and Charge Current Monitor Pin. Connecting a 1% resistor from PROG
to ground programs the charge current. If sufﬁcient input
power is available in constant-current mode, this pin servos
to 1V. The voltage on this pin always represents the actual
charge current by using the following formula:
IBAT =
VPROG
• 1030
RPROG
CHRG (Pin 30): Open-Drain Charge Status Output. The
CHRG pin indicates the status of the battery charger.
Four possible charger states are represented by CHRG:
charging, not charging, unresponsive battery and battery
temperature out of range. In addition, CHRG is used to
indicate whether there is a short-circuit condition on VBUS
when the bidirectional switching regulator is in step-up
mode (on-the-go). CHRG is modulated at 35kHz and
switches between a low and a high duty cycle for easy
recognition by either humans or microprocessors. See
Table 1. CHRG requires a pull-up resistor and/or LED to
provide indication.
IDGATE (Pin 31): Ideal Diode Ampliﬁer Output. This pin
controls the gate of an optional external P-channel MOSFET
used as an ideal diode between VOUT and BAT. The external
ideal diode operates in parallel with the internal ideal diode.
The source of the P-channel MOSFET should be connected
to VOUT and the drain should be connected to BAT. If the
external ideal diode MOSFET is not used, IDGATE should
be left ﬂoating.
BAT (Pin 32): Single Cell Li-Ion Battery Pin. Depending on
available VBUS power, a Li-Ion battery on BAT will either
deliver power to VOUT through the ideal diode or be charged
from VOUT via the battery charger.
VOUT (Pin 33): Output Voltage of the Bidirectional PowerPath Switching Regulator in step-down mode and
Input Voltage of the Battery Charger. The majority of
the portable product should be powered from VOUT. The
LTC3576/LTC3576-1 will partition the available power
between the external load on VOUT and the internal battery charger. Priority is given to the external load and any
extra power is used to charge the battery. An ideal diode
from BAT to VOUT ensures that VOUT is powered even if
the load exceeds the allotted power from VBUS or if the
VBUS power source is removed. In on-the-go mode, this
pin delivers power to VBUS via the SW pin. VOUT should
be bypassed with a low impedance ceramic capacitor.
VBUS (Pins 34, 35): Power Pins. These pins deliver power
to VOUT via the SW pin by drawing controlled current from
a DC source such as a USB port or DC output wall adapter.
In on-the-go mode these pins provide power to external
loads. Tie the two VBUS pins together at the part and bypass
with a low impedance multilayer ceramic capacitor.
SW (Pin 36): The SW pin transfers power between VBUS
and VOUT via the bidirectional switching regulator. See
the Applications Information section for a discussion of
inductance value and current rating.
ILIM0, ILIM1 (Pins 37, 38): ILIM0 and ILIM1 control the current
limit of the PowerPath switching regulator. See Table 1.
Both the ILIM0 and ILIM1 pins are logically ORed with their
corresponding bits in the I2C serial port. See Tables 3 and
6. Each has a 2μA internal pull-down current source.
Exposed Pad (Pin 39): Ground. The Exposed Pad should
be connected to a continuous ground plane on the second
layer of the printed circuit board by several vias directly
under the LTC3576/LTC3576-1.
3576f
15
LTC3576/LTC3576-1
BLOCK DIAGRAM
VC
26
OVSENS 6
OVP
OVGATE 5
WALL
DETECT
VC
CONTROL
VBUS 35
2.25MHz
BIDIRECTIONAL
PowerPath
SWITCHING
REGULATOR
VBUS 34
27 WALL
28 ACPR
36 SW
2 LDO3V3
3.3V LDO
SUSPEND LDO
500μA/2.5mA
NTCBIAS 3
NTC 4
BATTERY
TEMPERATURE
MONITOR
5.1V
1.18V
OR 1.15V
CHRG 30
+
–
+
+
+
–
CLPROG 1
33 VOUT
IDEAL
CC/CV
CHARGER
–
+
0.3V
+–
–
+
–
31 IDGATE
15mV
32 BAT
3.6V
29 PROG
CHARGE
STATUS
8 VIN1
ENABLE
D/A
400mA 2.25MHz
BUCK
REGULATOR
9 SW1
7 FB1
4
24 VIN2
ENABLE
D/A
400mA 2.25MHz
BUCK
REGULATOR
25 FB2
4
ILIM
DECODE
LOGIC
23 SW2
16 VIN3
ENABLE
D/A
1A 2.25MHz
BUCK
REGULATOR
ILIM0 37
17 SW3
20 FB3
ILIM1 38
21 RST3
4
ENOTG 11
EN1 10
EN2 22
EN3 19
DVCC 12
SDA 14
I2C PORT
SCL 13
39
3576 BD
GND
3576f
16
LTC3576/LTC3576-1
TIMING DIAGRAM
SDA
tSU,STA
tSU,DAT
tLOW
tBUF
tSU,STO
tHD,STA
tHD,DAT
3208 F05
SCL
tHIGH
tHD,STA
START
CONDITION
tSP
REPEATED START
CONDITION
tf
tr
STOP
CONDITION
START
CONDITION
I2C WRITE PROTOCOL
WRITE ADDRESS
R/W
SUB-ADDRESS
A7
0
0
0
1
0
0
1
0
SDA
0
0
0
1
0
0
1
0
ACK
SCL
1
2
3
4
5
6
7
8
9
A6
A5
A4
A3
INPUT DATA BYTE
A2
A1
A0
B7
B6
B5
B4
B3
B2
B1
B0
START
STOP
ACK
1
2
3
4
5
6
7
8
9
ACK
1
2
3
4
5
6
7
8
9
3576 I2C
3576f
17
LTC3576/LTC3576-1
OPERATION
Introduction
The LTC3576/LTC3576-1 are highly integrated power management ICs designed to make optimal use of the power
available from a variety of sources, while minimizing power
dissipation and easing thermal budgeting constraints.
They include a high efﬁciency bidirectional PowerPath
switching regulator, a controller for an external high voltage step-down switching regulator, a battery charger, an
ideal diode, an always-on LDO, an overvoltage protection
circuit and three general purpose step-down switching
regulators. The entire chip is controlled by either direct
digital control or by an I2C serial port or both.
For automotive, ﬁrewire, and other high voltage applications, the LTC3576/LTC3576-1 provide Bat-Track control of
an external LTC step-down switching regulator to maximize
battery charger efﬁciency and minimize heat production.
When power is available from both the USB and an auxiliary
input, the auxiliary input is given priority.
The LTC3576/LTC3576-1 contain both an internal 180mΩ
ideal diode as well as an ideal diode controller for use
with an optional external P-channel MOSFET. The ideal
diode(s) from BAT to VOUT guarantee that ample power
is always available to VOUT even if there is insufﬁcient or
absent power at VBUS or WALL.
The innovative PowerPath architecture ensures that the
application is powered immediately after external voltage is
applied, even with a completely dead battery, by prioritizing
power to the application.
An “always-on” LDO provides a regulated 3.3V from
available power at VOUT. Drawing very little quiescent
current, this LDO will be on at all times and can be used
to supply 20mA.
When acting as a step-down converter, the LTC3576/
LTC3576-1’s bidirectional switching regulator takes
power from USB, wall adapters, or other 5V sources and
provides power to the application and efﬁciently charges
the battery using Bat-Track. Because power is conserved
the LTC3576/LTC3576-1 allow the load current on VOUT to
exceed the current drawn by the USB port making maximum use of the allowable USB power for battery charging.
For USB compatibility the switching regulator includes
a precision average input current limit. The PowerPath
switching regulator and battery charger communicate to
ensure that the average input current never exceeds the
USB speciﬁcations.
The LTC3576/LTC3576-1 feature an overvoltage protection
circuit which is designed to work with an external N-channel MOSFET to prevent damage to their inputs caused by
accidental application of high voltage.
Additionally, the bidirectional switching regulator can also
operate as a 5V synchronous step-up converter taking
power from VOUT and delivering up to 500mA to VBUS
without the need for any additional external components.
This enables systems with USB dual-role transceivers to
function as USB on-the-go dual-role devices. True output
disconnect and average output current limit features are
included for short-circuit protection.
To prevent battery drain when a device is connected to a
suspended USB port, an LDO from VBUS to VOUT provides
either low power or high power USB suspend current to
the application.
The three general purpose switching regulators can be
independently enabled either by direct digital control or
by operating the I2C serial port. Under I2C control, all
three switching regulators have adjustable set points so
that voltages can be reduced when high processor performance is not needed. Along with constant frequency PWM
mode, all three switching regulators have automatic Burst
Mode operation and LDO modes for signiﬁcantly reduced
quiescent current under light load conditions.
3576f
18
LTC3576/LTC3576-1
OPERATION
Bidirectional PowerPath Switching Regulator—
Step-Down Mode
If the combined external load plus battery charge current
is large enough to cause the switching regulator to reach
the programmed input current limit, the battery charger
will reduce its charge current by precisely the amount
necessary to enable the external load to be satisﬁed. Even
if the battery charge current is programmed to exceed the
allowable USB current, the USB speciﬁcation for average
input current will not be violated; the battery charger will
reduce its current as needed. Furthermore, if the load current at VOUT exceeds the programmed power from VBUS,
load current will be drawn from the battery via the ideal
diode(s) even when the battery charger is enabled.
The power delivered from VBUS to VOUT is controlled by
a 2.25MHz constant frequency bidirectional switching
regulator operating in step-down mode. VOUT drives the
combination of the external load (step-down switching
regulators 1, 2 and 3) and the battery charger. To meet the
maximum USB load speciﬁcation, the switching regulator
contains a measurement and control system that ensures
that the average input current remains below the level
programmed at CLPROG.
If the combined load does not cause the switching regulator to reach the programmed input current limit, VOUT
will track approximately 0.3V above the battery voltage.
By keeping the voltage across the battery charger at this
low level, power lost to the battery charger is minimized.
Figure 1 shows the power ﬂow in step-down mode.
TO AUTOMOTIVE,
FIREWIRE, ETC.
VIN
VC
26
35
34
s2
FB
27
6V
+–
WALL
VOUT
3.6V
BAT + 0.3V 4.3V
VBUS
ACPR
SW
28
3.5V TO
(BAT + 0.3V)
TO SYSTEM LOAD
36
VBUS
VOUT
PWM AND
GATE DRIVE
VBUS
VOLTAGE
CONTROLLER
ISWITCH/N
5V
1
–
+
Bat-Track HV CONTROL
CLPROG
1.18V
IDEAL
DIODE
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
–
+
–
+
AVERAGE VBUS INPUT
CURRENT LIMIT
CONTROLLER
OmV
15mV
+
+
–
TO USB
OR WALL
ADAPTER
+
–
5
SW
VC
OVERVOLTAGE PROTECTION
OVSENS
OVGATE
HIGH VOLTAGE
STEP-DOWN
SWITCHING
REGULATOR
+
+
–
6
The current out of CLPROG is a precise fraction of the VBUS
current. When a programming resistor and an averaging
capacitor are connected from CLPROG to GND, the voltage on CLPROG represents the average input current of
the switching regulator. As the input current approaches
the programmed limit, CLPROG reaches 1.18V and power
delivered by the switching regulator is held constant.
–
+
+
–
IDGATE
33
OPTIONAL EXTERNAL
IDEAL DIODE PMOS
31
0.3V
3.6V
+–
BAT
32
VOUT VOLTAGE
CONTROLLER
+
3576 F01
SINGLE CELL
Li-Ion
USB INPUT
BATTERY POWER
HV INPUT
Figure 1. PowerPath Block Diagram—Power Available from USB/Wall Adapter
3576f
19
LTC3576/LTC3576-1
OPERATION
Table 1. USB Current Limit Settings Using ILIM0 and ILIM1
4.2
3.9
NO LOAD
3.6
300mV
3.3
3.0
2.7
2.4
2.4
ILIM1
ILIM0
0
0
1× Mode (USB 100mA Limit)
0
1
10× Mode (Wall 1A Limit)
1
0
Low Power Suspend (USB 500μA Limit)
1
1
5× Mode (USB 500mA Limit)
USB SETTING
(
2.7
3.0
3.6
3.3
BAT (V)
3.9
4.2
3576 F02
When the switching regulator is activated, the average
input current will be limited by the CLPROG programming
resistor according to the following expression:
IVBUS = IVBUSQ +
4.5
VOUT (V)
The input current limit is programmed by the ILIM0 and
ILIM1 pins or by the I2C serial port. The input current limit
has ﬁve possible settings ranging from the USB suspend
limit of 500μA up to 1A for wall adapter applications. Two
of these settings are speciﬁcally intended for use in the
100mA and 500mA USB applications. Refer to Table 1 for
current limit settings using the ILIM0 and ILIM1 pins and
Table 6 for current limit settings using the I2C port.
)
VCLPROG
• hCLPROG + 1
RCLPROG
Figure 2. VOUT vs BAT
For very low-battery voltages, the battery charger acts like a
load and, due to limited input power, its current will tend to
pull VOUT below the 3.6V “Instant On” voltage. To prevent
VOUT from falling below this level, an undervoltage circuit
automatically detects that VOUT is falling and reduces the
battery charge current as needed. This reduction ensures
that load current and voltage are always prioritized while
allowing as much battery charge current as possible. See
Over Programming the Battery Charger in the Applications
Information section.
where IVBUSQ is the quiescent current of the LTC3576/
LTC3576-1, VCLPROG is the CLPROG servo voltage in
current limit, RCLPROG is the value of the programming
resistor and hCLPROG is the ratio of the measured current at VBUS to the sample current delivered to CLPROG.
Refer to the Electrical Characteristics table for values of
hCLPROG, VCLPROG and IVBUSQ. Given worst-case circuit
tolerances, the USB speciﬁcation for the average input
current in 100mA or 500mA mode will not be violated,
provided that RCLPROG is 3.01k or greater.
The voltage regulation loop is compensated by the capacitance on VOUT. A 10μF MLCC capacitor is required
for loop stability. Additional capacitance beyond this value
will improve transient response.
While not in current limit, the switching regulator’s BatTrack feature will set VOUT to approximately 300mV above
the voltage at BAT. However, if the voltage at BAT is below
3.3V, and the load requirement does not cause the switching regulator to exceed its current limit, VOUT will regulate
at a ﬁxed 3.6V as shown in Figure 2. This “instant-on”
operation will allow a portable product to run immediately
when power is applied without waiting for the battery to
charge. If the load does exceed the current limit at VBUS,
VOUT will range between the no-load voltage and slightly
below the battery voltage, indicated by the shaded region
of Figure 2.
Bidirectional PowerPath Switching Regulator—
Step-Up Mode
An internal undervoltage lockout circuit monitors VBUS and
keeps the switching regulator off until VBUS rises above
4.30V and is about 200mV above the battery voltage.
Hysteresis on the UVLO turns off the regulator if VBUS
falls below 4V or to within 50mV of the battery voltage.
When this happens, system power at VOUT will be drawn
from the battery via the ideal diode(s).
For USB on-the-go applications, the bidirectional
PowerPath switching regulator acts as a step-up converter
to deliver power from VOUT to VBUS. The power from VOUT
can come from the battery or the output of the external
3576f
20
LTC3576/LTC3576-1
OPERATION
TO AUTOMOTIVE,
FIREWIRE, ETC.
VIN
VC
26
TO USB
CABLE
35
34
+
–
5
OVGATE
27
VC
OVERVOLTAGE PROTECTION
s2
+
+
–
6
OVSENS
HIGH VOLTAGE SW
STEP-DOWN
SWITCHING
REGULATOR FB
6V
+–
WALL
VOUT
3.6V
BAT + 0.3V 4.3V
–
+
28
Bat-Track HV CONTROL
VBUS
SW
3.5V TO
(BAT + 0.3V)
TO SYSTEM LOAD
36
VBUS
VOUT
PWM AND
GATE DRIVE
VBUS
VOLTAGE
CONTROLLER
ISWITCH/N
5V
CLPROG
1.15V
IDEAL
DIODE
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
–
+
OmV
15mV
–
+
+
+
–
1
ACPR
AVERAGE VBUS OUTPUT
CURRENT LIMIT
CONTROLLER
–
+
+
–
IDGATE
33
OPTIONAL EXTERNAL
IDEAL DIODE PMOS
31
0.3V
3.6V
BAT
+–
32
VOUT VOLTAGE
CONTROLLER
+
SINGLE CELL
Li-Ion
3576 F03
BATTERY POWER
HV INPUT
Figure 3. PowerPath Block Diagram—USB On-the-Go
high voltage switching regulator. As a step-up converter,
the bidirectional switching regulator produces 5V on
VBUS and is capable of delivering at least 500mA. USB
on-the-go can be enabled by either the external control
pin, ENOTG, or via I2C. Figure 3 shows the power ﬂow
in step-up mode.
An undervoltage lockout circuit monitors VOUT and prevents step-up conversion until VOUT rises above 2.8V. To
prevent backdriving of VBUS when input power is available,
the VBUS undervoltage lockout circuit prevents step-up
conversion if VBUS is greater than 4.3V at the time step-up
mode is enabled. The switching regulator is also designed
to allow true output disconnect by eliminating body diode
conduction of the internal PMOS switch. This allows VBUS
to go to zero volts during a short-circuit condition or while
shut down, drawing zero current from VOUT .
The voltage regulation loop is compensated by the capacitance on VBUS. A 4.7μF MLCC is required for loop stability.
Additional capacitance beyond this value will improve
transient response. The VBUS voltage has approximately
3% load regulation up to an output current of 500mA. At
light loads, the switching regulator goes into Burst Mode
operation. The regulator will deliver power to VBUS until it
reaches 5.1V after which the NMOS and PMOS switches
shut off. The regulator delivers power again to VBUS once
it falls below 5.1V.
The switching regulator features both peak inductor and
average output current limit. The peak current mode
architecture limits peak inductor current on a cycle-bycycle basis. The peak current limit is equal to VBUS/2Ω to
a maximum of 1.8A so that in the event of a sudden short
circuit, the current limit will fold back to a lower value.
In step-up mode, the voltage on CLPROG represents the
average output current of the switching regulator when
a programming resistor and an averaging capacitor are
connected from CLPROG to GND. With a 3.01k resistor
on CLPROG, the bidirectional switching regulator has an
output current limit of 680mA. As the output current approaches this limit CLPROG servos to 1.15V and VBUS falls
3576f
21
LTC3576/LTC3576-1
OPERATION
rapidly to VOUT . When VBUS is close to VOUT there may not
be sufﬁcient negative slope on the inductor current when
the PMOS switch is on to balance the rise in the inductor
current when the NMOS switch is on. This will cause the
inductor current to run away and the voltage on CLPROG
to rise. When CLPROG reaches 1.2V the switching of the
synchronous PMOS is terminated and VOUT is applied
statically to its gate. This ensures that the inductor current
will have sufﬁcient negative slope during the time current
is ﬂowing to the output. The PMOS will resume switching
when CLPROG drops down to 1.15V.
The LTC3576/LTC3576-1 maintain voltage regulation even
if VOUT is above VBUS. This is achieved by disabling the
PMOS switch. The PMOS switch is enabled when VBUS
rises above VOUT + 180mV and is disabled when it falls
below VOUT + 70mV to prevent the inductor current from
running away when not in current limit. Since the PMOS
no longer acts as a low impedance switch in this mode,
there will be more power dissipation within the IC. This
will cause a sharp drop in efﬁciency.
If VBUS is less than 4V and the PMOS switch is disabled
for more than 7.2ms a short-circuit fault will be declared
and the part will shut off. The CHRG pin will blink at 35kHz
with a duty cycle that varies between 12% and 88% at a
4Hz rate. See Table 2. To re-enable step-up mode, the
ENOTG pin or, with ENOTG grounded, the B0 bit in the
I2C port must be cycled low and then high.
Bat-Track Auxiliary High Voltage Switching Regulator
Control
The WALL, ACPR and VC pins can be used in conjunction
with an external high voltage step-down switching regulator such as the LT®3480 or the LT3653 to minimize heat
production when operating from higher voltage sources,
as shown in Figures 1 and 3. Bat-Track control circuitry
regulates the external switching regulator’s output voltage
to the larger of (BAT + 300mV) or 3.6V. This maximizes
battery charger efﬁciency while still allowing instant-on
operation when the battery is deeply discharged.
The feedback network of the high voltage regulator
should be set to generate an output voltage between 4.5V
and 5.5V. When high voltage is applied to the external
regulator, WALL will rise toward this programmed output
voltage. When WALL exceeds approximately 4.3V, ACPR
is brought low and the Bat-Track control of the LTC3576/
LTC3576-1 overdrives the local VC control of the external
high voltage step-down switching regulator. Therefore,
once the Bat-Track control is enabled, the output voltage
is set independent of the switching regulator feedback
network.
Bat-Track control provides a signiﬁcant efﬁciency advantage
over the simple use of a 5V switching regulator output to
drive the battery charger. With a 5V output driving VOUT,
battery charger efﬁciency is approximately:
ηTOTAL = ηBUCK •
VBAT
5V
where ηBUCK is the efﬁciency of the high voltage switching
regulator and 5V is the output voltage of the switching
regulator. With a typical switching regulator efﬁciency of
87% and a typical battery voltage of 3.8V, the total battery charger efﬁciency is approximately 66%. Assuming
a 1A charge current, 1.7W of power is dissipated just to
charge the battery!
With Bat-Track, battery charger efﬁciency is approximately:
ηTOTAL = ηBUCK •
VBAT
VBAT + 0.3V
With the same assumptions as above, the total battery
charger efﬁciency is approximately 81%. This example
works out to less than 1W of power dissipation, or almost
60% less heat.
See the Typical Applications section for complete circuits
using the LT3480 and the LT3653 with Bat-Track control.
Ideal Diode(s) from BAT to VOUT
The LTC3576/LTC3576-1 each have an internal ideal diode
as well as a controller for an optional external ideal diode.
Both the internal and the external ideal diodes are always
on and will respond quickly whenever VOUT drops below
BAT.
If the load current increases beyond the power allowed
from the switching regulator, additional power will be
pulled from the battery via the ideal diode(s). Further3576f
22
LTC3576/LTC3576-1
OPERATION
this LDO only becomes active when the switching converter
is disabled (suspended). The suspend LDO sends a scaled
copy of the VBUS current to the CLPROG pin, which will
servo to approximately 100mV in this mode. To remain
compliant with the USB speciﬁcation, the input to the LDO
is current limited so that it will not exceed the low power
or high power suspend speciﬁcation. If the load on VOUT
exceeds the suspend current limit, the additional current
will come from the battery via the ideal diode(s).
2200
VISHAY Si2333
OPTIONAL EXTERNAL
IDEAL DIODE
2000
1800
CURRENT (mA)
1600
LTC3576/
LTC3576-1
IDEAL DIODE
1400
1200
1000
800
600
ON
SEMICONDUCTOR
MBRM120LT3
400
200
0
0
60 120 180 240 300 360 420 480
FORWARD VOLTAGE (mV) (BAT – VOUT)
3576 F04
Figure 4. Ideal Diode V-I Characteristics
more, if power to VBUS (USB or wall adapter) is removed,
then all of the application power will be provided by the
battery via the ideal diodes. The ideal diode(s) will be fast
enough to keep VOUT from drooping with only the storage capacitance required for the switching regulator. The
internal ideal diode consists of a precision ampliﬁer that
activates a large on-chip P-channel MOSFET whenever
the voltage at VOUT is approximately 15mV (VFWD) below
the voltage at BAT. Within the ampliﬁer’s linear range, the
small-signal resistance of the ideal diode will be quite low,
keeping the forward drop near 15mV. At higher current
levels, the MOSFET will be in full conduction.
To supplement the internal ideal diode, an external
P-channel MOSFET may be added from BAT to VOUT. The
IDGATE pin of the LTC3576/LTC3576-1 drives the gate of
the external P-channel MOSFET for automatic ideal diode
control. The source of the external P-channel MOSFET
should be connected to VOUT and the drain should be connected to BAT. Capable of driving a 1nF load, the IDGATE
pin can control an external P-channel MOSFET transistor
having an on-resistance of 30mΩ or lower.
Suspend LDO
If the LTC3576/LTC3576-1 are conﬁgured for USB suspend
mode, the bidirectional switching regulator is disabled and
the suspend LDO provides power to the VOUT pin (presuming there is power available to VBUS). This LDO will prevent
the battery from running down when the portable product
has access to a suspended USB port. Regulating at 4.6V,
3.3V Always-On LDO Supply
The LTC3576/LTC3576-1 include a low quiescent current
low dropout regulator that is always powered. This LDO
can be used to provide power to a system pushbutton
controller, standby microcontroller or real time clock. Designed to deliver up to 20mA, the always-on LDO requires
at least a 1μF low impedance ceramic bypass capacitor
for compensation. The LDO is powered from VOUT, and
therefore will enter dropout at loads less than 20mA as
VOUT falls near 3.3V. If the LDO3V3 output is not used, it
should be disabled by connecting it to VOUT.
Battery Charger
The LTC3576/LTC3576-1 include a constant-current/constant-voltage battery charger with automatic recharge,
automatic termination by safety timer, low voltage trickle
charging, bad cell detection and thermistor sensor input
for out-of-temperature charge pausing.
Battery Preconditioning
When a battery charge cycle begins, the battery charger
ﬁrst determines if the battery is deeply discharged. If the
battery voltage is below VTRKL, typically 2.85V, an automatic
trickle charge feature sets the battery charge current to
10% of the programmed value. If the low voltage persists
for more than 1/2 hour, the battery charger automatically
terminates and indicates via the CHRG pin that the battery
was unresponsive.
Once the battery voltage is above 2.85V, the charger begins
charging in full power constant-current mode. The current delivered to the battery will try to reach 1030/RPROG.
Depending on available input power and external load
conditions, the battery charger may or may not be able
3576f
23
LTC3576/LTC3576-1
OPERATION
to charge at the full programmed rate. The external load
will always be prioritized over the battery charge current.
Likewise, the USB current limit programming will always
be observed and only additional power will be available to
charge the battery. When system loads are light, battery
charge current will be maximized.
Charge Termination
ICHG =
VPROG
• 1030
RPROG
In either the constant-current or constant-voltage charging
modes, the voltage at the PROG pin will be proportional to
the actual charge current delivered to the battery. Therefore, the actual charge current can be determined at any
time by monitoring the PROG pin voltage and using the
following equation:
The battery charger has a built-in safety timer. When the
voltage on the battery reaches the pre-programmed ﬂoat
voltage, the battery charger will regulate the battery voltage and the charge current will decrease naturally. Once
the battery charger detects that the battery has reached
the ﬂoat voltage, the four hour safety timer is started.
After the safety timer expires, charging of the battery will
discontinue and no more current will be delivered.
In many cases, the actual battery charge current, IBAT, will
be lower than ICHG due to limited input power available and
prioritization with the system load drawn from VOUT.
Automatic Recharge
The Battery Charger Flow Chart illustrates the battery
charger’s algorithm.
After the battery charger terminates, it will remain off
drawing only microamperes of current from the battery.
If the portable product remains in this state long enough,
the battery will eventually self discharge. To ensure that
the battery is always topped off, a charge cycle will automatically begin when the battery voltage falls below the
recharge threshold which is typically 100mV less than
the charger’s ﬂoat voltage. In the event that the safety
timer is running when the battery voltage falls below the
recharge threshold, it will reset back to zero. To prevent
brief excursions below the recharge threshold from resetting the safety timer, the battery voltage must be below
the recharge threshold for more than 1ms. The charge
cycle and safety timer will also restart if the VBUS UVLO
cycles low and then high (e.g., VBUS is removed and then
replaced), or if the battery charger is cycled on and off
by the I2C port.
Charge Current
The charge current is programmed using a single resistor from PROG to ground. 1/1030th of the battery charge
current is sent to PROG which will attempt to servo to
1.000V. Thus, the battery charge current will try to reach
1030 times the current in the PROG pin. The program
resistor and the charge current are calculated using the
following equation:
IBAT =
VPROG
•1030
RPROG
Charge Status Indication
The CHRG pin indicates the status of the battery charger.
Four possible states are represented by CHRG which
include charging, not charging, unresponsive battery and
battery temperature out of range.
The signal at the CHRG pin can be easily recognized as
one of the above four states by either a human or a microprocessor. An open-drain output, the CHRG pin can
drive an indicator LED through a current limiting resistor
for human interfacing or simply a pull-up resistor for
microprocessor interfacing.
To make the CHRG pin easily recognized by both humans
and microprocessors, the pin is either low for charging,
high for not charging, or it is switched at high frequency
(35kHz) to indicate the two possible faults, unresponsive
battery and battery temperature out of range.
When charging begins, CHRG is pulled low and remains
low for the duration of a normal charge cycle. When
charging is complete, i.e., the BAT pin reaches the ﬂoat
voltage and the charge current has dropped to one-tenth
of the programmed value, the CHRG pin is released (Hi-Z).
If a fault occurs, the pin is switched at 35kHz. While
3576f
24
LTC3576/LTC3576-1
OPERATION
Battery Charger Flow Chart
POWER ON/
ENABLE CHARGER
CLEAR EVENT TIMER
ASSERT CHRG LOW
NTC OUT OF RANGE
YES
INHIBIT CHARGING
NO
PAUSE EVENT TIMER
BAT < 2.85V
BATTERY STATE
BAT > VFLOAT – E
2.85V < BAT < VFLOAT – E
CHARGE AT
100V/RPROG (C/10 RATE)
CHRG CURRENTLY
HIGH-Z
CHARGE WITH
FIXED VOLTAGE
(VFLOAT)
CHARGE AT
1030V/RPROG RATE
YES
NO
RUN EVENT TIMER
NO
INDICATE
NTC FAULT
AT CHRG
RUN EVENT TIMER
PAUSE EVENT TIMER
TIMER > 30 MINUTES
TIMER > 4 HOURS
YES
NO
YES
INHIBIT CHARGING
STOP CHARGING
IBAT < C/10
NO
YES
BAT RISING
THROUGH
VRECHRG
INDICATE BATTERY
FAULT AT CHRG
YES
CHRG HIGH-Z
CHRG HIGH-Z
NO
NO
BAT > 2.85V
YES
BAT FALLING
THROUGH
VRECHRG
NO
YES
NO
BAT < VRECHRG
YES
3576 FLOW
3576f
25
LTC3576/LTC3576-1
OPERATION
switching, its duty cycle is modulated between a high
and low value at a very low frequency. The low and high
duty cycles are disparate enough to make an LED appear
to be on or off thus giving the appearance of “blinking”.
Each of the two faults has its own unique “blink” rate for
human recognition as well as two unique duty cycles for
machine recognition.
The CHRG pin does not respond to the C/10 threshold
if the LTC3576/LTC3576-1 is in VBUS current limit. This
prevents false end of charge indications due to insufﬁcient
power available to the battery charger.
Table 2 illustrates the four possible states of the CHRG
pin when the battery charger is active.
Table 2. CHRG Signal
STATUS
Charging
MODULATION
FREQUENCY (BLINK) FREQUENCY
0Hz
0Hz (Low-Z)
DUTY CYCLES
In addition to charge status, the CHRG pin is also used
to indicate whether there is a short-circuit condition on
VBUS when the bidirectional switching regulator is in onthe-go mode. When a short-circuit condition is detected,
CHRG will blink with the same modulation frequency and
duty cycle as a bad battery fault. If the charger is on at the
same time that on-the-go is enabled, a 4Hz modulation of
12% and 88% duty cycles on CHRG could indicate a bad
battery or a short-circuit fault on VBUS. System software
should turn off the charger or on-the-go to determine
which fault has occurred.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
100%
Not Charging
0Hz
0Hz (Hi-Z)
0%
NTC Fault
35kHz
1Hz at 50%
6%, 94%
Bad Battery
or On-The-Go
Short-Circuit
Fault
35kHz
4Hz at 50%
12%, 88%
An NTC fault is represented by a 35kHz pulse train whose
duty cycle alternates between 6% and 94% at a 1Hz rate. A
human will easily recognize the 1Hz rate as a “slow” blinking which indicates the out-of-range battery temperature
while a microprocessor will be able to decode either the
6% or 94% duty cycles as an NTC fault.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour), the CHRG
pin gives the bad battery fault indication. For this fault, a
human would easily recognize the 4Hz “fast” blink of the
LED while a microprocessor would be able to decode either
the 12% or 88% duty cycles as a bad battery fault.
Note that the LTC3576/LTC3576-1 are 3-terminal PowerPath products where system load is always prioritized
over battery charging. Due to excessive system load, there
may not be sufﬁcient power to charge the battery beyond
the trickle charge threshold voltage within the bad battery
timeout period. In this case, the battery charger will falsely
indicate a bad battery. System software may then reduce
the load and reset the battery charger to try again.
NTC Thermistor
The battery temperature is measured by placing a negative temperature coefﬁcient (NTC) thermistor close to the
battery pack.
To use this feature connect the NTC thermistor, RNTC, between the NTC pin and ground and a bias resistor, RNOM,
from NTCBIAS to NTC. RNOM should be a 1% 200ppm
resistor with a value equal to the value of the chosen NTC
thermistor at 25°C (R25).
The LTC3576/LTC3576-1 pauses charging when the resistance of the NTC thermistor drops to 0.54 times the
value of R25 or approximately 54k for a 100k thermistor.
For a Vishay Curve 1 thermistor, this corresponds to approximately 40°C. If the battery charger is in constant
voltage (ﬂoat) mode, the safety timer also pauses until the
thermistor indicates a return to a valid temperature. As the
temperature drops, the resistance of the NTC thermistor
rises. The LTC3576/LTC3576-1 are also designed to pause
charging when the value of the NTC thermistor increases
to 3.25 times the value of R25. For a Vishay Curve 1
100k thermistor, this resistance, 325k, corresponds to
approximately 0°C. The hot and cold comparators each
have approximately 3°C of hysteresis to prevent oscillation about the trip point. Grounding the NTC pin disables
all NTC functionality.
3576f
26
LTC3576/LTC3576-1
OPERATION
Thermal Regulation
To prevent thermal damage to the LTC3576/LTC3576-1 or
surrounding components, an internal thermal feedback
loop will automatically decrease the programmed charge
current if the die temperature rises to 105°C. This thermal
regulation technique protects the LTC3576/LTC3576-1
from excessive temperature due to high power operation
or high ambient thermal conditions, and allows the user
to push the limits of the power handling capability with
a given circuit board design. The beneﬁt of the LTC3576/
LTC3576-1 thermal regulation loop is that charge current
can be set according to actual conditions rather than
worst-case conditions for a given application with the
assurance that the charger will automatically reduce the
current in worst-case conditions.
Overvoltage Protection
The LTC3576/LTC3576-1 can protect itself from the inadvertent application of excessive voltage to VBUS or WALL with
just two external components: an N-channel MOSFET and
a 6.2k resistor. The maximum safe overvoltage magnitude
will be determined by the choice of the external MOSFET
and its associated drain breakdown voltage.
The overvoltage protection module consists of two pins.
The ﬁrst, OVSENS, is used to measure the externally applied voltage through an external resistor. The second,
OVGATE, is an output used to drive the gate pin of the
external MOSFET. When OVSENS is below 6V, an internal
charge pump will drive OVGATE to approximately 1.88 ×
OVSENS. This will enhance the N-channel MOSFET and
provide a low impedance connection to VBUS or WALL
which will, in turn, power the LTC3576/LTC3576-1. If
OVSENS should rise above 6V due to a fault or use of
an incorrect wall adapter, OVGATE will be pulled to GND
disabling the external MOSFET and therefore protecting
downstream circuitry. When the voltage drops below 6V
again, the external MOSFET will be re-enabled.
When USB on-the-go is enabled, the bidirectional switching regulator powers up the overvoltage protection circuit
through the body diode of the external MOSFET, thus providing protection to the part even when VBUS is sourcing
power. When high voltage is applied to the drain of the
external MOSFET, VBUS will remain at 5V. Once the high
voltage is removed, the drain of the external MOSFET
will return to 5V.
The charge pump output on OVGATE has limited output
drive capability. Care must be taken to avoid leakage on
this pin as it may adversely affect operation.
See the Applications Information section for resistor power
dissipation rating calculations, a table of recommended
components, and examples of dual-input and reverse
input protection.
I2C Interface
The LTC3576/LTC3576-1 may receive commands from a
host (master) using the standard 2-wire I2C interface. The
Timing Diagram shows the timing relationship of the signals on the bus. The two bus lines, SDA and SCL, must be
HIGH when the bus is not in use. External pull-up resistors
or current sources, such as the LTC1694 I2C accelerator,
are required on these lines. The LTC3576/LTC3576-1are
receive-only slave devices. The I2C control signals, SDA
and SCL are scaled internally to the DVCC supply. DVCC
should be connected to the same power supply as the
microcontroller generating the I2C signals.
The I2C port has an undervoltage lockout on the DVCC
pin. When DVCC is below approximately 1V, the I2C serial
port is cleared and switching regulators 1, 2 and 3 are
set to full scale.
Bus Speed
The I2C port is designed to be operated at speeds of up
to 400kHz. It has built-in timing delays to ensure correct
operation when addressed from an I2C compliant master
device. It also contains input ﬁlters designed to suppress
glitches should the bus become corrupted.
Start and Stop Conditions
A bus master signals the beginning of a communication
to a slave device by transmitting a START condition. A
START condition is generated by transitioning SDA from
high to LOW while SCL is HIGH. When the master has
ﬁnished communicating with the slave, it issues a STOP
condition by transitioning SDA from LOW to HIGH while
SCL is high. The bus is then free for communication with
another I2C device.
3576f
27
LTC3576/LTC3576-1
OPERATION
Byte Format
Bus Write Operation
Each byte sent to the LTC3576/LTC3576-1 must be eight bits
long followed by an extra clock cycle for the acknowledge
bit. The data should be sent to the LTC3576/LTC3576-1
with the most signiﬁcant bit (MSB) ﬁrst.
The master initiates communication with the LTC3576/
LTC3576-1 with a START condition and a 7-bit address
followed by the R/W bit = 0. If the address matches that
of the LTC3576/LTC3576-1, the LTC3576/LTC3576-1 return
an acknowledge. The master should then deliver the subaddress. Again the LTC3576/LTC3576-1 acknowledge and
the cycle is repeated for the data byte. The data byte is
transferred to an internal holding latch upon the return of its
acknowledge by the LTC3576/LTC3576-1. This procedure
must be repeated for each sub-address that requires new
data. After one or more data bytes have been transferred
to the LTC3576/LTC3576-1, the master may terminate the
communication with a STOP condition. Alternatively, a
repeated START condition can be initiated by the master
and another chip on the I2C bus can be addressed. This
cycle can continue indeﬁnitely and the LTC3576/LTC3576-1
remembers the last input of valid data that it received.
Once all chips on the bus have been addressed and sent
valid data, a global STOP condition can be sent and the
LTC3576/LTC3576-1 will update their command latches
with the data that they have received.
Acknowledge
The acknowledge signal is used for handshaking between
the master and the slave. An acknowledge (active low)
generated by the slave (LTC3576/LTC3576-1) lets the master know that the latest byte of information was received.
The acknowledge related clock pulse is generated by the
master. The master releases the SDA line (HIGH) during
the acknowledge clock cycle. The slave-receiver must pull
down the SDA line during the acknowledge clock pulse
so that it remains a stable LOW during the HIGH period
of this clock pulse.
Slave Address
The address byte consists of the 7-bit address and the
read/write (R/W) bit. The LTC3576/LTC3576-1 respond to
only one 7-bit address which has been factory programmed
to 0001001. The R/W bit is the least signiﬁcant bit of the
address byte. It must be 0 for the LTC3576/LTC3576-1 to
recognize the address since they are write only devices.
Thus the address byte is 0x12. If the correct seven bit address is given but the R/W bit is 1, the LTC3576/LTC3576-1
will not respond.
Sub-Addressed Writing
The LTC3576/LTC3576-1 have four command registers
for control input. They are accessed by the I2C port via a
sub-addressed writing system.
Each write to the LTC3576/LTC3576-1 consists of three
bytes. The ﬁrst byte is always the LTC3576/LTC3576-1’s
write address. The second byte represents the LTC3576/
LTC3576-1’s sub-address. The sub-address acts as
pointer to direct the subsequent data byte within the
LTC3576/LTC3576-1. The third byte consists of the data to
be written to the location pointed to by the sub-address.
The LTC3576/LTC3576-1 contain four sub-addresses at
locations 0x00, 0x01, 0x02 and 0x03.
In certain circumstances the data on the I2C bus may
become corrupted. In these cases, the LTC3576/LTC35761 respond appropriately by preserving only the last set
of complete data that they have received. For example,
assume the LTC3576/LTC3576-1 have been successfully
addressed and are receiving data when a STOP condition
mistakenly occurs. The LTC3576/LTC3576-1 will ignore this
STOP condition and will not respond until a new START
condition, correct address and sub-address, new set of
data and STOP condition are transmitted.
Likewise, with only one exception, if the LTC3576/
LTC3576-1 were previously addressed and sent valid data
but not updated with a STOP, they will respond to any
STOP that appears on the bus, independent of the number of repeated STARTs that have occurred. If a repeated
START is given and the LTC3576/LTC3576-1 successfully
acknowledge their address and sub-address, they will not
respond to a STOP until a full byte of the new data has
been received and acknowledged.
3576f
28
LTC3576/LTC3576-1
OPERATION
Input Data
Table 3 illustrates the four data bytes that may be written
to the LTC3576/LTC3576-1.
The ﬁrst byte at sub-address 0 controls the servo voltage for switching regulators 1 and 2. The second byte at
sub-address 1 controls the servo voltage of switching
regulator 3 and the enable signals for all three switching
regulators, as well as the enable signal for the PowerPath
switching regulator to power up VBUS for USB on-the-go.
The servo voltages are decoded in Table 4. The default
servo voltage is 0.8V.
Table 3. I2C Serial Port Mapping*
A7
A6
A5
A4
A1
A0
B7
B6
B5
B4
B1
B0
ENABLE OTG
B2
ENABLE 1
B3
ENABLE 2
Switching Regulator 3 Voltage
(See Table 4)
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
C7
C6
C5
C4
C3
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
Switching
Regulator 2
Modes
(See Table 5)
0
0
Switching
Regulator 3
Modes
(See Table 5)
0
Input Current
Limit
(See Table 6)
0
0
0
Unused
HIGH POWER
SUSPEND
Switching
Regulator 1
Modes
(See Table 5)
Reset Value
A2
DISABLE BATTERY
CHARGER
Reset Value
A3
Switching Regulator 2 Voltage
(See Table 4)
ENABLE 3
Switching Regulator 1 Voltage
(See Table 4)
0
0
0
0
0
0
*The A7-A0 and B7-B4 bits default to 1 and all other bits default to 0 when the chip is powered and DVCC = 0.
Table 4. Switching Regulator Servo Voltage
A7
A6
A5
A4
Switching Regulator 1 Servo Voltage
A3
A2
A1
A0
Switching Regulator 2 Servo Voltage
B7
B6
B5
B4
Switching Regulator 3 Servo Voltage
0
0
0
0
0.425
0
0
0
1
0.450
0
0
1
0
0.475
0
0
1
1
0.500
0
1
0
0
0.525
0
1
0
1
0.550
0
1
1
0
0.575
0
1
1
1
0.600
1
0
0
0
0.625
1
0
0
1
0.650
1
0
1
0
0.675
1
0
1
1
0.700
1
1
0
0
0.725
1
1
0
1
0.750
1
1
1
0
0.775
1
1
1
1
0.800
3576f
29
LTC3576/LTC3576-1
OPERATION
The third data byte at sub-address 2 controls the operating
modes of each switching regulator as well as the input
current limit settings. Each switching regulator can be
independently set to one of three operating modes listed
in Table 5.
The input current limit settings are decoded according
to Table 6. This table indicates the maximum current
that will be drawn from the VBUS pin in the event that the
load at VOUT (battery charger plus system load) exceeds
the power available. Any additional power will be drawn
from the battery. The start-up state for the input current
limit setting is 00 representing the low power 100mA
USB setting.
The fourth and ﬁnal byte of input data at sub-address 3
provides bits for disabling the battery charger and enabling
the high power suspend mode current limit of 2.5mA.
Table 5. General Purpose Switching Regulator Modes
C7 (SDA)*
C6 (SCL)*
Switching Regulator 1 Mode
C5 (SDA)*
C4 (SCL)*
Switching Regulator 2 Mode
C3 (SDA)*
C2 (SCL)*
0
X
Pulse Skip Mode
1
0
LDO Mode
1
1
Burst Mode Operation
Switching Regulator 3 Mode
*SDA and SCL take on this context only when DVCC = 0V.
Table 6. USB Current Limit Settings
D6
C1
(ILIM1)*
C0
(ILIM0)*
X
0
0
1x Mode (USB 100mA Limit)
X
0
1
10x Mode (Wall 1A Limit)
0
1
0
Low Power Suspend (USB 500μA Limit)
1
1
0
High Power Suspend (USB 2.5mA Limit)
X
1
1
5x Mode (USB 500mA Limit)
USB SETTING
*ILIM1 and ILIM0 can only be used to enable the low power suspend mode
and are logically ORed with C1 and C0, respectively.
Disabling the I2C Port
The I2C serial port can be disabled by grounding the DVCC
pin. In this mode, the LTC3576/LTC3576-1 are controlled
through the individual logic input pins EN1, EN2, EN3,
ENOTG, ILIM0, ILIM1, SDA and SCL. Some functionality is
not available in this mode such as the programmability of
switching regulators 1, 2 and 3’s output voltage, the battery
charger disable feature and the high power suspend mode.
In this mode, the programmable switching regulators have
a ﬁxed servo voltage of 0.8V. Because the SDA and SCL
pins have no other context when DVCC is grounded, these
pins are re-mapped to control the switching regulator
mode bits C2 to C7. SCL maps to C2, C4 and C6 while
SDA maps to C3, C5 and C7.
RST3 Pin
The RST3 pin is an open-drain output used to indicate that
switching regulator 3 has been enabled and has reached
its ﬁnal voltage. RST3 remains low impedance until regulator 3 reaches 92% of its regulation value.
A 230ms delay is included to allow a system microcontroller
ample time to reset itself. RST3 may be used as a poweron reset to the microprocessor powered by regulator 3
or may be used to enable regulators 1 and/or 2 for supply
sequencing. RST3 is an open-drain output and requires
a pull-up resistor to the output voltage of regulator 3 or
another appropriate power source.
Shutdown Mode
The bidirectional USB switching regulator in step-down
mode is enabled whenever VBUS is above VUVLO and the
LTC3576/LTC3576-1are not in one of the two USB suspend
modes (500μA or 2.5mA). When power is available from
both the USB and auxiliary inputs, the auxiliary input is given
priority and the USB switching regulator is disabled.
The ideal diode(s) are enabled at all times and cannot be
disabled.
3576f
30
LTC3576/LTC3576-1
OPERATION
Step-Down Switching Regulators
Step-Down Switching Regulator Operating Modes
The LTC3576/LTC3576-1 contain three general purpose
2.25MHz step-down constant-frequency current mode
switching regulators. Two regulators provide up to 400mA
and a third switching regulator can provide up to 1A.
All three switching regulators can be programmed for
a minimum start-up output voltage of 0.8V and can be
used to power a microcontroller core, microcontroller
I/O, memory, disk drive or other logic circuitry. All three
switching regulators have I2C programmable set points for
on-the-ﬂy power savings. They also support 100% duty
cycle operation (low dropout mode) when their input voltage drops very close to their output voltage. To suit a variety
of applications, selectable mode functions can be used to
trade off noise for efﬁciency. Three modes are available to
control the operation of the LTC3576/LTC3576-1’s general
purpose switching regulators. At moderate to heavy loads,
the pulse skip mode provides the lowest noise switching
solution. At lighter loads, Burst Mode operation or LDO
mode may be selected. The switching regulators include
soft-start to limit inrush current when powering on, shortcircuit current protection and switch node slew limiting
circuitry to reduce radiated EMI. No external compensation components are required. The operating mode of the
regulators may be set by either I2C control or by manual
control of the SDA and SCL pins if the I2C port is not used.
Each converter may be individually enabled by either their
external control pins EN1, EN2, EN3 or by the I2C port. All
three switching regulators have individual programmable
feedback servo voltages via I2C control. The switching
regulator input supplies VIN1, VIN2 and VIN3 will generally
be connected to the system load pin VOUT.
The LTC3576/LTC3576-1’s general purpose switching
regulators include three possible operating modes to meet
the noise/power needs of a variety of applications.
In pulse skip mode, an internal latch is set at the start of
every cycle which turns on the main P-channel MOSFET
switch. During each cycle, a current comparator compares
the peak inductor current to the output of an error ampliﬁer.
The output of the current comparator resets the internal
latch which causes the main P-channel MOSFET switch to
turn off and the N-channel MOSFET synchronous rectiﬁer
to turn on. The N-channel MOSFET synchronous rectiﬁer
turns off at the end of the 2.25MHz cycle or if the current
through the N-channel MOSFET synchronous rectiﬁer
drops to zero. Using this method of operation, the error
ampliﬁer adjusts the peak inductor current to deliver the
required output power. All necessary compensation is
internal to the switching regulator requiring only a single
ceramic output capacitor for stability. At light loads in PWM
mode, the inductor current may reach zero on each pulse
which will turn off the N-channel MOSFET synchronous
rectiﬁer. In this case, the switch node (SW) goes high
impedance and the switch node voltage will “ring”. This
is discontinuous mode operation, and is normal behavior
for a switching regulator. At very light loads in pulse skip
mode, the switching regulators will automatically skip
pulses as needed to maintain output regulation.
At high duty cycles (VOUTx > VINx /2) it is possible for the
inductor current to reverse, causing the regulator to operate
continuously at light loads. This is normal and regulation is
maintained, but the supply current will increase to several
mA due to continuous switching.
3576f
31
LTC3576/LTC3576-1
OPERATION
In Burst Mode operation, the switching regulator automatically switches between ﬁxed frequency PWM operation and
hysteretic control as a function of the load current. At light
loads, the regulator operates in hysteretic mode and uses
a constant current algorithm to control the inductor current. While in Burst Mode operation, the output capacitor
is charged to a voltage slightly higher than the regulation
point. The step-down switching regulator then goes into
sleep mode, during which the output capacitor provides
the load current. In sleep mode, most of the regulator’s
circuitry is powered down, conserving battery power.
When the output voltage drops below a pre-determined
value, the switching regulator circuitry is powered on and
another burst cycle begins. The duration for which the
regulator operates in sleep mode depends on the load
current. The sleep time decreases as the load current
increases. Burst Mode operation provides a signiﬁcant
improvement in efﬁciency at light loads at the expense of
higher output ripple when compared to pulse skip mode.
At heavy loads Burst Mode operation functions in the
same manner as pulse skip mode.
Finally, the switching regulators have an LDO mode that
gives a DC option for regulating their output voltages. In
LDO mode, the switching regulators are converted to linear
regulators and deliver continuous power from their SWx
pins through their respective inductors. This mode gives
the lowest possible output noise as well as low quiescent
current at light loads.
The step-down switching regulators allow on-the-ﬂy mode
transitions, providing seamless transition between modes
even under load. This allows the user to switch back and
forth between modes to reduce output ripple or increase
low current efﬁciency as needed.
Step-Down Switching Regulator Dropout Operation
It is possible for a switching regulator’s input voltage,
VINx, to approach its programmed output voltage (e.g., a
battery voltage of 3.4V with a programmed output voltage
of 3.3V). When this happens, the PMOS switch duty cycle
increases until it is turned on continuously at 100%. In this
dropout condition, the respective output voltage equals the
regulator’s input voltage minus the voltage drops across
the internal P-channel MOSFET and the inductor.
Step-Down Switching Regulator Low Supply Operation
The LTC3576/LTC3576-1 incorporate an undervoltage
lockout circuit on VOUT which shuts down the general
purpose switching regulators when VOUT drops below
VOUT(UVLO). This UVLO prevents unstable operation.
Step-Down Switching Regulator Soft-Start Operation
Soft-start is accomplished by gradually increasing the
peak inductor current for each switching regulator over a
500μs period. This allows each output to rise slowly, helping minimize the battery surge current. A soft-start cycle
occurs whenever a given switching regulator is enabled,
or after a fault condition has occurred (thermal shutdown
or UVLO). A soft-start cycle is not triggered by changing
operating modes. This allows seamless output operation
when transitioning between Burst Mode operation, pulse
skip mode or LDO mode.
Step-Down Switching Regulator Switching
Slew Rate Control
The step-down switching regulators contain new patent
pending circuitry to limit the slew rate of the switch node
(SWx). This new circuitry is designed to transition the
switch node over a period of a couple of nanoseconds,
signiﬁcantly reducing radiated EMI and conducted supply
noise.
Step-Down Switching Regulator in Shutdown
The step-down switching regulators are in shutdown when
not enabled for operation. In shutdown, all circuitry in
the step-down switching regulator is disconnected from
the switching regulator input supply leaving only a few
nanoamperes of leakage current. The step-down switching
regulator outputs are individually pulled to ground through
a 10k resistor on their SWx pins when in shutdown.
3576f
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LTC3576/LTC3576-1
APPLICATIONS INFORMATION
Bidirectional PowerPath Switching Regulator
CLPROG Resistor and Capacitor Selection
Bidirectional PowerPath Switching Regulator VBUS
and VOUT Bypass Capacitor Selection
As described in the Bidirectional Switching Regulator—
Step-Down Mode section, the resistor on the CLPROG
pin determines the average VBUS input current limit when
the switching regulator is set to either the 1x mode (USB
100mA), the 5x mode (USB 500mA) or the 10x mode. The
VBUS input current will be comprised of two components,
the current that is used to drive VOUT and the quiescent
current of the switching regulator. To ensure that the USB
speciﬁcation is strictly met, both components of the input
current should be considered. The Electrical Characteristics
table gives the typical values for quiescent currents in all
settings as well as current limit programming accuracy. To
get as close to the 500mA or 100mA speciﬁcations as possible, a precision resistor should be used. Recall that:
The type and value of capacitors used with the LTC3576/
LTC3576-1 determine several important parameters such
as regulator control-loop stability and input voltage ripple.
Because the LTC3576/LTC3576-1 use a bidirectional
switching regulator between VBUS and VOUT, the VBUS
current waveform contains high frequency components.
It is strongly recommended that a low equivalent series
resistance (ESR) multilayer ceramic capacitor (MLCC) be
used to bypass VBUS. Tantalum and aluminum capacitors
are not recommended because of their high ESR. The value
of the capacitor on VBUS directly controls the amount of
input ripple for a given load current. Increasing the size
of this capacitor will reduce the input ripple.
IVBUS = IVBUSQ + VCLPROG/RCLPPROG • (hCLPROG +1).
An averaging capacitor is required in parallel with the
resistor so that the switching regulator can determine the
average input current. This capacitor also provides the
dominant pole for the feedback loop when current limit
is reached. To ensure stability, the capacitor on CLPROG
should be 0.1μF or larger.
Bidirectional PowerPath Switching Regulator
Inductor Selection
Because the input voltage range and output voltage range
of the PowerPath switching regulator are both fairly narrow, the LTC3576/LTC3576-1 were designed for a speciﬁc
inductance value of 3.3μH. Some inductors which may be
suitable for this application are listed in Table 7.
Table 7. Recommended PowerPath Inductors for the LTC3576
INDUCTOR
TYPE
L
(μH)
MAX
IDC
(A)
LPS4018
3.3
2.2
D53LC
DB318C
3.3
3.3
2.26 0.034
Toko
5×5×3
1.55 0.070 3.8 × 3.8 × 1.8 www.toko.com
WE-TPC
Type M1
3.3
1.95 0.065 4.8 × 4.8 × 1.8 Wurth Electronik
www.we-online.com
CDRH6D12
CDRH6D38
3.3
3.3
2.2
3.5
MAX
DCR
(Ω)
SIZE IN mm
(L × W × H) MANUFACTURER
0.08 3.9 × 3.9 × 1.7 Coilcraft
www.coilcraft.com
0.063 6.7 × 6.7 × 1.5 Sumida
0.020
www.sumida.com
7×7×4
The inrush current limit speciﬁcation for USB devices is
calculated in terms of the total number of Coulombs needed
to charge the VBUS bypass capacitor to 5V. The maximum
inrush charge for USB on-the-go devices is 33μC. This
places a limit of 6.5μF of capacitance on VBUS assuming
a linear capacitor. However, most ceramic capacitors have
a capacitance that varies with bias voltage. The average
capacitance needs to be less than 6.5μF over a 0V to 5V bias
voltage range to meet the inrush current limit speciﬁcation.
A 10μF capacitor in a 0805 package, such as the Murata
GRM21BR71A106KE51L would be a suitable VBUS bypass
capacitor. If more capacitance is required for better noise
performance and stability it should be connected directly to
the VBUS pin when using the overvoltage protection circuit.
This extra capacitance will be soft-connected over several
milliseconds to limit inrush current and avoid excessive
transient voltage drops on VBUS.
To prevent large VOUT voltage steps during transient load
conditions, it is also recommended that an MLCC be used
to bypass VOUT. The output capacitor is used in the compensation of the switching regulator. At least 10μF with
low ESR are required on VOUT. Additional capacitance will
improve load transient performance and stability.
MLCCs typically have exceptional ESR performance.
MLCCs combined with a tight board layout and an unbroken
ground plane will yield very good performance and low
EMI emissions.
3576f
33
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
There are MLCCs available with several types of dielectrics
each having considerably different characteristics. For
example, X7R MLCCs have the best voltage and temperature stability. X5R MLCCs have apparently higher packing
density but poorer performance over their rated voltage
and temperature ranges. Y5V MLCCs have the highest
packing density, but must be used with caution, because
of their extreme nonlinear characteristic of capacitance
versus voltage. The actual in-circuit capacitance of a
ceramic capacitor should be measured with a small AC
signal and DC bias as is expected in-circuit. Many vendors
specify the capacitance versus voltage with a 1VRMS AC
test signal and, as a result, over state the capacitance that
the capacitor will present in the application. Using similar
operating conditions as the application, the user must
measure or request from the vendor the actual capacitance
to determine if the selected capacitor meets the minimum
capacitance that the application requires.
Step-Down Switching Regulator Output Voltage
Programming
All three switching regulators have I2C programmable
set points and can be programmed for start-up output
voltages of at least 0.8V. The full-scale output voltage for
each switching regulator is programmed using a resistor
divider from the switching regulator output connected to
the FBx pins such that:
R1 VOUTx = VFBx + 1
R2 where VFBx ranges from 0.425V to 0.8V. See Figure 5.
Typical values for R1 are in the range of 40k to 1M. The
capacitor CFB cancels the pole created by feedback resistors
and the input capacitance of the FBx pin and also helps
VINx
L
SWx
LTC3576/
LTC3576-1
FBx
VOUTx
CFB
R1
COUT
R2
GND
3576 F05
to improve transient response for output voltages much
greater than 0.8V. A variety of capacitor sizes can be used
for CFB but a value of 10pF is recommended for most applications. Experimentation with capacitor sizes between
2pF and 22pF may yield improved transient response.
Step-Down Switching Regulator Inductor Selection
Many different sizes and shapes of inductors are available from numerous manufacturers. Choosing the right
inductor from such a large selection of devices can be
overwhelming, but following a few basic guidelines will
make the selection process much simpler.
The general purpose step-down converters are designed to
work with inductors in the range of 2μH to 10μH. For most
applications a 4.7μH inductor is suggested for the lower
current switching regulators 1 and 2 and 2μH is recommended for the higher current switching regulator 3. Larger
value inductors reduce ripple current which improves output ripple voltage. Lower value inductors result in higher
ripple current and improved transient response time. To
maximize efﬁciency, choose an inductor with a low DC
resistance. For a 1.2V output, efﬁciency is reduced about
2% for 100mΩ series resistance at 400mA load current,
and about 2% for 300mΩ series resistance at 100mA load
current. Choose an inductor with a DC current rating at
least 1.5 times larger than the maximum load current to
ensure that the inductor does not saturate during normal
operation. If output short circuit is a possible condition,
the inductor should be rated to handle the maximum peak
current speciﬁed for the step-down converters. Different
core materials and shapes will change the size/current
and price/current relationship of an inductor. Toroid or
shielded pot cores in ferrite or Permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. Inductors that are very thin or
have a very small volume typically have much higher
core and DCR losses, and will not give the best efﬁciency.
The choice of which style inductor to use often depends
more on the price vs size, performance and any radiated
EMI requirements than on what the LTC3576/LTC3576-1
require to operate.
Figure 5. Buck Converter Application Circuit
3576f
34
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
The inductor value also has an effect on Burst Mode operation. Lower inductor values will cause the Burst Mode
switching frequency to increase.
Table 8 shows several inductors that work well with the
LTC3576/LTC3576-1’s general purpose regulators. These
inductors offer a good compromise in current rating, DCR
and physical size. Consult each manufacturer for detailed
information on their entire selection of inductors.
Table 8. Recommended Inductors
INDUCTOR
TYPE
DE2818C
D312C
DE2812C
CDRH3D16
CDRH2D11
CLS4D09
SD3118
SD3112
SD12
SD10
LPS3015
L
(μH)
4.7
3.3
4.7
3.3
2.2
4.7
3.3
2.0
4.7
3.3
2.2
4.7
3.3
2.2
4.7
4.7
3.3
2.2
4.7
3.3
2.2
4.7
3.3
2.2
4.7
3.3
2.2
4.7
3.3
2.2
MAX
IDC
(A)
1.25
1.45
0.79
0.90
1.14
1.2
1.4
1.8
0.9
1.1
1.2
0.5
0.6
0.78
0.75
1.3
1.59
2.0
0.8
0.97
1.12
1.29
1.42
1.80
1.08
1.31
1.65
1.1
1.3
1.5
MAX
DCR
(Ω)
0.072
0.053
0.24
0.20
0.14
1.13*
0.10*
0.067*
0.11
0.085
0.072
0.17
0.123
0.098
0.19
0.162
0.113
0.074
0.246
0.165
0.14
0.117*
0.104*
0.075*
0.153*
0.108*
0.091*
0.2
0.13
0.11
SIZE IN mm
(L × W × H)
3.0 × 2.8 × 1.8
3.0 × 2.8 × 1.8
3.6 × 3.6 × 1.2
3.6 × 3.6 × 1.2
3.6 × 3.6 × 1.2
3.0 × 2.8 × 1.2
3.0 × 2.8 × 1.2
3.0 × 2.8 × 1.2
4.0 × 4.0 × 1.8
4.0 × 4.0 × 1.8
4.0 × 4.0 × 1.8
3.2 × 3.2 × 1.2
3.2 × 3.2 × 1.2
3.2 × 3.2 × 1.2
4.9 × 4.9 × 1.0
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.2
3.1 × 3.1 × 1.2
3.1 × 3.1 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.0
5.2 × 5.2 × 1.0
5.2 × 5.2 × 1.0
3.0 × 3.0 × 1.5
3.0 × 3.0 × 1.5
3.0 × 3.0 × 1.5
MANUFACTURER
Toko
www.toko.comm
Sumida
www.sumida.com
Cooper
www.cooperet.com
Coilcraft
www.coilcraft.com
*Typical DCR
Step-Down Switching Regulator Input/Output Bypass
Capacitor Selection
Low ESR (equivalent series resistance) MLCCs should
be used at each switching regulator output as well as at
each switching regulator input supply (VINx). Only X5R
or X7R ceramic capacitors should be used because they
retain their capacitance over wider voltage and temperature
ranges than other ceramic types. A 10μF output capacitor is sufﬁcient for most applications. For good transient
response and stability the output capacitor should retain
at least 4μF of capacitance over operating temperature and
bias voltage. Each switching regulator input supply should
be bypassed with a 1μF capacitor. Consult with capacitor
manufacturers for detailed information on their selection
and speciﬁcations of ceramic capacitors. Many manufacturers now offer very thin (<1mm tall) ceramic capacitors
ideal for use in height-restricted designs. Table 9 shows a
list of several ceramic capacitor manufacturers.
Table 9. Recommended Ceramic Capacitor Manufacturers
AVX
www.avxcorp.com
Murata
www.murata.com
Taiyo Yuden
www.t-yuden.com
Vishay Siliconix
www.vishay.com
TDK
www.tdk.com
Overvoltage Protection
VBUS can be protected from overvoltage damage with two
additional components, a resistor R1 and an N-channel
MOSFET MN1, as shown in Figure 6. Suitable choices for
MN1 are listed in Table 10.
Table 10. Recommended N-Channel MOSFETs for the
Overvoltage Protection Circuit
PART NUMBER
BVDSS
RON
PACKAGE
Si1472DH
30V
82mΩ
SC70-6
Si2302ADS
20V
60mΩ
SOT-23
Si2306BDS
30V
65mΩ
SOT-23
Si2316BDS
30V
80mΩ
SOT-23
IRLML2502
20V
35mΩ
SOT-23
FDN372S
30V
50mΩ
SOT-23
NTLJS4114N
30V
35mΩ
WDFN6
R1 is a 6.2k resistor and must be rated for the power dissipated during maximum overvoltage. In an overvoltage
condition the OVSENS pin will be clamped at 6V. R1 must
be sized appropriately to dissipate the resultant power.
For example, a 1/10W 6.2k resistor can have at most
√PMAX • 6.2kΩ = 25V applied across its terminals. With
the 6V at OVSENS, the maximum overvoltage magnitude
that this resistor can withstand is 31V. A 1/4W 6.2k resistor
raises this value to 45V. OVSENS’s absolute maximum
3576f
35
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
MN1
USB/WALL
ADAPTER
USB/WALL
ADAPTER
VBUS
C1
R1
MP1
MN1
VBUS
D1
LTC3576/
LTC3576-1
C1
LTC3576/
LTC3576-1
OVGATE
OVSENS
R1
R2
OVGATE
OVSENS
3576 F06
VBUS POSITIVE PROTECTION UP TO BVDSS OF MN1
VBUS NEGATIVE PROTECTION UP TO BVDSS OF MP1
Figure 6. Overvoltage Protection
current rating of 10mA imposes an upper limit of 68V
protection.
It is possible to protect both VBUS and WALL from
overvoltage damage with several additional components,
as shown in Figure 7. Schottky diodes D1 and D2 pass the
larger of V1 and V2 to R1 and OVSENS. If either V1 or V2
exceeds 6V plus VF (Schottky), OVGATE will be pulled to
GND and both the WALL and USB inputs will be protected.
Each input is protected up to the drain-source breakdown,
BVDSS, of MN1 and MN2. R1 must also be rated for the
power dissipated during maximum overvoltage.
M1
V1
WALL
V2
OVGATE
LTC3576/
LTC3576-1
VBUS
D2
D1
M2
C1
3576 F08
Figure 8. Dual Polarity Voltage Protection
transforms the voltage at VBUS to a voltage just above
the level at BAT, while limiting power to less than the
amount programmed at CLPROG. The charger should be
programmed (with the PROG pin) to deliver the maximum
safe charging current without regard to the USB speciﬁcations. If there is insufﬁcient current available to charge
the battery at the programmed rate, it will reduce charge
current until the system load on VOUT is satisﬁed and the
VBUS current limit is satisﬁed. Programming the charger
for more current than is available will not cause the average input current limit to be violated. It will merely allow
the battery charger to make use of all available power to
charge the battery as quickly as possible, and with minimal
dissipation within the charger.
Battery Charger Stability Considerations
GND
R1
OVSENS
3576 F07
Figure 7. Dual-Input Overvoltage Protection
Reverse Voltage Protection
The LTC3576/LTC3576-1 can also be easily protected
against the application of reverse voltages, as shown in
Figure 8. D1 and R1 are necessary to limit the maximum
VGS seen by MP1 during positive overvoltage events. D1’s
breakdown voltage must be safely below MP1’s BVGS. The
circuit shown in Figure 8 offers forward voltage protection
up to MN1’s BVDSS and reverse voltage protection up to
MP1’s BVDSS.
Battery Charger Over Programming
The USB high power speciﬁcation allows for up to 2.5W
to be drawn from the USB port. The LTC3576/LTC3576-1’s
bidirectional switching regulator in step-down mode
The LTC3576/LTC3576-1’s battery charger contains both a
constant-voltage and a constant-current control loop. The
constant-voltage loop is stable without any compensation
when a battery is connected with low impedance leads.
Excessive lead length, however, may add enough series
inductance to require a bypass capacitor of at least 1μF
from BAT to GND.
High value, low ESR MLCCs reduce the constant-voltage
loop phase margin, possibly resulting in instability. Up
to 22μF may be used in parallel with a battery, but larger
capacitors should be decoupled with 0.2Ω to 1Ω of series
resistance.
Furthermore, a 100μF MLCC in series with a 0.3Ω resistor
from BAT to GND is required to prevent oscillation when
the battery is disconnected.
In constant-current mode, the PROG pin is in the feedback loop rather than the battery voltage. Because of the
3576f
36
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
additional pole created by any PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
no additional capacitance on the PROG pin, the charger
is stable with program resistor values as high as 25k.
However, additional capacitance on this node reduces the
maximum allowed program resistor. The pole frequency at
the PROG pin should be kept above 100kHz. Therefore, if
the PROG pin has a parasitic capacitance, CPROG, the following equation should be used to calculate the maximum
resistance value for RPROG:
1
2π • 100kHz • CPROG
RPROG ≤
The LTC3576/LTC3576-1 provide temperature qualiﬁed
charging if a grounded thermistor and a bias resistor
are connected to NTC. By using a bias resistor whose
value is equal to the room temperature resistance of the
thermistor (R25) the upper and lower temperatures are
pre-programmed to approximately 40°C and 0°C respectively assuming a Vishay Curve 1 thermistor.
The upper and lower temperature thresholds can be adjusted by either a modiﬁcation of the bias resistor value
or by adding a second adjustment resistor to the circuit.
If only the bias resistor is adjusted, then either the upper
or the lower threshold can be modiﬁed but not both. The
0.765 • NTCBIAS
RNOM
100k
R25 = Value of the Thermistor at 25°C
RNTC|COLD = Value of thermistor at the cold trip point
RNTC|HOT = Value of the thermistor at the hot trip
point
rCOLD = Ratio of RNTC|COLD to R25
rHOT = Ratio of RNTC|HOT to R25
RNOM – Primary thermistor bias resistor
(see Figure 9)
R1 = Optional temperature range adjustment resistor
(see Figure 10)
NTCBIAS
LTC3576/LTC3576-1
NTC BLOCK
3
NTC thermistors have temperature characteristics which
are indicated on resistance-temperature conversion tables.
The Vishay-Dale thermistor NTHS0603N011-N1003F, used
in the following examples, has a nominal value of 100k
and follows the Vishay Curve 1 resistance-temperature
characteristic.
In the explanation below, the following notation is used.
Alternate NTC Thermistors and Biasing
NTCBIAS
other trip point will be determined by the characteristics
of the thermistor. Using the bias resistor in addition to an
adjustment resistor, both the upper and the lower temperature trip points can be independently programmed with
the constraint that the difference between the upper and
lower temperature thresholds cannot decrease. Examples
of each technique are given below.
NTC
+
4
–
TOO_COLD
TOO_COLD
NTC
0.765 • NTCBIAS
RNOM
105k
–
LTC3576/LTC3576-1
NTC BLOCK
3
+
4
R1
12.7k
T
RNTC
100k
–
T
TOO_HOT
0.349 • NTCBIAS
RNTC
100k
–
TOO_HOT
0.349 • NTCBIAS
+
+
+
+
NTC_ENABLE
NTC_ENABLE
0.1V
0.1V
–
–
3576 F10
3576 F09
Figure 9. Standard NTC Conﬁguration
Figure 10. Modiﬁed NTC Conﬁguration
3576f
37
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
The trip points for the LTC3576/LTC3576-1’s temperature
qualiﬁcation are internally programmed at 0.349 • NTCBIAS
for the hot threshold and 0.765 • NTCBIAS for the cold
threshold.
Therefore, the hot trip point is set when:
RNTCHOT
RNOM + RNTCHOT
• NTCBIAS = 0.349 • NTCBIAS
And the cold trip point is set when:
RNTC COLD
RNOM + RNTC COLD
• NTCBIAS = 0.765 • NTCBIAS
Solving these equations for RNTC|COLD and RNTC|HOT
results in the following:
RNTC|HOT = 0.536 • RNOM
and
RNTC|COLD = 3.25 • RNOM
By setting RNOM equal to R25, the above equations result
in rHOT = 0.536 and rCOLD = 3.25. Referencing these ratios
to the Vishay Resistance-Temperature Curve 1 chart gives
a hot trip point of about 40°C and a cold trip point of about
0°C. The difference between the hot and cold trip points
is approximately 40°C.
By using a bias resistor, RNOM, different in value from
R25, the hot and cold trip points can be moved in either
direction. The temperature span will change somewhat
due to the nonlinear behavior of the thermistor. The following equations can be used to calculate a new value for
the bias resistor:
rHOT
• R25
0.536
r
RNOM = COLD • R25
3.25
RNOM =
where rHOT and rCOLD are the resistance ratios at the desired hot and cold trip points. Note that these equations
are linked. Therefore, only one of the two trip points can
be chosen, the other is determined by the default ratios
designed in the IC. Consider an example where a 60°C
hot trip point is desired.
From the Vishay Curve 1 R-T characteristics, rHOT is
0.2488 at 60°C. Using the above equation, RNOM should
be set to 46.4k. With this value of RNOM, rCOLD is 1.436
and the cold trip point is about 16°C. Notice that the span
is now 44°C rather than the previous 40°C. This is due to
the decrease in “temperature gain” of the thermistor as
absolute temperature increases.
The upper and lower temperature trip points can be independently programmed by using an additional bias resistor
as shown in Figure 10. The following formulas can be used
to compute the values of RNOM and R1:
rCOLD – rHOT
• R25
2.714
R1 = 0.536 • RNOM – rHOT • R25
RNOM =
For example, to set the trip points to 0°C and 45°C with
a Vishay Curve 1 thermistor choose:
RNOM =
3.266 – 0.4368
• 100k = 104.2k
2.714
the nearest 1% value is 105k:
R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k
the nearest 1% value is 12.7k. The ﬁnal solution is shown
in Figure 10 and results in an upper trip point of 45°C and
a lower trip point of 0°C.
Hot Plugging and USB Inrush Current Limiting
The overvoltage protection circuit provides inrush current
limiting due to the long time it takes for OVGATE to fully
enhance the N-channel MOSFET. This prevents the current
from building up in the cable too quickly thus dampening out any resonant overshoot on VBUS. It is possible to
observe voltage overshoot on VBUS when connecting the
LTC3576/LTC3576-1 to a lab power supply if the overvoltage
protection circuit is not used. This overshoot is caused by
the inductance of the long leads from the power supply to
VBUS. Twisting the wires together from the supply to VBUS
can greatly reduce the parasitic inductance of these long
leads keeping the voltage at VBUS to safe levels. USB cables
are generally manufactured with the power leads in close
proximity, and thus have fairly low parasitic inductance.
3576f
38
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
Hot Plugging and USB On-the-Go
If there is more than 4.3V on VBUS when on-the-go is
enabled, the bidirectional switching regulator will not try
to drive VBUS. If USB on-the-go is enabled and an external
supply is then connected to VBUS, one of three things will
happen depending on the properties of the external supply. If the external supply has a regulation voltage higher
than 5.1V, the bidirectional switching regulator will stop
switching and VBUS will be held at the regulation voltage
of the external supply. If the external supply has a lower
regulation voltage and is capable of only sourcing current
then VBUS will be regulated to 5.1V. The external supply
will not source current to VBUS.
For a supply that can also sink current and has a regulation voltage less than 5.1V, the bidirectional switching
regulator will source current into the external supply in an
attempt to bring VBUS up to 5.1V. As long as the external
supply holds VBUS to more than 4V or VOUT + 70mV, the
bidirectional switching regulator will source up to 680mA
into the supply. If VBUS is held to a voltage that is less than
4V and VOUT + 70mV then the short circuit timer will shut
off the switching regulator after 7.2ms. The CHRG pin will
then blink indicating a short circuit current fault.
VBUS Bypass Capacitance and USB On-The-Go
Session Request Protocol
When two on-the-go devices are connected, one will be the
A device and the other will be the B device depending on
whether the device is connected to a micro A or micro B
plug. The A device provides power to the B device and
starts as the host. To prolong battery life, the A device can
power down VBUS when the bus is not being used. If the A
device has powered down VBUS, the B device can request
the A device to power up VBUS and start a new session using the session request protocol (SRP). The SRP consists
of data-line pulsing and VBUS pulsing. The B device must
ﬁrst pulse the D+ or D– data line. The B device must then
pulse VBUS only if the A device does not respond to the
data-line pulse. The A device is required to respond to only
one of the pulsing methods. A devices that never power
down VBUS are not required to respond to the SRP.
For VBUS pulsing, the limit on the VBUS capacitance on
the A device allows a B device to differentiate between
a powered down on-the-go device and a powered down
standard host. The B device will send out a pulse of current
that will raise VBUS to a voltage between 2.1V and 5.25V if
connected to an on-the-go A device which must have no
more than 6.5μF. An on-the-go A device must drive VBUS
as soon as the current pulse raises VBUS above 2.1V if the
device is capable of responding to VBUS pulsing.
This same current pulse must not raise VBUS any higher
than 2V when connected to a standard host which must
have at least 96μF. The 96μF for a standard host represents
the minimum capacitance with VBUS between 4.75V and
5.25V. Since the SRP pulse must not drive VBUS greater
than 2V, the capacitance seen at these voltage levels can be
greater than 96μF, especially if MLCCs are used. Therefore,
the 96μF represents a lower bound on the standard host
bypass capacitance for determining the amplitude and
duration of the current pulse. More capacitance will only
decrease the maximum level that VBUS will rise to for a
given current pulse.
Figure 11 shows an on-the-go device using the LTC3576/
LTC3576-1 acting as the A device. Additional capacitance
can be placed on the VBUS pin of the LTC3576/LTC3576-1
when using the overvoltage protection circuit. A B device
may not be able to distinguish between a powered down
LTC3576/LTC3576-1 with overvoltage protection and a
powered down standard host because of this extra capacitance. In addition, if the SRP pulse raises VBUS above
its UVLO threshold of 4.3V the LTC3576/LTC3576-1 will
assume input power is available and will not attempt to
drive VBUS. Therefore, it is recommended that an onthe-go device using the LTC3576/LTC3576-1 respond to
data-line pulsing.
When an on-the-go device using the LTC3576/LTC3576-1
becomes the B device, as in Figure 12, it must send out
a data line pulse followed by a VBUS pulse to request a
session from the A device. The on-the-go device designer
can choose how much capacitance will be placed on the
VBUS pin of the LTC3576/LTC3576-1 and then generate
a VBUS pulse that can distinguish between a powered
3576f
39
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
OVP
(OPTIONAL)
OVSENS
ON-THE-GO
POWER
MANAGER
OVGATE
LTC3576/
LTC3576-1
VBUS
ENOTG
CA
<6.5μF
WITHOUT OVP
CB
<6.5μF
D–
ON-THE-GO
TRANSCEIVER
ON-THE-GO
TRANSCEIVER
D+
A DEVICE
B DEVICE
3576 F11
Figure 11. LTC3576/LTC3576-1 as the A Device
OVP
(OPTIONAL)
OVSENS
LTC3576/
LTC3576-1
ENOTG
ON-THE-GO
TRANSCEIVER
STANDARD
USB HOST OR
ON-THE-GO
POWER
MANAGER
OVGATE
VBUS
CA
CB
<6.5μF FOR OTG DEVICES
<6.5μF
WITHOUT OVP >96μF FOR STANDARD HOST
D–
D+
B DEVICE
STANDARD OR
ON-THE-GO
TRANSCEIVER
A DEVICE
3576 F12
Figure 12. LTC3576/LTC3576-1 as the B Device
down on-the-go A device and a powered down standard
host. A suitable pulse can be generated because of the
disparity in the bypass capacitances of an on-the-go A
device and a standard host even if there is somewhat
more than 6.5μF capacitance connected to the VBUS pin
of the LTC3576/LTC3576-1.
The Exposed Pad on the backside of the LTC3576/
LTC3576-1 package must be securely soldered to the PC
board ground. This is the primary ground pin in the package, and it serves as the return path for both the control
circuitry and the N-channel MOSFET switches.
such as the VBUS, VIN1, VIN2 and VIN3 currents tend to ﬁnd
their way on the ground plane along a mirror path directly
beneath the incident path on the top of the board. If there
are slits or cuts in the ground plane due to other traces
on that layer, the current will be forced to go around the
slits. If high frequency currents are not allowed to ﬂow
back through their natural least-area path, excessive
voltage will build up and radiated emissions will occur
(see Figure 13). There should be a group of vias directly
under the grounded backside leading directly down to an
internal ground plane. To minimize parasitic inductance,
the ground plane should be as close as possible to the
top plane of the PC board (layer 2).
Furthermore, due to its high frequency switching circuitry,
it is imperative that the input capacitor, inductor, and
output capacitor be as close to the LTC3576/LTC3576-1
as possible and that there be an unbroken ground plane
under the LTC3576/LTC3576-1 and all of their external
high frequency components. High frequency currents,
The IDGATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an additional offset to
the ideal diode of approximately 10mV. To minimize leakage,
the trace can be guarded on the PC board by surrounding
Board Layout Considerations
3576f
40
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
3576 F13
Figure 13. Higher Frequency Ground Current Follow Their
Incident Path. Slices in the Ground Plane Create Large Loop
Areas. The Large Loop Areas Increase the Inductance of the
Path Leading to Higher System Noise
it with VOUT connected metal, which should generally be
less than one volt higher than IDGATE.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3576/LTC3576-1:
1. The Exposed Pad of the package (Pin 39) should connect directly to a large ground plane to minimize thermal
and electrical impedance.
2. The traces connecting VBUS, VIN1, VIN2, VIN3 and VIN of
the external step-down switching regulator to their respective decoupling capacitors should be as short as possible.
The GND side of these capacitors should connect directly
to the ground plane of the part. These capacitors provide
the AC current to the internal power MOSFETs and their
drivers. It is critical to minimize inductance from these
capacitors to the LTC3576/LTC3576-1 and external stepdown switching regulator.
3. Connections between the step-down switching regulator
(both internal and external) inductors and their respective
output capacitors should be kept as short as possible.
Use area ﬁlls whenever possible. This also applies to the
PowerPath switching regulator inductor and the output
capacitor on VOUT. The GND side of the output capacitors
should connect directly to the thermal ground plane of
the part.
4. The switching power traces connecting SW, SW1,
SW2, SW3 and the switch node of the external step-down
switching regulator to their respective inductors should be
minimized to reduce radiated EMI and parasitic coupling.
Due to the large voltage swing of the switching nodes,
sensitive nodes such as the feedback nodes (FB1, FB2
and FB3) should be kept far away or shielded from the
switching nodes or poor performance could result.
5. Keep the feedback pin traces (FB1, FB2, FB3 and FB of
the external step-down switching regulator) as short as
possible. Minimize any parasitic capacitance between the
feedback traces and any switching node (i.e., SW, SW1,
SW2, SW3 and logic signals). If necessary shield the
feedback nodes with a GND trace
6. Connect VIN1, VIN2 and VIN3 to VOUT through a short
low impedance trace.
3576f
41
LTC3576/LTC3576-1
TYPICAL APPLICATIONS
Minimum Parts Count USB Power Manager with Low-Battery Start-Up and USB On-the-Go
26
USB
ON-THE-GO
35
USB,
WALL ADAPTER
34
C1
10μF
0805
5
6
3
4
29
1
1k
C2
0.1μF
0402
27
VC WALL
VBUS
VBUS
OVGATE
OVSENS
28
ACPR
36
SW
33
VOUT
31
IDGATE
32
BAT
NTCBIAS
L1
3.3μH
C3
22μF
0805
Li-Ion
NTC
VIN1
PROG
SW1
FB1
9
L2
4.7μH
2
1μF
LDO3V3
7
PUSHBUTTON
MICROCONTROLLER
VIN2
DVCC
CHRG
MEMORY
1μF
10pF
10μF
324k
SW2
30
1.76V TO 3.3V
400mA
1.02M
LTC3576/LTC3576-1
12
+
8
CLPROG
3.01k
TO OTHER
LOADS
FB2
24
23
L3
4.7μH
1.61V TO 3.03V
400mA
1.02M
25
I/O
1μF
10pF
10μF
365k
MICROPROCESSOR
13, 14
10
22
C1: MURATA GRM21BR7A106KE51L
C3: TAIYO YUDEN JMK212BJ226MG
L1: COILCRAFT LPS4018-332LM
L2, L3: TOKO 1098AS-4R7M
L4: TOKO 1098AS-2R0M
19
11
37
38
I2C
EN1
VIN3
SW3
EN2
EN3
FB3
16
17
20
0.8V TO 1.51V
1A
751k
ILIM0
RST3
10pF
1μF
10μF
806k
ENOTG
ILIM1
L4
2μH
21
CORE
POR
10k
3576 TA02
3576f
42
LTC3576/LTC3576-1
TYPICAL APPLICATIONS
High Efﬁciency USB/Automotive Power Manager with Overvoltage Protection,
Reverse-Voltage Protection, Low-Battery Start-Up and USB On-the-Go
AUTOMOTIVE
FIREWIRE, ETC.
M1
4
BOOST
VIN
SW
68nF 150k
4.7μF
5
40.2k 10
M3
9
34
5
R1
6.2k
11
1
6
3
T
1k
C2
0.1μF
0402
100k
6
27
VC WALL
VBUS
VBUS
OVGATE
28
ACPR
36
SW
33
VOUT
31
IDGATE
32
BAT
NTCBIAS
L2
3.3μH
CHRG
VIN1
4
NTC
29
PROG
1
CLPROG
SW1
3.01k
FB1
2
1μF
LDO3V3
2.2k
+
8
L3
4.7μH
9
1.76V TO 3.3V
400mA
1.02M
7
MEMORY
1μF
10pF
10μF
324k
VIN2
DVCC
SW2
PUSHBUTTON
MICROCONTROLLER
C3
22μF
0805
30
LTC3576/LTC3576-1
12
TO OTHER
LOADS
M5
Li-Ion
OVSENS
100k
R2
100k
22μF
499k
8
M4
26
35
C1
22μF
0805
M2
D1
RT
FB
PG VC GND BD SYNC
USB
ON-THE-GO
USB,
WALL
ADAPTER
L1
0.47μF 6.8μH
3
LT3480
RUN/SS
7
2
FB2
24
23
L4
4.7μH
1.61V TO 3.03V
400mA
1.02M
25
I/O
1μF
10pF
10μF
365k
MICROPROCESSOR
13, 14
10
22
19
11
37
38
I2C
EN1
VIN3
SW3
EN2
EN3
FB3
16
17
20
0.8V TO 1.51V
1A
751k
10pF
1μF
10μF
806k
ENOTG
ILIM0
ILIM1
L5
2μH
RST3
21
C1, C3: TAYIO YUDEN JMK212BJ226MG
D1: DIODES INC. DFLS240L
L1: TAIYO YUDEN NP06DZB6R8M
L2: COILCRAFT LPS4018-332LM
L3, L4: TOKO 1098AS-4R7M
CORE
POR
10k
3576 TA03
L5: TOKO 1098AS-2R0M
M1,M2,M4, M5: SILICONIX Si2333DS
M3: ON SEMICONDUCTOR NTLJS4114N
R1: 1/10W RESISTOR
R2: CURVE 1
3576f
43
LTC3576/LTC3576-1
TYPICAL APPLICATIONS
High Efﬁciency USB/Automotive Power Manager with Overvoltage Protection, USB On-the-Go, Pushbutton Start,
Automatic Supply Sequencing and 10 Second Push-and-Hold Hard Shutdown
AUTOMOTIVE
FIREWIRE, ETC.
4
4.7μF
VIN
BOOST
SW
68nF 150k
5
40.2k 10
3
LT3480
RUN/SS
9
11
L1
0.47μF 6.8μH
D1
RT
FB
PG VC GND BD SYNC
7
2
1
499k
22μF
100k
8
6
M2
USB
ON-THE-GO
USB,
WALL
ADAPTER
M1
26
35
C1
22μF
0805
34
5
R1
6.2k
6
3
27
VC WALL
VBUS
VBUS
OVGATE
28
ACPR
36
SW
33
VOUT
31
IDGATE
32
BAT
CHRG
100k
R2
100k
T
C2
0.1μF
0402
1k
VIN1
4
NTC
29
PROG
1
CLPROG
SW1
3.01k
FB1
13
12
SDA
VIN3
SCL
EN2
DVCC
SW3
FB3
1k
1.76V TO 3.3V
400mA
9
7
L3
4.7μH
VIN2
4.7k
EN1
EN3
M4
10μF
10μF
10k
11
37
38
ENOTG
ILIM0
1.02M
MEMORY
1μF
10pF
10μF
16
22
0.8V TO 1.51V
1A
17
20
L5
2μH
751k
1μF
10pF
SW2
FB2
CORE
10k
10μF
POR
806k
RST3
1M
+
8
LDO3V3
1μF
2.2k
324k
1μF
2
C3
22μF
0805
30
LTC3576/LTC3576-1
14
TO OTHER
LOADS
M3
Li-Ion
OVSENS
NTCBIAS
L2
3.3μH
21
24
10
1.61V TO 3.03V
400mA
23
25
L4
4.7μH
1.02M
10pF
1μF
5.1k
10μF
SDA
SCL
365k
ILIM1
I/O
5.1k
SEND I2C CODE: “0s1201F8”
3576 TA04
C1, C3: TAYIO YUDEN JMK212BJ226MG
D1: DIODES INC. DFLS240L
L1: TAIYO YUDEN NP06DZB6R8M
L2: COILCRAFT LPS4018-332LM
L3, L4: TOKO 1098AS-4R7M
L5: TOKO 1098AS-2R0M
M1: ON SEMICONDUCTOR NTLJS4114N
M2, M3: SILICONIX Si2333DS
M4: 2N7002
R1: 1/10W RESISTOR
R2: CURVE 1
3576f
44
LTC3576/LTC3576-1
TYPICAL APPLICATIONS
High Efﬁciency USB/Automotive Power Manager with Current Limiting and
Overvoltage Protection on Both Inputs, Low-Battery Start-Up and USB On-the-Go
AUTOMOTIVE
FIREWIRE, ETC.
7.5V TO 36V
TRANSIENTS TO 60V
1
BOOST
VIN
SW
4.7μF
7
L1
0.47μF 4.7μH
8
LT3653
34.2k
3
6
ISENSE
5
VOUT
ILIM
VC
4
USB
ON-THE-GO
USB,
WALL
ADAPTER
M1
26
35
C1
22μF
0805
34
5
R1
6.2k
6
3
VC
GND
HVOK
9
2
28
27
ACPR WALL
VBUS
SW
VBUS
VOUT
IDGATE
OVGATE
BAT
T
1k
C2
0.1μF
0402
36
L2
3.3μH
C3
22μF
0805
31
32
Li-Ion
NTCBIAS
VIN1
4
NTC
29
PROG
1
CLPROG
SW1
3.01k
FB1
2
1μF
LDO3V3
L3
4.7μH
9
PUSHBUTTON
MICROCONTROLLER
VIN2
DVCC
CHRG
1.76V TO 3.3V
400mA
1.02M
7
MEMORY
1μF
10pF
10μF
324k
SW2
30
+
8
LTC3576/LTC3576-1
12
TO OTHER
LOADS
33
OVSENS
100k
R2
100k
22μF
D1
FB2
24
23
L4
4.7μH
1.61V TO 3.03V
400mA
1.02M
25
I/O
1μF
10pF
10μF
365k
MICROPROCESSOR
13, 14
10
22
19
11
37
38
I2C
EN1
VIN3
SW3
EN2
EN3
FB3
16
17
20
0.8V TO 1.51V
1A
751k
10pF
1μF
10μF
806k
ENOTG
ILIM0
ILIM1
L5
2μH
RST3
POR
10k
21
C1, C3: TAYIO YUDEN JMK212BJ226MG
D1: DIODES INC. DFLS140
L1: COILCRAFT MSS6132-472MLC
L2: COILCRAFT LPS4018-332LM
L3, L4: TOKO 1098AS-4R7M
L5: TOKO 1098AS-2R0M
CORE
3576 TA05
M1: FAIRCHILD FDN327S
R1: 1/10W RESISTOR
R2: CURVE 1
3576f
45
LTC3576/LTC3576-1
TYPICAL APPLICATIONS
High Efﬁciency USB/Wall Power Manager with Dual Overvoltage Protection,
Reverse-Voltage Protection, Low-Battery Start-Up and USB On-The-Go
5V WALL
ADAPTER
M3
M1
C1
22μF
0805
M5
USB
ON-THE-GO
USB
5
35
M2
M4
C2
22μF
0805
R1
6.2k
34
26
6
3
27
OVGATE WALL
VBUS
VBUS
VC
28
ACPR
36
SW
33
VOUT
31
IDGATE
32
BAT
CHRG
100k
R2
100k
T
1k
C3
0.1μF
0402
VIN1
4
NTC
29
PROG
1
CLPROG
SW1
3.01k
FB1
2
1μF
LDO3V3
2.2k
+
8
L2
4.7μH
9
1.76V TO 3.3V
400mA
1.02M
7
MEMORY
1μF
10pF
10μF
324k
VIN2
DVCC
SW2
PUSHBUTTON
MICROCONTROLLER
C4
22μF
0805
30
LTC3576/LTC3576-1
12
TO OTHER
LOADS
M6
Li-Ion
OVSENS
NTCBIAS
L1
3.3μH
FB2
24
23
L3
4.7μH
1.61V TO 3.03V
400mA
1.02M
25
I/O
1μF
10pF
10μF
365k
MICROPROCESSOR
13, 14
10
22
19
11
37
38
I2C
EN1
VIN3
SW3
EN2
EN3
FB3
16
17
20
0.8V TO 1.51V
1A
751k
10pF
1μF
10μF
806k
ENOTG
ILIM0
ILIM1
L4
2μH
RST3
21
C1, C2, C4: TAYIO YUDEN JMK212BJ226MG
L1: COILCRAFT LPS4018-332LM
L2, L3: TOKO 1098AS-4R7M
L4: TOKO 1098AS-2R0M
CORE
POR
10k
3576 TA07
M1, M2, M5, M6: SILICONIX Si2333DS
M3, M4: FAIRCHILD FDN327S
R1: 1/10W RESISTOR
R2: CURVE 1
3576f
46
LTC3576/LTC3576-1
PACKAGE DESCRIPTION
UFE Package
38-Lead Plastic QFN (4mm × 6mm)
(Reference LTC DWG # 05-08-1750 Rev A)
0.70 ±0.05
4.50 ± 0.05
3.10 ± 0.05
2.40 REF
2.65 ± 0.05
4.65 ± 0.05
PACKAGE OUTLINE
0.20 ±0.05
0.40 BSC
4.40 REF
5.10 ± 0.05
6.50 ± 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.75 ± 0.05
4.00 ± 0.10
PIN 1 NOTCH
R = 0.30 OR
0.35 s 45°
CHAMFER
R = 0.10
TYP
2.40 REF
37
38
0.40 ± 0.10
PIN 1
TOP MARK
(NOTE 6)
1
2
4.65 ± 0.10
6.00 ± 0.10
4.40 REF
2.65 ± 0.10
(UFE38) QFN 0707 REV A
0.200 REF
0.00 – 0.05
R = 0.115
TYP
0.20 ± 0.05
0.40 BSC
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3576f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
47
LTC3576/LTC3576-1
TYPICAL APPLICATION
Firewire/Automotive Battery Charger with Automatic USB On-the-Go and Overvoltage Protection
AUTOMOTIVE
FIREWIRE, ETC.
7.5V TO 36V
TRANSIENTS TO 60V
1
VIN
BOOST
SW
4.7μF
7
8
LT3653
34.2k
3
ILIM
ISENSE
5
VOUT
4
USB
ON-THE-GO
M1
VBUS
C1
22μF
0805
D–
D+
26
35
34
5
ID
6.2k
GND
6
22μF
D1
6
VC
J1
MICRO-AB
L1
0.47μF 4.7μH
VC
GND
9
28
ACPR
HVOK
2
27
WALL
VBUS
SW
VBUS
VOUT
OVGATE
BAT
36
L2
3.3μH
TO OTHER
LOADS
33
C2
22μF
0805
32
Li-Ion
OVSENS
+
LTC3576/LTC3576-1
TO USB
TRANSCEIVER
2
1μF
LDO3V3
PROG
CLPROG
300k
29
1
3.01k
M2
11
ENOTG
C3
0.1μF
0402
1k
3576 TA06
VBUS POWERS UP WHEN ID PIN HAS LESS THAN 10Ω TO GND (MICRO-A PLUG CONNECTED)
C1, C2: TAIYO YUDEN JMK212BJ226MG
D1: DIODES INC. DFLS140
J1: HIROSE ZX62-AB-5PA
L1: COILCRAFT MSS6132-472MLC
L2: COILCRAFT LPS4018-332LM
M1: FAIRCHILD FDN372S
M2: SILICONIX Si2333DS
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3555/LTC3555-1
LTC3555-3
Switching USB Power Manager with Li-Ion/Polymer
Chargers Plus Triple Buck DC/DC
Maximizes Available Power from USB Port, Bat-Track, 1.5A Max Charge
Current, 180mΩ Ideal Diode with <50mΩ Option, 3.3V/25mA Always-On
LDO, Two 400mA and One 1A Buck Regulators, “Instant On” Operation
(LTC3555-1), “Instant On” Operation and 4.1V Float Votlage (LTC3555-3),
4mm × 5mm 28-Pin QFN Package
LTC3556
Switching USB Power Manager with Li-Ion/Polymer
Charger Plus Dual Buck Plus Buck-Boost DC/DC
Maximizes Available Power from USB Port, Bat-Track, “Instant On”
Operation, 1.5A Max Charge Current, 180mΩ Ideal Diode with <50mΩ
Option, 3.3V/25mA Always-On LDO, Two 400mA Buck Regulators, One
1A Buck-Boost Regulator, 4mm × 5mm 28-Pin QFN Package
LTC3586
Switching USB Power Manager with Li-Ion/Polymer
Charger Plus Dual Buck Plus Buck-Boost Plus Boost
DC/DC
Maximizes Available Power from USB Port, Bat-Track, “Instant On”
Operation, 1.5A Max Charge Current, 180mΩ Ideal Diode with <50mΩ
Option, 3.3V/25mA Always-On LDO, Two 400mA Synchronous Buck
Regulators, One 1A Buck-Boost Regulator, One 600mA Boost Regulator,
4mm × 6mm 38-Pin QFN Package
LTC4098/LTC4098-1
Switching USB Power Manager and Battery Chargers
With Overvoltage Protection
Maximizes Available Power from USB Port, Bat-Track, “Instant On”
Operation, 1.5A Max Charge Current, 180mΩ Ideal Diode with <50mΩ
Option, Controller for External High Voltage Buck Regulator, Protection
Against Transients of Up to 60V, 3.3V/25mA Always-On LDO,4.1V Float
Voltage (LTC4098-1), 4mm × 3mm 14-Pin DFN Package
Power Management
3576f
48 Linear Technology Corporation
LT 0908 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008

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