19-3801; Rev 2; 1/06 ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors Features The MAX13481E/MAX13482E/MAX13483E ±15kV ESDprotected USB-compliant transceivers interface lowvoltage ASICs with USB devices. The transceivers fully comply to USB 2.0 when operating at full-speed (12Mbps). The transceivers also operate with VL as low as 1.6V, ensuring compatibility with low-voltage ASICs. ♦ Active-Low Enumeration Input Controls D+ Pullup Resistor (MAX13482E) ♦ Active-Low Enumeration Input Controls Internal Pullup Switch (MAX13481E) ♦ ±15kV ESD Protection on D+ and D♦ USB 2.0 Full-Speed Compliant Transceiver ♦ VBUS Detection (MAX13482E/MAX13483E) ♦ +1.60V to +3.6V VL Allows Connection with LowVoltage ASICs ♦ No Power-Supply Sequencing Required ♦ Pin Compatible with MIC2551A (MAX13481E) ♦ Pin Compatible with DP1680 (MAX13483E) ♦ Pin Compatible with DP1681 (MAX13481E) ♦ Pin Compatible with DP1682 (MAX13482E) The MAX13481E/MAX13482E/MAX13483E feature a logic-selectable suspend mode that reduces current consumption. Integrated ±15kV ESD circuitry protects D+ and D- bus connections. The MAX13481E/MAX13482E/MAX13483E operate over the extended -40°C to +85°C temperature range and are available in a 16-pin (3mm x 3mm) thin QFN package. Applications Cell Phones PDAs Digital Still Cameras Selector Guide ENUM INPUT INTERNAL 1.5kΩ RESISTOR VBUS DETECTION MAX13481EETE ✓ — — MAX13482EETE ✓ ✓ ✓ MAX13483EETE — — ✓ PART Ordering Information TOP MARK PKG CODE MAX13481EETE 3mm X 3mm TQFN-EP* ADF T1633-4 MAX13482EETE 3mm X 3mm TQFN-EP* ADI T1633-4 MAX13483EETE 3mm X 3mm TQFN-EP* ADJ T1633-4 PART PIN-PACKAGE *EP = Exposed Paddle. Typical Operating Circuits appear at end of data sheet. D+ D- OE VTRM D+ D- OE TOP VIEW VTRM Pin Configurations 12 11 10 9 12 11 10 9 VPU (VPUR) 13 8 N.C. I.C. 13 *EP 7 SUS GND 5 ENUM BD 16 5 N.C. 4 1 N.C. 6 VM VL 15 3 *EXPOSED PADDLE 7 GND 2 TQFN 3mm x 3mm N.C. 6 VP SP (N.C.) 1 8 MAX13483E RCV N.C. (BD) 16 VBUS 14 2 3 4 VM VL 15 SUS VP MAX13481E MAX13482E RCV VBUS 14 *EP TQFN 3mm x 3mm *EXPOSED PADDLE ( ) MAX13482E ONLY ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX13481E/MAX13482E/MAX13483E General Description MAX13481E/MAX13482E/MAX13483E ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND, unless otherwise noted.) VBUS, VL, ..................................................................-0.3V to +7V VTRM, VPUR, VPU .....................................-0.3V to (VBUS + 0.3V) Input Voltage (D+, D-) ..............................................-0.3V to +7V VM, VP, SUS, RCV, ENUM, BD, OE, ............-0.3V to (VL + 0.3V) Short-Circuit Current to VCC or GND (D+, D-)… ........... ±150mA Maximum Continuous Current (all other pins) ..................±15mA Continuous Power Dissipation (TA = +70°C) 16-Pin, 3mm x 3mm TQFN (derate 15.6mW/°C above +70°C).......................................................................1250mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +4V to +5.5V, VL = +1.6V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SUPPLY INPUTS (VBUS, VTRM, VL) VBUS Input Range VL Input Range Regulated Supply-Voltage Output Operating VCC Supply Current Operating VL Supply Current VBUS 4.0 5.5 V VL 1.6 3.6 V VVTRM IVCC IVL 3.6 V Full-speed transmitting/receiving at 12Mbps, CL = 50pF on D+ and D- (Note 2) 3.0 3.3 10 mA Full-speed transmitting/receiving at 12Mbps, CL = 15pF receiver outputs, VL = 2.5V (Note 2) 2.5 mA Full-speed idle, VD+ > 2.7V, VD- < 0.3V 250 350 SE0: VD+ < 0.3V, VD- < 0.3V 250 350 Full-Speed Idle and SE0 Supply Current IVCC(IDLE) Static VL Supply Current IVL(STATIC) Full-speed idle, SE0 or suspend mode 5 µA Suspend Supply Current IVCC(SUSP) VM = VP = open, ENUM = SUS = OE = high 35 µA 20 µA Disabled-Mode Supply Current IVCC(DIS) VL = GND or open µA Sharing-Mode VL Supply Current VBUS = GND or open, OE = low, IVL(SHARING) VP = low or high, VM = low or high, SUS = high, ENUM = high 5 µA Disable-Mode Load Current on D+ and D- IDX(DISABLE) VL = GND or open, VD_ = 0 or 5.5V 5 µA Sharing-Mode Load Current on D+ and D- IDX(SHARING) VBUS = GND or open, VD_ = 0 or 5.5V 20 µA VL ≥ 1.7V 0.8 V VL < 1.7V 0.7 USB Power-Supply Detection Threshold VTH_H VTH_L Supply present Supply lost 3.6 USB Power-Supply Detection Hysteresis VHYST 75 mV VL Supply-Voltage Detection Threshold VTH(VL) 0.85 V 2 _______________________________________________________________________________________ ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors (VCC = +4V to +5.5V, VL = +1.6V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL ANALOG VOLTAGE OUTPUTS (VPU, VPUR) Off-State Leakage ILZ CONDITIONS ENUM = VL MIN TYP -1 VPU Switch Resistance MAX13481E VPUR Pullup Resistance MAX13482 (Note 3) MAX UNITS +1 µA 1.575 kΩ Ω 10 1.425 DIGITAL INPUTS/OUTPUTS (VP,VM, RCV, OE, ENUM, SUS, BD) Input-High Voltage VIH VP, VM, OE, ENUM, SUS Input-Low Voltage VIL VP, VM, OE, ENUM, SUS Output Voltage High VOH VP, VM, RCV, BD, ISOURCE = 2mA Output Voltage Low VOL VP, VM, RCV, BD, ISINK = 2mA Input Leakage Current ILKG Input Capacitance 0.7 x VL VL - 0.4 Differential Common-Mode Voltage Range |(VD+ - VD-)| 200 VCM Include VDI 0.8 Single-Ended Input-Low Voltage VIL Single-Ended Input-High Voltage VIH 0.4 V +1 µA 10 VDI pF mV 2.5 0.8 2.0 Hysteresis VHYS Output Voltage Low VOL RL = 1.5kΩ from D+ or D- to 3.6V Output Voltage High VOH RL = 15kΩ to GND 2.8 Off-State Leakage Current Transceiver Capacitance Three-state driver D_ to GND -1 CIND Driver Output Impedance ROUT V V -1 Measured from input to GND ANALOG INPUT/OUTPUTS (D+, D-) Differential Input Sensitivity V 0.3 x VL V V V 250 mV 0.3 V 3.6 V +1 µA pF 15 Ω 20 2 ESD PROTECTION (D+, D-) Human Body Model ±15 kV IEC 61000-4-2 Contact Discharge ±8 kV TIMING CHARACTERISTICS (VCC = +4V to +5.5V, VL = +1.6V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DRIVER CHARACTERISTICS (CL = 50pF) Rise Time D+/D- tFR 10% to 90% of |VOH-VOL| (Figures 1, 9) 4 20 ns Fall Time D+/D- tFF 90% to 10% of |VOH-VOL| (Figures 1, 9) 4 20 ns Excluding the first transition from idle state, (Figure 1) (Note 2) 90 110 % Rise- and Fall-Time Matching tFR/tFF _______________________________________________________________________________________ 3 MAX13481E/MAX13482E/MAX13483E ELECTRICAL CHARACTERISTICS (continued) TIMING CHARACTERISTICS (continued) (VCC = +4V to +5.5V, VL = +1.6V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL Output Signal Crossover Voltage VCRS CONDITIONS MIN (Figure 2) (Note 2) TYP MAX 1.3 UNITS 2 V 18 ns tPLH_DRV Low-to-high transition (Figure 2) tPHL_DRV High-to-low transition (Figure 2) 18 ns tPZH_DRV Off-to-high transition (Figures 3, 10) 20 ns tPZL_DRV Off-to-low transition (Figures 3, 10) 20 ns tPHZ_DRV High-to-off transition (Figures 3, 10) 20 ns tPLZ_DRV Low-to-off transition (Figures 3, 10) 20 ns tPLH_RCV Low-to-high transition (Figures 4, 9) 20 tPHL_RCV High-to-low transition (Figures 4, 9) 20 Single-Ended Receiver Propagation Delay tPLH_SE Low-to-high transition (Figures 4, 9) 12 tPHL_SE High-to-low transition (Figures 4, 9) 12 Single-Ended Receiver Disable Delay tPHZ_SE High-to-off transition (Figure 5) 15 tPLZ_SE Off-to-low transition (Figure 5) 15 Single-Ended Receiver Enable Delay tPZH_SE Off-to-high transition (Figure 5) 15 tPZL_SE Off-to-low transition (Figure 5) 15 Driver Propagation Delay Driver-Enabled Delay Time Driver Disabled Delay RECEIVER (CL = 15pF) Differential Receiver Propagation Delay ns ns ns ns Note 1: Parameters are 100% production tested at +25°C, unless otherwise noted. Limits over temperature are guaranteed by design. Note 2: Guaranteed by design, not production tested. Note 3: Including external 27Ω series resistor. Typical Operating Characteristics (VBUS = 5V, VL = +3.3V, TA = +25°C, unless otherwise noted.) DIFFERENTIAL RECEIVER PROPAGATION DELAY vs. TEMPERATURE TA = +85°C 13.0 12.5 TA = +25°C 12.0 11.5 11.0 TA = -40°C 14 13 12 11 10 9 6 10.0 2.0 2.4 2.8 VL (V) 6 TA = +85°C 5 4 TA = +25°C 3 TA = -40°C 2 1 7 1.6 7 MAX13481 toc03 15 8 10.5 4 MAX13481E toc02 13.5 16 PROPAGATION DELAY (ns) MAX13481E toc01 14.0 SINGLE-ENDED RECEIVER PROPAGATION DELAY vs. VL PROPAGATION DELAY (ns) DIFFERENTIAL RECEIVER PROPAGATION DELAY vs. VL PROPAGATION DELAY (ns) MAX13481E/MAX13482E/MAX13483E ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors 3.2 3.6 0 -40 -15 10 35 TEMPERATURE (°C) 60 85 1.6 2.0 2.4 _______________________________________________________________________________________ 2.8 VL (V) 3.2 3.6 ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors TRANSMITTER SKEW vs. TEMPERATURE 1.6 3 2 1.4 1.2 1.0 0.8 0.6 100 0.4 1 MAX13481E toc06 MAX13481E toc05 1.8 TRANSMITTER SKEW (ns) 4 PROPAGATION DELAY (ns) 2.0 MAX13481E toc04 5 VL SUSPEND CURRENT vs. TEMPERATURE VL SUSPEND CURRENT (μA) SINGLE-ENDED RECEIVER PROPAGATION DELAY vs. TEMPERATURE 10 1 0.1 0.2 60 -40 85 -40 85 18 17 TA = -40°C 15 14 14 12 10 8 6 4 4.3 4.6 4.9 VBUS (V) 5.2 85 1.50 1.45 1.40 1.35 1.30 VL = 2.5V 1.25 1.20 1.15 1.10 VL = 1.8V 0 10 20 30 40 50 60 70 80 90 100 CAPACITANCE (pF) TRANSMIT MODE (OE = LOW) 60 1.00 0 10 20 30 40 50 60 70 80 90 100 5.5 35 1.05 0 4.0 10 VL SUPPLY CURRENT vs. D+/D- CAPACITANCE 2 13 -15 TEMPERATURE (°C) 16 VBUS SUPPLY CURRENT (mA) TA = +25°C 16 60 18 MAX13481E toc07 20 TA = +85°C 10 35 TEMPERATURE (°C) VBUS SUPPLY CURRENT vs. D+/D- CAPACITANCE VBUS SUSPEND CURRENT vs. VBUS 19 -15 MAX13481E toc09 10 35 TEMPERATURE (°C) VBUS SUPPLY CURRENT (mA) -15 MAX13481E toc08 -40 VBUS SUPPLY CURRENT (μA) 0.01 0 0 CAPACITANCE (pF) SUSPEND MODE RECEIVE MODE (OE = HIGH) MAX13481E toc10 MAX13481E toc12 MAX13481E toc11 VP SUS 2V/div D+ 1V/div 1V/div D+ VM D- 2V/div D+ DRCV 1V/div 1V/div RCV 2V/div D10ns/div 10ns/div 20ns/div _______________________________________________________________________________________ 5 MAX13481E/MAX13482E/MAX13483E Typical Operating Characteristics (continued) (VBUS = 5V, VL = +3.3V, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VBUS = 5V, VL = +3.3V, TA = +25°C, unless otherwise noted.) TRANSMISSION IN SUSPEND MODE BUS DETECT RESPONSE MAX13481E toc14 MAX13481E toc13 D+ VBUS 2V/div 1V/div DVP BD 1V/div 1V/div VM 1μs/div 20ns/div EYE DIAGRAM OE, VP, VM TIMING MAX13481E toc16 MAX13481E toc15 4 OE 2V/div VM 2V/div 3 D+ AND D- (V) VP 2V/div 2 1 0 -1 20ns/div 0 10 20 30 40 50 60 70 80 TIME (ns) Pin Description 6 MAX13482E MAX13483E PIN MAX13481E MAX13481E/MAX13482E/MAX13483E ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors 8, 16 1, 8 1, 5, 8 N.C. 1 — — SP 2 2 2 RCV 3 3 3 VP NAME FUNCTION No Connection. Not internally connected. Connect to VL for Pin Compatibility to the MIC2551A or Leave Floating. Not internally connected. Differential Receiver Output. RCV responds to the differential input on D+ and D-. RCV asserts low when SUS = VL. Receiver Output/Driver Input. VP functions as a receiver output when OE = VL. VP duplicates D+ when receiving. VP functions as a driver input when OE = GND. _______________________________________________________________________________________ ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors PIN NAME FUNCTION Receiver Output/Driver Input. VM functions as a receiver output when OE = VL. VM duplicates D- when receiving. VM functions as a driver input when OE = GND. 4 4 4 VM 5 5 — ENUM 6 6 6 GND Ground 7 7 7 SUS Suspend Input. Drive SUS low for normal operation. Drive SUS high for low-power state. RCV asserts low and D+/ D- are high impedance in suspend mode. VP and VM remain active in suspend mode. 9 9 9 OE Output Enable. Drive OE to GND to enable the D+/D- transmitter outputs. Drive OE to VL to disable the transmitter outputs. OE also controls the I/O directions of VP and VM (see Tables 3 and 4). 10 10 10 D- USB Input/Output. For OE = GND, D- functions as a USB output with VM providing the input signal. For OE = VL, D- functions as a USB input with VM functioning as a single-ended receiver output. 11 11 11 D+ USB Input/Output. For OE = GND, D+ functions as a USB output with VP providing the input signal. For OE = VL, D+ functions as a USB input with VP functioning as a singleended receiver output. Active-Low Enumerator-Function-Selection Input. ENUM controls the pullup resistor or switch connection. See the ENUM section. 12 12 12 VTRM Regulated Output Voltage. VTRM provides a 3.3V output derived from VBUS. Bypass VTRM to GND with a 1µF (min) low-ESR capacitor such as ceramic or plastic film types. VTRM provides power to internal circuitry, the internal D+ pullup resistor, VPU and VPUR. Do not use VTRM to power external circuitry. 13 — — VPU Pullup Voltage. For ENUM = GND, VPU is pulled to an internal 3.3V voltage. Connect a 1.5kΩ resistor between D+ and VPU for full-speed operation. For ENUM = VL, VPU is high impedance. — — 13 I.C. Internally Connected. Leave open. Do not connect to external circuitry. — 13 — VPUR Internal Pullup Resistor. VPUR is pulled to an internal 3.3V voltage through a 1.5kΩ resistor (ENUM = GND). Connect VPUR to D+ for full-speed operation. For ENUM = VL, VPU is high impedance. USB-Side Power-Supply Input. Connect a +4V to +5.5V power supply to VBUS. VBUS supplies power to the internal regulator. Bypass VBUS to GND with a 1µF ceramic capacitor. Connect VBUS and VTRM together when powering the MAX13481E/MAX13482E/ MAX13483E with an external power supply. 14 14 14 VBUS 15 15 15 VL Digital Input/Output Connection Logic Supply. Connect a +1.6V to +3.6V supply to VL. Bypass VL to GND with a 0.1µF (min) low-ESR ceramic capacitor. — 16 16 BD USB Detector Output (Push/Pull). A high at BD signals to the ASIC that VBUS is present. EP EP EP EP Exposed Paddle. Connect EP to GND. _______________________________________________________________________________________ 7 MAX13481E/MAX13482E/MAX13483E Pin Description (continued) MAX13481E/MAX13482E/MAX13483E ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors Detailed Description Applications Information The MAX13481E/MAX13482E/MAX13483E ±15kV ESDprotected USB-compliant transceivers convert singleended or differential logic-level signals to USB signals, and USB signals to single-ended or differential logic signals. These devices fully comply to USB 2.0 when operating at full-speed (12Mbps), and operate with VL as low as 1.6V, ensuring compatibility with low-voltage ASICs. Integrated ±15kV ESD-circuitry protection protects D+ and D- bus connections. The MAX13481E/MAX13483E require an external 1.5kΩ pullup resistor to VTRM for full-speed operation. The MAX13481E requires an external 1.5kΩ pullup resistor and feature an active-low enumeration function that connects a +3.3V voltage at VPU. The MAX13482E features an active-low enumeration function that connects a 1.5kΩ pullup resistor at VPUR for full-speed operation. The MAX13482E/MAX13483E also provide a bus detect (BD) output that asserts high when VBUS > 3.6V. Power-Supply Configurations Normal Operating Mode Connect VL and VBUS to system power supplies (Table 1). Connect VL to a +1.6V to +3.6V supply. Connect VBUS to a +4.0V to +5.5V supply or to the VBUS connector. Alternatively, these parts can derive power from a single Li+ cell. Connect the battery to VBUS. VTRM remains above +3.0V for VBUS as low as +3.1V. Additionally, the devices can be powered by an external +3.3V ±10% voltage regulator. Connect VBUS and VTRM to an external +3.3V voltage regulator. VBUS no longer consumes current to power the internal linear regulator in this configuration. The bus detect function (BD) on the MAX13482E and MAX13483E does not function when the device is powered this way. Disable Mode Connect VBUS to a system power supply and leave VL unconnected or connect to GND. D+ and D- enter a tristate mode and VBUS (or VBUS and VTRM) consumes less than 20µA of supply current. D+ and D- withstand external signals up to +5.5V in disable mode (Table 2). Table 1. Power-Supply Configuration VBUS (V) VTRM (V) VL (V) CONFIGURATION NOTES +4.0 to +5.5 +3.0 to +3.6 output +1.6 to +3.6 Normal mode — +4.0 to +5.5 +3.0 to +3.6 output GND or floating Disable mode Table 2 GND or floating High Z +1.6 to +3.6 Sharing mode Table 2 +3.1 to +4.5 +3.0 to +3.6 output +1.6 to +3.6 Battery supply +3.0 to +3.6 +3.0 to +3.6 input +1.6 to +3.6 Voltage regulator supply — Table 2. Disable-Mode and Sharing-Mode Connection INPUTS/OUTPUTS DISABLE MODE SHARING MODE VBUS / VTRM 4V to 5.5V Floating or connected to GND VL Floating or connected to GND 1.6V to 3.6V input D+ and D- High impedance High impedance For OE = low, high impedance VP and VM Invalid* RCV Invalid* Undefined BD (MAX13482E/MAX13483E) Invalid* Low For OE = high, output logic high *High impedance or logic low 8 _______________________________________________________________________________________ ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors Table 3. Transmit Truth Table (OE = 0) INPUTS OUTPUTS VP VM D+ D- 0 0 0 0 Device Control OE 0 1 0 1 1 0 1 0 OE controls the direction of communication. Drive OE low to transfer data from the logic side to the USB side. For OE = low, VP and VM serve as differential driver inputs to the USB transmitter. Drive OE high to transfer data from the USB side to the logic side. For OE = high, VP and VM serve as single-ended receiver outputs from the USB inputs (D+ and D-). RCV serves as a differential receiver output, regardless of the state of OE. 1 1 1 1 ENUM (MAX13481E/MAX13482E) The MAX13481E/MAX13482E feature an active-low enumerate function that allows software control of the 1.5kΩ pullup resistor and switch to D+ for full-speed operation. For the MAX13481E, connect a 1.5kΩ pullup resistor between D+ and VPU. The MAX13481E provides an internal switch that pulls VPU to a +3.3V voltage. Drive ENUM high to disconnect VPU from voltage. Drive ENUM low to connect VPU and the external pullup resistor to the +3.3V voltage. The MAX13482E has an internal 1.5kΩ resistor that connects at VPUR. Connect VPUR directly to D+. Drive ENUM high to disconnect the internal pullup resistor at VPUR. Drive ENUM low to connect the internal pullup resistor to VPUR. SUS The SUS state determines whether the MAX13481E/ MAX13482E/MAX13483E operate in normal mode or in suspend mode. Connect SUS to GND to enable normal operation. Drive SUS high to enable suspend mode. RCV asserts low and VP and VM remain active in suspend mode (Tables 3 and 4). In suspend mode, supply current is reduced. MAX13481E/MAX13482E/MAX13483E Sharing Mode Connect VL to a system power supply and leave VBUS (or VBUS and VTRM) unconnected or connect to GND. D+ and D- enter a tri-state mode, allowing other circuitry to share the USB D+ and D- lines. VL consumes less than 20µA of supply current. D+ and D- withstand external signals up to +5.5V in sharing mode (Table 2). Table 4a. Receive Truth Table (OE = 1) INPUTS OUTPUTS D+ D- VP VM RCV 0 0 0 0 RCV* 0 1 0 1 0 1 0 1 0 1 1 1 1 1 X * = Last state X = Undefined Table 4b. Receive Truth Table (OE = 1, SUS = 1) INPUTS OUTPUTS D+ D- VP VM RCV 0 0 0 0 0 0 1 0 1 0 1 0 1 0 0 1 1 1 1 0 _______________________________________________________________________________________ 9 MAX13481E/MAX13482E/MAX13483E ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors VTRM An internal linear regulator generates the VTRM voltage (+3.3V, typ). VTRM derives power from VBUS (see the Power-Supply Configurations section). VTRM powers the internal portions of the USB circuitry and provides the pullup voltage for the MAX13481E/MAX13482E. Bypass VTRM to GND with a 1µF ceramic capacitor as close to the device as possible. Do not use VTRM to provide power to any other external circuitry. D+ and DD+ and D- serve as bidirectional bus connections and are ESD-protected to ±15kV (Human Body Model). For OE = low, D+ and D- serve as transmitter outputs. For OE = high, D+ and D- serve as receiver inputs. BD (MAX13482E/MAX13483E) The push-pull bus detect (BD) output monitors VBUS and asserts high if V BUS is greater than V TH_H. BD asserts low if V BUS is less than V TH_L , and the MAX13482E/MAX13483E enter sharing mode (Table 2). Data Transfer Transmitting Data to the USB To transmit data to the USB, drive OE low. The MAX13481E/MAX13482E/MAX13483E transmit data to the USB differentially on D+ and D-. VP and VM serve as input signals to the differential driver and are also used to assert a single-ended zero (SE0) driver (see Table 3). Receiving Data from the USB To receive data from the USB, drive OE high and SUS low. Differential data received by D+ and D- appears at RCV. Single-ended receivers on D+ and D- drive VP and VM, respectively. RCV RCV monitors D+ and D- when receiving data. RCV is a logic 1 for D+ high and D- low. RCV is a logic 0 for D+ low and D- high. RCV retains its last valid state when D+ and D- are both low (single-ended zero, or SE0). ESD Protection VBUS For most applications, VBUS connects to the VBUS terminal on the USB connector (see the Power-Supply Configurations section). VBUS can also connect to an external supply. Drive V BUS low to enable sharing mode. Bypass VBUS to GND with a 1µF ceramic capacitor as close to the device as possible. D+ and D- possess extra protection against static electricity to protect the devices up to ±15kV. The ESD structures withstand high ESD in all operating modes: normal operation, suspend mode, and powered down. D+ and D- provide protection to the following limits: External Components • ±8kV using the Contact Discharge method specified in IEC 61000-4-2 External Capacitors The MAX13481E/MAX13482E/MAX13483E require three external capacitors for proper operation. Bypass VL to GND with a 0.1µF ceramic capacitor. Bypass VBUS to GND with a 1µF ceramic capacitor. Bypass V TRM to GND with a 1µF (min) ceramic capacitor. Install all capacitors as close to the device as possible. External Resistor Proper USB operation requires two external resistors, each 27Ω ±1%. Install one resistor in series between D+ of the MAX13481E/MAX13482E/MAX13483E and D+ on the USB connector. Install the other resistor in series between D- of the MAX13481E/MAX13482E/MAX13483E and D- on the USB connector (see the Typical Operating Circuits). The MAX13483E requires an external 1.5kΩ pullup resistor between VTRM and D+ for full-speed operation. The MAX13481E requires an external 1.5kΩ pullup resistor between VPU and D+ for full-speed operation. The MAX13482E does not require an external pullup resistor but VPUR must be connected to D+ for full-speed operation. 10 • ±15kV using the Human Body Model • To protect VBUS from ±15kV ESD, a 1µF or greater capacitor must be connected from VBUS to GND. ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results. Human Body Model Figure 6 shows the Human Body Model and Figure 7 shows the current waveform generated when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which then discharges into the test device through a 1.5kΩ resistor. IEC 61000-4-2 The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment. It does not specifically refer to integrated circuits. The major difference between tests done using the Human Body Model and IEC 61000-4-2 is a higher peak current in IEC 61000-42, due to lower series resistance. Hence, the ESD with- ______________________________________________________________________________________ ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors tFR, tLR tFF, tLF VOHD 90% 90% OE 10% 10% VOLD VP/VM CONNECTED TO GND, D+/D- CONNECTED TO PULLUP D+/D- Figure 1. Rise and Fall Times tPLZ_DRV tPZL_DRV VP AND VM RISE/FALL TIMES < 4ns VM VP/VM CONNECTED TO VL, D+/D- CONNECTED TO PULLDOWN OE VP tPLH_DRV tPHL_DRV D- D+/D- tPHZ_DRV tPZH_DRV VCRS_F , VCRS_L D+ Figure 2. Timing of VP and VM to D+ and D- Figure 3. Driver’s Enable and Disable Timing stand voltage measured to IEC 61000-4-2 generally is lower than that measured using the Human Body Model. Figure 8 shows the IEC 61000-4-2 model. The Contact Discharge method connects the probe to the device before the probe is charged. tance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. All pins require this protection during manufacturing, not just inputs and outputs. After PC board assembly, the Machine Model is less relevant to I/O ports. Machine Model The Machine Model for ESD tests all connections using a 200pF storage capacitor and zero discharge resis- ______________________________________________________________________________________ 11 MAX13481E/MAX13482E/MAX13483E Timing Diagrams MAX13481E/MAX13482E/MAX13483E ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors Timing Diagrams (continued) RC 1MΩ RD 1.5kΩ INPUT RISE/FALL TIME < 4ns +3V CHARGE-CURRENTLIMIT RESISTOR DISCHARGE RESISTANCE D+/D- HIGHVOLTAGE DC SOURCE 0V VL tPLH_RCV, tPLH_SE Cs 100pF DEVICE UNDER TEST STORAGE CAPACITOR Figure 6. Human Body ESD Test Model tPHL_RCV, tPHL_SE RCV, VM, AND VP IP 100% 90% Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) Figure 4. D+/D- Timing to VP, VM, and RCV AMPERES 36.8% 10% 0 0 OE tRL D+/D- CONNECTED TO GND, VP/VM CONNECTED TO PULLUP Figure 7. Human Body Model Current Waveform VP/VM tPLZ_SE tPZL_SE RC 50Ω to 100Ω D+/D- CONNECTED TO +3V, VP/VM CONNECTED TO PULLDOWN OE CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE VP/VM tPHZ_SE Cs 150pF RD 330Ω DISCHARGE RESISTANCE STORAGE CAPACITOR tPZH_SE Figure 5. Receiver’s Enable and Disable Timing 12 TIME tDL CURRENT WAVEFORM Figure 8. IEC 61000-4-2 ESD Test Model ______________________________________________________________________________________ DEVICE UNDER TEST ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors TEST POINT TEST MAX13481E POINT MAX13482E MAX13483E RCV, VM, AND VP 27Ω 220Ω DUT D+/DCL CL + - (a) LOAD FOR RCV, VM, AND VP Figure 10. Driver’s Enable and Disable Timing MAX13481E MAX13482E MAX13483E 27Ω TEST POINT D+ AND DCL (b) LOAD FOR D+/D- 15kΩ Figure 9. Transmitter and Receiver Propagation Delay ______________________________________________________________________________________ 13 MAX13481E/MAX13482E/MAX13483E Test Circuits ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors MAX13481E/MAX13482E/MAX13483E Functional Diagrams MAX13481E TO INTERNAL CIRCUITRY LDO REGULATOR VL VBUS SUS VTRM VPU ENUM VP VM D+ LEVEL TRANSLATOR AND LOGIC D- OE RCV GND 14 ______________________________________________________________________________________ ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors MAX13482E BD TO INTERNAL CIRCUITRY VTH_VBUS LDO REGULATOR VL SUS VBUS VTRM VPUR ENUM VP VM D+ LEVEL TRANSLATOR AND LOGIC D- OE RCV GND ______________________________________________________________________________________ 15 MAX13481E/MAX13482E/MAX13483E Functional Diagrams (continued) ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors MAX13481E/MAX13482E/MAX13483E Functional Diagrams (continued) MAX13483E BD TO INTERNAL CIRCUITRY VTH LDO REGULATOR VL VBUS SUS VTRM D+ VP VM LEVEL TRANSLATOR AND LOGIC D- OE RCV GND 16 ______________________________________________________________________________________ ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors SYSTEM SUPPLY VOLTAGE 1μF PC USB POWER VBUS VL 0.1μF VPU MAX13481E SP SYSTEM INTERFACE 1.5kΩ 27Ω ±1% VM VP OE D+ D+ 27Ω ±1% D- ENUM SUS D- GND GND VTRM 1μF SYSTEM SUPPLY VOLTAGE 1μF PC USB POWER VBUS VL 0.1μF MAX13482E VPUR 27Ω ±1% BD SYSTEM INTERFACE VM VP OE ENUM SUS D+ D+ 27Ω ±1% D- D- GND GND VTRM 1μF ______________________________________________________________________________________ 17 MAX13481E/MAX13482E/MAX13483E Typical Operating Circuits ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors MAX13481E/MAX13482E/MAX13483E Typical Operating Circuits (continued) SYSTEM SUPPLY VOLTAGE 1μF PC USB POWER VBUS VTRM VL 0.1μF 1μF BD SYSTEM INTERFACE VM VP OE ENUM SUS 1.5kΩ MAX13483E 27Ω ±1% D+ D+ 27Ω ±1% D- D- GND GND Chip Information PROCESS: BiCMOS 18 ______________________________________________________________________________________ ±15kV ESD-Protected USB Transceivers with External/Internal Pullup Resistors 12x16L QFN THIN.EPS (NE - 1) X e E MARKING E/2 D2/2 (ND - 1) X e AAAA D/2 e CL D D2 k b CL 0.10 M C A B E2/2 L E2 CL 0.10 C CL 0.08 C A A2 L A1 L e e PACKAGE OUTLINE 12, 16L THIN QFN, 3x3x0.8mm F 21-0136 PKG 12L 3x3 REF. MIN. NOM. A 0.70 b 0.20 D 2.90 E e 2.90 L 0.45 MIN. NOM. MAX. 0.75 0.80 0.70 0.75 0.80 0.25 0.30 0.20 0.25 0.30 3.00 3.10 2.90 3.00 3.10 3.00 3.10 2.90 3.00 3.10 0.50 BSC. 0.50 BSC. 0.65 0.30 0.40 N 12 16 ND 3 4 NE A1 3 k 0.50 4 0 0.02 0.05 0 0.02 0.05 0.25 0.20 REF - - 0.25 0.20 REF - - A2 2 16L 3x3 MAX. 0.55 1 EXPOSED PAD VARIATIONS PKG. CODES D2 E2 DOWN BONDS ALLOWED MIN. NOM. MAX. MIN. NOM. MAX. PIN ID JEDEC T1233-1 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 NO T1233-3 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 YES T1233-4 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 YES T1633-1 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-2 NO T1633-2 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-2 YES T1633F-3 0.65 0.80 0.95 0.65 0.80 0.95 0.225 x 45° WEED-2 N/A T1633FH-3 0.65 0.80 0.95 0.65 0.80 0.95 0.225 x 45° WEED-2 N/A T1633-4 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-2 NO NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220 REVISION C. 10. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY 11. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY PACKAGE OUTLINE 12, 16L THIN QFN, 3x3x0.8 21-0136 F 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 © 2006 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX13481E/MAX13482E/MAX13483E Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)