19-5485; Rev 1; 7/11 KIT ATION EVALU E L B AVAILA Current-Mode PWM Controllers with Programmable Switching Frequency Features The MAX17499/MAX17500 current-mode PWM controllers contain all the control circuitry required for the design of wide-input-voltage isolated and nonisolated power supplies. The MAX17499 is well suited for low input voltage (9.5V DC to 24V DC) power supplies. The MAX17500 is well suited for universal input (rectified 85V AC to 265V AC) or telecom (-36V DC to -72V DC) power supplies. The ICs contain an internal error amplifier that regulates the tertiary winding output voltage that is used in primary-side-regulated isolated power supplies. Primary-side regulation eliminates the need for an optocoupler. An input undervoltage lockout (UVLO) is provided for programming the input-supply start voltage and to ensure proper operation during brownout conditions. An opendrain UVLO flag output, with 210μs internal delay, allows the sequencing of a secondary-side controller. The input-supply start voltage is externally programmable with a voltage-divider. A UVLO/EN input is used to shut down the devices. Internal digital soft-start eliminates output voltage overshoot. The MAX17500 has an internal bootstrap UVLO with large hysteresis that requires a minimum 23.6V for startup. The MAX17499 does not have the internal bootstrap UVLO and can be biased directly from a minimum voltage of 9.5V. The switching frequency for the ICs is programmable with an external resistor. The MAX17499A/MAX17500A provide a 50% maximum duty-cycle limit, while the MAX17499B/MAX17500B provide a 75% maximum duty-cycle limit. These devices are available in 10-pin μMAX® packages and are rated for operation over the -40°C to +125°C temperature range. o Current-Mode Control o Programmable Switching Frequency Up to 625kHz o Accurate UVLO Threshold (1%) o Open-Drain UVLO Flag Output with Internal Delay o 36V to 72V Telecom Voltage Range o Universal Offline Input Voltage Range Rectified 85V AC to 265V AC (MAX17500) o 9.5V to 24V Input (MAX17499) o Digital Soft-Start o Internal Bootstrap UVLO with Large Hysteresis (MAX17500) o Internal Error Amplifier with 1.5% Accurate Reference o 50µA (typ) Startup Supply Current o 50% Maximum Duty-Cycle Limit (MAX17499A/MAX17500A) o 75% Maximum Duty-Cycle Limit (MAX17499B/MAX17500B) o 60ns Cycle-by-Cycle Current-Limit Propagation Delay o Available in Tiny 10-Pin µMAX Packages Applications 1/2, 1/4, and 1/8 Brick Power Modules High-Efficiency, Isolated Telecom Power Supplies Networking/Servers Isolated Keep-Alive Power Supplies 12V Boost and SEPIC Regulators Selector Guide appears at end of data sheet. Isolated and Nonisolated High-Brightness LED Power Supplies μMAX is a registered trademark of Maxim Integrated Products, Inc. Industrial Power Conversion Ordering Information PART DMAX (%) STARTUP VOLTAGE (V) TEMP RANGE PIN-PACKAGE 50 9.5 -40°C to +125°C 10 μMAX MAX17499BAUB+ 75 9.5 -40°C to +125°C 10 μMAX MAX17500AAUB+ 50 22 -40°C to +125°C 10 μMAX MAX17500BAUB+ 75 22 -40°C to +125°C 10 μMAX MAX17499AAUB+ Warning: The ICs are designed to work with high voltages. Exercise caution. +Denotes a lead(Pb)-free/RoHS-compliant package. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX17499/MAX17500 General Description MAX17499/MAX17500 Current-Mode PWM Controllers with Programmable Switching Frequency ABSOLUTE MAXIMUM RATINGS IN to GND ...............................................................-0.3V to +30V IN Clamp (internal shunt) Current .........................................5mA VCC to GND ............................................................-0.3V to +13V FB, COMP, UVLO/EN, RT, CS to GND .....................-0.3V to +6V UFLG to GND .........................................................-0.3V to +30V NDRV to GND.............................................-0.3V to (VCC + 0.3V) Continuous Power Dissipation (TA = +70°C) 10-Pin μMAX (derate 5.6mW/°C above +70°C) ........444.4mW Operating Temperature Range .........................-40°C to +125°C Storage Temperature Range ............................-65°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Soldering Temperature (reflow) .......................................+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = +12V (for MAX17500, bring VIN up to 23.6V for startup), 10nF bypass capacitors at IN and VCC, R12 = 15kΩ (MAX17499A/ MAX17500A), R12 = 7.5kΩ (MAX17499B/MAX17500B), R15 = 1kΩ, C6 = 100nF (see the Typical Application Circuit), NDRV = open, VUVLO/EN = +1.4V, VFB = +1.0V, COMP = open, VCS = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS UVLO/STARTUP Bootstrap UVLO Wake-Up Level VSUVR VIN rising (MAX17500 only) 19.68 21.6 23.60 V Bootstrap UVLO Shutdown Level VSUVF VIN falling (MAX17500 only) 9.05 9.74 10.43 V UVLO/EN Wake-Up Threshold VULR2 UVLO/EN rising 1.215 1.23 1.245 V UVLO/EN Shutdown Threshold VULF2 UVLO/EN falling 1.14 1.17 1.20 V UVLO/EN Input Current IUVLO VUVLO/EN ≤ 2V -50 +50 nA ISTART VIN = 19V, MAX17500 only when in bootstrap UVLO UVLO/EN Hysteresis IN Supply Current In UVLO IN Input Voltage Range 60 VIN Bootstrap UVLO Propagation Delay UFLG Low Output Voltage 9.5 UVLO/EN steps up from 1V to 1.4V UVLO/EN to UFLG Propagation Delay (Figure 3) UVLO/EN to NDRV Propagation Delay (Figure 3) MAX17499 only 50 mV 90 μA 24.0 V 3 UVLO/EN steps down from 1.4V to 1V μs 0.6 tEXTR UVLO/EN steps up from 1V to 1.4V tEXTF UVLO/EN steps down from 1.4V to 1V tBUVR VIN steps up from 9V to 24V (MAX17500 only) 5 tBUVF VIN steps down from 24V to 9V (MAX17500 only) 1 VUFLG IUFLG = 5mA sinking 150 3 10 ms 210 300 μs μs UFLG High Output Leakage Current VUFLG = 25V 0.1 1.5 V 1 μA 10.5 V INTERNAL SUPPLY VCC Regulator Set Point IN Supply Current After Startup Shutdown Supply Current 2 VCCSP IIN VIN = 10.8V to 24V, sinking 1μA to 20mA from VCC 7.0 VIN = 24V 2 4 mA UVLO/EN = low 50 90 μA _______________________________________________________________________________________ Current-Mode PWM Controllers with Programmable Switching Frequency (VIN = +12V (for MAX17500, bring VIN up to 23.6V for startup), 10nF bypass capacitors at IN and VCC, R12 = 15kΩ (MAX17499A/ MAX17500A), R12 = 7.5kΩ (MAX17499B/MAX17500B), R15 = 1kΩ, C6 = 100nF (see the Typical Application Circuit), NDRV = open, VUVLO/EN = +1.4V, VFB = +1.0V, COMP = open, VCS = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS GATE DRIVER Driver Output Impedance RON(LOW) Measured at NDRV sinking 100mA 2 4 RON(HIGH) Measured at NDRV sourcing 20mA 4 10 Driver Peak Sink Current Driver Peak Source Current Ω 1 A 0.65 A PWM COMPARATOR Comparator Offset Voltage CS Input Bias Current Comparator Propagation Delay VPWM ICS tPWM VCOMP - VCS VCS = 0V 1.24 1.38 -4 Change in VCS = 0.1V 1.54 V +4 μA 60 ns CURRENT-LIMIT COMPARATOR Current-Limit Trip Threshold VCS CS Input Bias Current ICS Propagation Delay from Comparator Input to NDRV 900 VCS = 0V tPDCS 100mV overdrive VINC 2mA sink current (Note 2) 1000 -4 1100 mV +4 μA 60 ns IN CLAMP VOLTAGE IN Clamp Voltage 24.1 26.1 29.0 V ERROR AMPLIFIER Voltage Gain RLOAD = 100kΩ 80 dB Unity-Gain Bandwidth RLOAD = 100kΩ, CLOAD = 200pF 2 MHz Phase Margin RLOAD = 100kΩ, CLOAD = 200pF 65 Degrees ±1 mV FB Input Offset Voltage COMP High Voltage ICOMP = 0A COMP Low Voltage ICOMP = 0A 2.5 V 1.1 V Source Current 0.5 mA Sink Current 0.5 mA Reference Voltage VREF (Note 3) 1.230 V Reference Voltage Accuracy -1.5 +1.5 % FB Input Bias Current -50 +50 nA COMP Short-Circuit Current 8 mA 1984 NDRV cycles 5.6 ms 31 Steps 39.67 mV DIGITAL SOFT-START Soft-Start Duration tSS fSW = 350kHz Reference Voltage Steps During Soft-Start Reference Voltage Step _______________________________________________________________________________________ 3 MAX17499/MAX17500 ELECTRICAL CHARACTERISTICS (continued) ELECTRICAL CHARACTERISTICS (continued) (VIN = +12V (for MAX17500, bring VIN up to 23.6V for startup), 10nF bypass capacitors at IN and VCC, R12 = 15kΩ (MAX17499A/ MAX17500A), R12 = 7.5kΩ (MAX17499B/MAX17500B), R15 = 1kΩ, C6 = 100nF (see the Typical Application Circuit), NDRV = open, VUVLO/EN = +1.4V, VFB = +1.0V, COMP = open, VCS = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 50 2500 kHz OSCILLATOR Oscillator Frequency Range fOSC Oscillator Frequency Accuracy NDRV Switching Frequency (Note 4) fSW Maximum Duty Cycle DMAX fOSC = 200kHz to 800kHz -10 +10 fOSC = 50kHz to 2500kHz -20 +20 MAX17499A/MAX17500A, fSW = fOSC/2 25 625 MAX17499B/MAX17500B, fSW = fOSC/4 12.5 625.0 MAX17499A/MAX17500A 50 MAX17499B/MAX17500B 75 % kHz % Note 1: All devices are 100% tested at TA = +125°C. All limits over temperature are guaranteed by characterization. Note 2: The MAX17500 is intended for use in universal input power supplies. The internal clamp circuit at IN is used to prevent the bootstrap capacitor (C1 in Figure 1) from charging to a voltage beyond the absolute maximum rating of the device when UVLO/EN is low (shutdown mode). Externally limit the maximum current to IN (hence to clamp) to 2mA maximum when UVLO/EN is low. Clamp currents higher than 2mA may result in a clamp voltage higher than 30V, thus exceeding the absolute maximum rating for IN. For the MAX17499, do not exceed the 24V maximum operating voltage of the device. Note 3: VREF is measured with FB connected to COMP (see the Functional Diagram). Note 4: The oscillator in the MAX17499A/MAX17500A is capable of operating up to 2500kHz. However, the NDRV switching frequency is limited to operate up to 625kHz. Thus, the oscillator frequency for the MAX17499A/MAX17500A must be limited to 1250kHz (maximum). Typical Operating Characteristics (VUVLO/EN = +1.4V, VFB = +1V, COMP = open, VCS = 0V, TA = +25°C, unless otherwise noted.) 21.7 10.1 VIN (V) 21.6 MAX17500 VIN FALLING 21.5 1.236 UVLO/EN RISING 1.234 VUVLO/EN (V) MAX17500 VIN RISING MAX17499/500 toc02 10.3 MAX17499/500 toc01 21.8 UVLO/EN WAKE-UP THRESHOLD vs. TEMPERATURE BOOTSTRAP UVLO SHUTDOWN LEVEL vs. TEMPERATURE 9.9 9.7 MAX17499/500 toc03 BOOTSTRAP UVLO WAKE-UP LEVEL vs. TEMPERATURE VIN (V) MAX17499/MAX17500 Current-Mode PWM Controllers with Programmable Switching Frequency 1.232 1.230 1.228 21.4 21.3 -40 9.5 -15 10 35 TEMPERATURE (°C) 4 60 85 9.3 -40 1.226 -15 10 35 TEMPERATURE (°C) 60 85 1.224 -40 -15 10 35 TEMPERATURE (°C) _______________________________________________________________________________________ 60 85 Current-Mode PWM Controllers with Programmable Switching Frequency VIN = 19V MAX17500 WHEN IN BOOTSTRAP UVLO 60 MAX17499/500 toc06 1.175 2.0 MAX17499/500 toc05 UVLO/EN FALLING VIN = 24V fSW = 350kHz 1.9 1.165 IIN (mA) 1.170 ISTART (µA) VUVLO/EN (V) 65 MAX17499/500 toc04 1.180 VIN SUPPLY CURRENT AFTER STARTUP vs. TEMPERATURE VIN SUPPLY CURRENT IN UVLO vs. TEMPERATURE UVLO/EN SHUTDOWN THRESHOLD vs. TEMPERATURE 55 1.8 1.7 1.160 50 1.6 1.155 -15 10 35 60 45 -40 85 -15 10 35 60 -15 10 35 60 85 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) VCC REGULATOR SET POINT vs. TEMPERATURE VCC REGULATOR SET POINT vs. TEMPERATURE CURRENT-LIMIT TRIP THRESHOLD vs. TEMPERATURE NDRV NOT SWITCHING 9.6 VIN = 19V 8.8 8.7 10mA LOAD VCC (V) 8.6 9.4 NDRV SWITCHING fSW = 350kHz 8.5 8.4 20mA LOAD 8.3 9.2 8.2 1.02 MAX17499/500 toc09 VIN = 19V CURRENT-LIMIT TRIP THRESHOLD (V) 8.9 MAX17499/500 toc07 9.8 VCC (V) 1.5 -40 85 MAX17499/500 toc08 1.150 -40 +3σ 1.01 1.00 MEAN 0.99 0.98 -3σ 0.97 TOTAL NUMBER OF DEVICES = 140 8.1 35 60 -20 0 20 40 60 TEMPERATURE (°C) CURRENT-LIMIT TRIP THRESHOLD SWITCHING FREQUENCY vs. TEMPERATURE 50 40 30 20 10 -40 -15 10 35 60 85 TEMPERATURE (°C) SWITCHING FREQUENCY MAX17499/500 toc11 TOTAL NUMBER OF DEVICES = 140 80 355 +3σ SWITCHING FREQUENCY (kHz) 60 PERCENTAGE OF UNITS (%) -40 85 TEMPERATURE (°C) 350 345 MEAN 340 335 -3σ 330 60 TOTAL NUMBER OF DEVICES = 140 50 MAX17499/500 toc12 10 0.96 PERCENTAGE OF UNITS (%) -15 MAX17499/500 toc10 9.0 -40 40 30 20 10 TOTAL NUMBER OF DEVICES = 140 0 0.964 325 0.978 0.993 1.007 1.022 1.036 CURRENT-LIMIT TRIP THRESHOLD (V) -40 -15 10 35 TEMPERATURE (°C) 60 85 0 326.7 333.5 340.3 347.2 354.0 360.8 SWITCHING FREQUENCY (kHz) _______________________________________________________________________________________ 5 MAX17499/MAX17500 Typical Operating Characteristics (continued) (VUVLO/EN = +1.4V, VFB = +1V, COMP = open, VCS = 0V, TA = +25°C, unless otherwise noted.) Current-Mode PWM Controllers with Programmable Switching Frequency Typical Operating Characteristics (continued) (VUVLO/EN = +1.4V, VFB = +1V, COMP = open, VCS = 0V, TA = +25°C, unless otherwise noted.) PROPAGATION DELAY FROM CURRENT-LIMIT COMPARATOR INPUT TO NDRV vs. TEMPERATURE 50 UVLO/EN RISING 4 3 2 45 206μs 1 40 10 1 10 100 UVLO/EN FALLING 0 -15 -40 1000 10 35 60 85 -15 -40 10 35 60 TIMING RESISTOR (kΩ) TEMPERATURE (°C) TEMPERATURE (°C) UVLO/EN-TO-UFLG PROPAGATION DELAY vs. TEMPERATURE REFERENCE VOLTAGE vs. TEMPERATURE INPUT CURRENT vs. IN VOLTAGE UVLO/EN RISING 3 2 UVLO/EN FALLING 1.230 1.76 1.228 10 35 60 1.60 -15 -40 85 10 35 60 85 11 12 13 14 15 16 IN VOLTAGE (V) NDRV LOW-OUTPUT IMPEDANCE vs. TEMPERATURE INPUT CLAMP VOLTAGE vs. TEMPERATURE 2.4 MAX17499/500 toc19 27.0 IIN = 2mA 26.6 VIN = 24V SINKING 100mA 2.2 26.4 2.0 26.2 RON (Ω) INPUT CLAMP VOLTAGE (V) 10 TEMPERATURE (°C) TEMPERATURE (°C) 26.8 1.68 1.64 0 -15 1.72 1.229 1 -40 MAX17499/500 toc18 UVLO/EN = 1.4V NDRV SWITCHING AT 350kHz MAX17499/500 toc20 4 1.231 26.0 1.8 25.8 1.6 25.6 25.4 1.4 25.2 1.2 25.0 -40 -20 0 85 1.80 INPUT CURRENT (mA) VIN = 12V REFERENCE VOLTAGE (V) 5 MAX17499/500 toc17 1.232 MAX17499/500 toc16 6 20 40 TEMPERATURE (°C) 6 MAX17499/500 toc15 5 UVLO DELAY (ms) 100 6 MAX17499/500 toc14 55 tPDCS (ns) MAX17499A/MAX17500A UVLO/EN-TO-NDRV PROPAGATION DELAY vs. TEMPERATURE 60 MAX17499/500 toc13 SWITCHING FREQUENCY (kHz) 1000 UVLO DELAY (μs) MAX17499/MAX17500 SWITCHING FREQUENCY vs. TIMING RESISTOR 60 80 -40 -15 10 35 60 TEMPERATURE (°C) _______________________________________________________________________________________ 85 17 18 19 Current-Mode PWM Controllers with Programmable Switching Frequency ERROR AMPLIFIER OPEN-LOOP GAIN AND PHASE vs. FREQUENCY NDRV HIGH-OUTPUT IMPEDANCE vs. TEMPERATURE 40 GAIN 40 4.2 3.8 120 80 60 GAIN (dB) RON (Ω) 4.6 80 0 -40 20 0 -80 PHASE -20 PHASE (DEGREES) SOURCING 20mA MAX17499/500 toc22 100 MAX17499/500 toc21 5.0 -120 3.4 -40 -160 -60 3.0 -15 -40 10 35 60 0.1 85 1 10 100 -200 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) TEMPERATURE (°C) Pin Configuration TOP VIEW UVLO/EN 1 UFLG + 10 IN 2 MAX17499 MAX17500 9 VCC 8 NDRV FB 3 COMP 4 7 GND CS 5 6 RT μMAX Pin Description PIN 1 NAME FUNCTION Externally Programmable Undervoltage Lockout. UVLO/EN programs the input start voltage. Connect UVLO/EN UVLO/EN to GND to disable the device. NDRV stops switching approximately 210μs after the UVLO/EN voltage falls below 1.17V. Open-Drain Undervoltage Flag Output. UFLG is asserted low as soon as the UVLO/EN voltage falls below its threshold. 2 UFLG 3 FB 4 COMP 5 CS Current-Sense Input. Current-sense connection for PWM regulation and cycle-by-cycle current limit. Connect to the high side of the sense resistor. An RC filter may be necessary to eliminate leading-edge spikes. Current-limit trip voltage is 1V. 6 RT Oscillator Timing Resistor Input. An RC network may be required to reduce jitter (see the Typical Application Circuit). Error-Amplifier Inverting Input Error-Amplifier Output _______________________________________________________________________________________ 7 MAX17499/MAX17500 Typical Operating Characteristics (continued) (VUVLO/EN = +1.4V, VFB = +1V, COMP = open, VCS = 0V, TA = +25°C, unless otherwise noted.) MAX17499/MAX17500 Current-Mode PWM Controllers with Programmable Switching Frequency Pin Description (continued) PIN NAME 7 GND Ground Connection FUNCTION 8 NDRV External n-Channel MOSFET Gate Connection 9 VCC 10 IN Gate-Drive Supply. Internally generated supply from IN. Decouple VCC with a 10nF or larger capacitor to GND. IN Supply. Decouple with a 10nF or larger capacitor to GND. For bootstrapped operation (MAX17500), connect a startup resistor from the input supply line to IN. Connect the bias winding supply to IN also (see the Typical Application Circuit). For the MAX17499, connect IN directly to the 9.5V to 24V supply. Detailed Description an efficient universal input power supply. The switching frequency of the devices is programmable with an external resistor. The MAX17500 is well suited for universal input (rectified 85V AC to 265V AC) or telecom (-36V DC to -72V DC) power supplies. The MAX17499 is well suited for low-input-voltage (9.5V DC to 24V DC) power supplies. The devices include an internal clamp at IN to prevent the input voltage from exceeding the absolute maximum rating (see Note 2 at the end of the Electrical Characteristics table). The input is clamped when the devices are started with a bleed resistor (R1 in Figure 1) from a high input voltage and the UVLO/EN input is low. The clamp can safely sink up to 2mA current. The MAX17499/MAX17500 current-mode PWM controllers are ideal for isolated and nonisolated powersupply applications. The devices offer an accurate input startup voltage programmable through the UVLO/EN input. This feature prevents the power supply from entering a brownout condition in case the input voltage sags below its minimum value. This is important since switching power supplies increases their input supply current as the input voltage drops to keep the output power constant. In addition to this externally adjustable UVLO feature, the MAX17500 also offers a bootstrap UVLO with a large hysteresis (11.9V) and very low startup and operating current, which result in D2 T1 D1 VSUPPLY VOUT R1 R2 UVLO/EN UFLG FB C2 COMP C5 R11 R3 CS 1 2 10 MAX17500 3 9 8 4 7 5 6 IN R13 VCC NDRV Q1 C4 GND RT R14 C6 C2 R15 C1 R4 R12 0V Figure 1. Nonisolated Power Supply with Programmable Input-Supply Start Voltage 8 _______________________________________________________________________________________ Current-Mode PWM Controllers with Programmable Switching Frequency Current-Mode Control Loop The advantages of current-mode control over voltagemode control are twofold. First, there is the feed-forward characteristic brought on by the controller’s ability to adjust for variations in the input voltage on a cycle-by-cycle basis. Secondly, the stability requirements of the current-mode controller are reduced to that of a single-pole system unlike the double pole in voltage-mode control. The devices use a current-mode control loop where the output of the error amplifier (COMP) is compared to the current-sense voltage at CS. When the current-sense signal is lower than the noninverting input of the CPWM comparator, the output of the CPWM comparator is low and the switch is turned on at each clock pulse. When the current-sense signal is higher than the inverting input of the CPWM, the output of the CPWM comparator goes high and the switch is turned off. Undervoltage Lockout The devices provide a UVLO/EN input. The threshold for UVLO is 1.23V with 60mV hysteresis. Before any operation can commence, the voltage on UVLO/EN has to exceed 1.23V. The UVLO circuit keeps the CPWM comparator, ILIM comparator, oscillator, and output driver shut down to reduce current consumption (see the Functional Diagram). Use this UVLO/EN input to program the input-supply start voltage. For example, a reasonable start voltage for a 36V to 72V telecom range is usually 34V. Calculate the resistor-divider values, R2 and R3 (see Figure 1) by using the following formulas: R3 ≅ VULR2 VIN 500 IUVLO (VIN − VULR2 ) V − VULR2 R2 = IN R3 VULR2 where IUVLO is the UVLO/EN input current (50nA max), and VULR2 is the UVLO/EN wake-up threshold (1.23V). VIN is the value of the input-supply voltage where the power supply must start. The value of R3 is calculated to minimize the voltage-drop error across R2 as a result of the input bias current of the UVLO/EN input. MAX17500 Bootstrap UVLO In addition to the externally programmable UVLO function offered in both devices, the MAX17500 includes an internal bootstrap UVLO that is very useful when designing high-voltage power supplies (see the Functional Diagram). This allows the device to bootstrap itself during initial power-up. The MAX17500 attempts to start when VIN exceeds the bootstrap UVLO threshold of 21.6V. During startup, the UVLO circuit keeps the CPWM comparator, ILIM comparator, oscillator, and output driver shut down to reduce current consumption. Once VIN reaches 21.6V, the UVLO circuit turns on the CPWM and ILIM comparators, the oscillator, and allows the output driver to switch. If VIN drops below 1.17V, the UVLO circuit shuts down the CPWM comparator, ILIM comparator, oscillator, and output driver returning the MAX17500 to the low-current startup mode. Startup Operation The MAX17499 starts up when the voltage at IN exceeds 9.5V and the UVLO/EN input is greater than 1.23V. However, the MAX17500 requires that, in addition to meeting the specified startup conditions for the MAX17499, the voltage at IN exceeds the bootstrap UVLO threshold of 21.6V. _______________________________________________________________________________________ 9 MAX17499/MAX17500 Power supplies designed with the MAX17500 use a high-value startup resistor, R1, that charges a reservoir capacitor, C1 (see Figure 1). During this initial period, while the voltage is less than the internal bootstrap UVLO threshold, the device typically consumes only 50μA of quiescent current. This low startup current and the large bootstrap UVLO hysteresis help to minimize the power dissipation across R1 even at the high end of the universal AC input voltage (265V AC). The devices include a cycle-by-cycle current limit that turns off the gate drive to the external MOSFET whenever the internally set threshold of 1V is exceeded. When using the MAX17500 in bootstrapped mode, if the power-supply output is shorted, the tertiary winding voltage drops below the internally set threshold causing the UVLO to turn off the gate drive to the external power MOSFET. This reinitiates a startup sequence with soft-start. MAX17499/MAX17500 Current-Mode PWM Controllers with Programmable Switching Frequency point, the internal regulator begins charging C2 (see Figure 1). Only 50μA of the current supplied through R1 is used by the MAX17500; the remaining input current charges C1 and C2. The charging of C2 stops when the VCC voltage reaches approximately 9.5V, while the voltage across C1 continues rising until it reaches the wake-up level of 21.6V. Once VIN exceeds the bootstrap UVLO threshold, NDRV begins switching the MOSFET and transfers energy to the secondary and tertiary outputs. If the voltage on the tertiary output builds to higher than 9.74V (the bootstrap UVLO lower threshold), then startup has been accomplished and sustained operation commences. If VIN drops below 9.74V before startup is complete, the device goes back to low-current UVLO. In this case, increase the value of C1 to store enough energy to allow for the voltage at the tertiary winding to build up. MAX17499/MAX17500 fig02 VCC 2V/div VIN 5V/div 0V 100ms/div UVLO Flag (UFLG) Figure 2. VIN and VCC During Startup When Using the MAX17500 in Bootstrapped Mode (Figure 1) For the MAX17500, the voltage at IN is normally derived from a tertiary winding of the transformer. However, at startup there is no energy being delivered through the transformer; hence, a special bootstrap sequence is required. Figure 2 shows the voltages at VIN and VCC during startup. Initially, both VIN and VCC are 0V. After the line voltage is applied, C1 charges through the startup resistor, R1, to an intermediate voltage. At this The devices have an open-drain undervoltage flag output (UFLG). When used with an optocoupler, the UFLG output can serve to sequence a secondary-side controller. An internal 210μs delay occurs the instant the voltage on UVLO/EN drops below 1.17V until NDRV stops switching. This allows for the UFLG output to change state before the devices shut down (Figure 3). When the voltage at the UVLO/EN is above the threshold, UFLG is high impedance. When UVLO/EN is below the threshold, UFLG goes low. UFLG is not affected by bootstrap UVLO (MAX17500). 1.23V (±1%) 1.17V (typ) VUVLO/EN HIGH-Z VUFLG LOW 3μs VNDRV 0.6μs LOW NDRV SWITCHING SHUTDOWN SHUTDOWN tEXTR 3ms tEXTF 210μs Figure 3. UVLO/EN and UFLG Operation Timing 10 ______________________________________________________________________________________ Current-Mode PWM Controllers with Programmable Switching Frequency tSS = 1984 fNDRV where fNDRV is the switching frequency at the NDRV output. Figure 4 shows the soft-start regulated output of a power supply using the MAX17500 during startup. n-Channel MOSFET Switch Driver The NDRV output drives an external n-channel MOSFET. The internal regulator output (VCC), set to approximately 9V, drives NDRV. For the universal input voltage range, the MOSFET used must withstand the DC level of the high-line input voltage plus the reflected voltage at the primary of the transformer. Most applications that use the discontinuous flyback topology require a MOSFET rated at 600V. NDRV can source/sink in excess of 650mA/ 1000mA peak current; therefore, select a MOSFET that mA yields acceptable conduction and switching losses. Oscillator/Switching Frequency Use an external resistor at RT to program the devices’ internal oscillator frequency between 50kHz and 2.5MHz. The MAX17499A/MAX17500A output switching frequency is one-half the programmed oscillator frequency with a 50% duty cycle. The MAX17499B/MAX17500B output switching frequency is one-quarter of the programmed oscillator frequency with a 75% duty cycle. The MAX17499A/MAX17500A and MAX17499B/ MAX17500B have programmable output switching frequencies from 25kHz to 625kHz and 12.5kHz to 625kHz, respectively. Use the following formulas to determine the appropriate value of resistor R12 (see Figure 1) needed to generate the desired output switching frequency (fSW) at the NDRV output: R12 = 1010 for the MAX17499 A MAX17500 A. 2fSW R12 = 1010 for the MAX17499B MAX17500B. 4fSW MAX17499/MAX17500 fig04 VOUT 2V/div 100mA LOAD ON/VOUT1 100mA LOAD ON/VOUT2 2ms/div Figure 4. Primary-Side Output Voltage Soft-Start During Initial Startup for the Circuit in Figure 6 where R12 is the resistor connected from RT to GND (see Figure 1). Connect an RC network in parallel with R12 as shown in Figure 1. The RC network should consist of a 100nF capacitor, C6, (for stability) in series with resistor R15, which serves to further minimize jitter. Use the following formula to determine the value of R15: 1 R15 = 88.9 × (R12 ) 4 For example, if R12 is 4kΩ, R15 becomes 707Ω. Internal Error Amplifier The devices include an internal error amplifier to regulate the output voltage in the case of a nonisolated power supply (see Figure 1). For the circuit in Figure 1, calculate the output voltage using the following equation: ⎛ R13 ⎞ VOUT = ⎜ 1 + V ⎝ R14 ⎟⎠ REF where VREF = 1.23V. The amplifier’s noninverting input is internally connected to a digital soft-start circuit that gradually increases the reference voltage during startup applied to this input. This forces the output voltage to come up in an orderly and well-defined manner under all load conditions. The error amplifier may also be used to regulate the tertiary winding output, which implements a primary-sideregulated, isolated power supply (see Figure 6). For the ______________________________________________________________________________________ 11 MAX17499/MAX17500 Soft-Start The devices’ soft-start feature allows the output voltage to ramp up in a controlled manner, eliminating voltage overshoot. The devices’ reference generator that is internally connected to the error amplifier soft-starts to achieve superior control of the output voltage under heavy- and light-load conditions. Soft-start begins after UVLO is deasserted (V IN is above 21.6V for the MAX17500, VIN is above 9.5V for the MAX17499, and the voltage on UVLO/EN is above 1.23V). The voltage applied to the noninverting node of the amplifier ramps from 0 to 1.23V in 1984 NDRV switching cycles. Use the following formula to calculate the soft-start time (tSS): MAX17499/MAX17500 Current-Mode PWM Controllers with Programmable Switching Frequency circuit in Figure 6, calculate the output voltage using the following equation: VOUT = NS NT ⎡⎛ ⎤ R1 ⎞ VREF + VD6 ⎥ − VD2 ⎢⎜ 1 + ⎟ ⎣⎝ R2 ⎠ ⎦ where NS is the number of secondary winding turns, NT is the number of tertiary winding turns, and both VD6 and VD2 are the diode drops at the respective outputs. the maximum startup bias of the device (90μA) and the charging current for C1 and C2. The bypass capacitor, C2, must charge to 9.5V and C1 to 24V, all within the desired time period of 500ms. Because of the internal soft-start time of the MAX17500 (approximately 5.6ms when fSW = 350kHz), C1 must store enough charge to deliver current to the device for at least this much time. To calculate the approximate amount of capacitance required, use the following formula: IG = QGTOT fSW Current Limit The current-sense resistor (R4 in Figure 1), connected between the source of the MOSFET and ground, sets the current limit. The current-limit comparator has a voltage trip level (VCS) of 1V. Use the following equation to calculate the value of R4: V R4 = CS I PRI where IPRI is the peak current in the primary side of the transformer, which also flows through the MOSFET. When the voltage produced by this current (through the current-sense resistor) exceeds the current-limit comparator threshold, the MOSFET driver (NDRV) terminates the current on-cycle within 60ns (typ). Use a small RC network to filter out the leading-edge spikes on the sensed waveform when needed. Set the corner frequency between 2MHz and 10MHz. Applications Information Startup Time Considerations for Power Supplies Using the MAX17500 The bypass capacitor at IN, C1, supplies current immediately after the MAX17500 wakes up (see Figure 1). The size of C1 and the connection configuration of the tertiary winding determine the number of cycles available for startup. Large values of C1 increase the startup time but also supply gate charge for more cycles during initial startup. If the value of C1 is too small, VIN drops below 9.74V because NDRV does not have enough time to switch and build up sufficient voltage across the tertiary output, which powers the device. The device goes back into UVLO and does not start. Use a low-leakage capacitor for C1 and C2. Typically, offline power supplies keep startup times to less than 500ms even in low-line conditions (85V AC input for universal offline or 36V DC for telecom applications). Size the startup resistor, R1, to supply both 12 (I + I )(t ) C1 = IN G SS VHYST where IIN is the MAX17500’s internal supply current (2mA) after startup, QGTOT is the total gate charge for Q1, f SW is the MAX17500’s switching frequency (350kHz), V HYST is the bootstrap UVLO hysteresis (approximately 12V), and tSS is the internal soft-start time (5.6ms). Example: IG = (8nC) (350kHz) ≅ 2.8mA C1 = (2mA + 2.8mA)(5.6ms) = 2.24μF 12V Choose a 2.2μF standard value (assuming 350kHz switching frequency). Assuming C1 > C2, calculate the value of R1 as follows: V C1 IC1 = SUVR (500ms) VIN(MIN) − VSUVR R1 ≅ IC1 + ISTART where VIN(MIN) is the minimum input supply voltage for the application (36V for telecom), VSUVR is the bootstrap UVLO wake-up level (23.6V max), and ISTART is the IN supply current at startup (90μA max). For example: (24V)(2.2μF) = 0.105mA (500ms) (36V) − (24V) = 61.5kΩ R1 ≅ (0.105mA) + (90μA) IC1 = Choose a 61.9kΩ standard value. ______________________________________________________________________________________ Current-Mode PWM Controllers with Programmable Switching Frequency Another method for bootstrapping the power supply is to use a bias winding that is in-phase with the MOSFET on-time (see Figure 5). In this case, the amount of capacitance required at IN (C1) is much smaller. However, the input voltage cannot have a range greater than approximately 2:1 (primary-winding voltage to bias-winding voltage ratio). For hiccup-mode fault protection, make the bias winding in-phase with the output, then the power-supply hiccups and soft-starts under output short-circuit conditions. The power supply does not hiccup if the bias winding is in-phase with the MOSFET on-time. D1 T1 D2 VOUT VIN C4 R1 R2 UFLG R8 IN U2 OPTO TRANS VCC MAX17500A R9 Q1 NDRV U1 U2 OPTO LED CS C3 R7 C1 GND COMP U3 TL431 R5 FB UVLO/EN RT R4 R10 C6 R6 C2 R3 R12 R15 Figure 5. Secondary-Side Regulated, Isolated Power Supply ______________________________________________________________________________________ 13 MAX17499/MAX17500 Choose a higher value for R1 than the one calculated in the previous equation if a longer startup time can be tolerated to minimize power loss on this resistor. The above startup method is applicable to a circuit similar to the one shown in Figure 1. In this circuit, the tertiary winding has the same phase as the output windings. Thus, the voltage on the tertiary winding at any given time is proportional to the output voltage and goes through the same soft-start period as the output voltage. The minimum discharge time of C1 from 21.6V to 9.74V must be greater than the soft-start time of 5.6ms. MAX17499/MAX17500 Current-Mode PWM Controllers with Programmable Switching Frequency FB_P IN D8 C16 1μF 35V R6 33kΩ 36V TO 72V +VIN +VIN D6 C12 15μF 35V R7 1.2kΩ D7 OPEN R12 1.2kΩ 4 R8 OPEN 28T 35μH C10 OPEN C3 68μF 6.3V 5T 2 6 1 FB_P L1 D1 7 SGND C13 1μF D4 VOUT1 5V/1.5A C4 22μF SGND 6.3V C6 0.0047μF 250V AC D3 OPEN R1 22.6kΩ 1% C15 1μF D5 8 C2 1μF 100V C1 1μF 100V 15V/100mA C5 47μF 25V 10 12T 15T VOUT2 D2 5 T1 9 3 -VIN IN 3 R2 +VIN 2.49kΩ 1% R9 75kΩ 1% R3 1.37MΩ 1% R4 51.1kΩ L2 U1 FB C9 100pF IN 10 MAX17500A 4 COMP NDRV 8 C11 0.22μF R10 4.7Ω C14 3900pF 1 UVLO/EN CS R11 100Ω 5 9 C7 0.22μF UFLG SHDN 2 1 R13 10kΩ JU1 2 VCC UFLG GND RT 8 N1 IRF7464 4 1 C8 OPEN C17 OPEN 7 56 2 3 R5 0.600Ω 1% 7 6 R14 14.3kΩ 1% UFLG_PULL R15 750Ω C19 OPEN C18 0.1μF NOTE: MOSFET N1 = IR IRF7464. Figure 6. Primary-Side-Regulated, Dual-Output, Isolated Telecom Power Supply Primary-Side-Regulated, Isolated Telecom Power Supply Figure 6 shows a complete circuit of a dual-output power supply with a 36V to 72V telecom voltage range. An important aspect of this power supply is that it is primary-side regulated. The regulation through the tertiary winding also supplies bias for the MAX17500. 5.4 VOUT (V) In the circuit of Figure 6, cross-regulation has been improved (tertiary and 5V outputs) by using chip inductors, L1 and L2, and R7 || R12 across C12. R7 || R12 presents enough loading on the tertiary winding output to allow ±10% load regulation on the 5V output over a 150mA to 1.5A load current range (Figure 7). NO LOAD AT 15V OUTPUT VIN+ = 40V VIN- = 0V 5.5 5.3 MAX17499/MAX17500 fig07 5V OUTPUT LOAD REGULATION 5.6 5.2 5.1 5.0 4.9 4.8 0.15 0.30 0.45 0.60 0.75 0.90 1.05 1.20 1.35 1.50 IOUT (A) Figure 7. Output Voltage Regulation for the Circuit in Figure 6 14 ______________________________________________________________________________________ Current-Mode PWM Controllers with Programmable Switching Frequency D1 MAX17499/MAX17500 L1 12V 15V R2 UFLG R5 IN Q1 NDRV VCC MAX17499 CS C4 C3 C1 C2 GND COMP R1 FB UVLO/EN RT R6 C6 R3 R12 R15 0V Figure 8. 12V to 15V Output Boost Regulator Figure 8 shows the 12V to 15V output boost regulator. Layout Recommendations Typically, there are two sources of noise emission in a switching power supply: high di/dt loops and high dV/dt surfaces. For example, traces that carry the drain current often form high di/dt loops. Similarly, the heatsink of the MOSFET presents a dV/dt source; therefore, minimize the surface area of the heatsink as much as possible. Keep all PCB traces carrying switching currents as short as possible to minimize current loops. Use a ground plane for best results. The pins of the μMAX package are positioned to allow easy interfacing to the external MOSFET. For universal AC input design, follow all applicable safety regulations. Offline power supplies may require UL, VDE, and other similar agency approvals. To avoid noise coupling of signals from RT to NDRV, route traces from RT away from NDRV. ______________________________________________________________________________________ 15 MAX17499/MAX17500 Current-Mode PWM Controllers with Programmable Switching Frequency Typical Application Circuit D2 T1 D1 R5 R2 C4 R1 UVLO/EN UFLG FB C2 + COMP 36V TO 72V C5 - R11 R3 CS 1 2 10 MAX17500 9 3 8 4 7 5 6 IN VCC NDRV Q1 GND RT R6 C6 C2 R15 16 R12 C1 R4 ______________________________________________________________________________________ VOUT Current-Mode PWM Controllers with Programmable Switching Frequency IN IN IN CLAMP 26.1V VCC VCC REGULATOR DIGITAL SOFT-START BOOTSTRAP UVLO REFERENCE 1.23V REG_OK * VL (INTERNAL 5.25V SUPPLY) 21.6V 9.74V 210μs DELAY UFLG UVLO UVLO/EN N 1.23V 1.17V COMP DRIVER S FB NDRV Q ERROR AMP R CPWM OSCILLATOR 1.4V CS GND VCS 1V MAX17499 MAX17500 ILIM RT *MAX17500 ONLY Chip Information Selector Guide PART* BOOTSTRAP STARTUP UVLO VOLTAGE (V) MAX DUTY CYCLE (%) MAX17499A No 9.5 50 MAX17499B No 9.5 75 MAX17500A Yes 22 50 MAX17500B Yes 22 75 *The MAX17499 does not have an internal bootstrap UVLO. The MAX17499 starts operation as long as VIN is higher than 9.5V and UVLO/EN is higher than 1.23V. PROCESS: BiCMOS Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 10 μMAX U10+2 21-0061 90-0330 ______________________________________________________________________________________ 17 MAX17499/MAX17500 Functional Diagram Current-Mode PWM Controllers with Programmable Switching Frequency MAX17499/MAX17500 Revision History REVISION NUMBER REVISION DATE 0 9/10 Initial release 1 7/11 Changed operating temperature from -40°C to +85°C to -40°C to +125°C DESCRIPTION PAGES CHANGED — 1–4 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.