FUJITSU SEMICONDUCTOR DATA SHEET DS05-13104-3E Memory FRAM CMOS 1 M Bit (64 K × 16) MB85R1002 ■ DESCRIPTIONS The MB85R1002 is an FRAM (Ferroelectric Random Access Memory) chip consisting of 65,536 words x 16 bits of non-volatile memory cells created using ferroelectric process and silicon gate CMOS process technologies. The MB85R1002 is able to retain data without using a back-up battery, as is needed for SRAM. The memory cells used in the MB85R1002 can be used for at least 1010 read/write operations, which is a significant improvement over the number of read and write operations supported by Flash memory and E2PROM. The MB85R1002 uses a pseudo-SRAM interface that is compatible with conventional asynchronous SRAM. ■ FEATURES • • • • • • • Bit configuration Read/write endurance Operating power supply voltage Operating temperature range Data retention LB and UB data byte control Package : 65,536 words × 16 bits : 1010 times/bit (Min) : 3.0 V to 3.6 V : − 20 °C to +85 °C : 10 years (+55 °C) : 48-pin plastic TSOP (1) : 48-pin plastic FBGA Copyright©2005-2007 FUJITSU LIMITED All rights reserved MB85R1002 ■ PIN ASSIGNMENT (TOP VIEW) A15 A14 A13 A12 A11 A10 A9 A8 NC NC WE CE2 GND UB LB VCC NC A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC GND I/O16 I/O8 I/O15 I/O7 I/O14 I/O6 I/O13 I/O5 VCC I/O12 I/O4 I/O11 I/O3 I/O10 I/O2 I/O9 I/O1 OE GND CE1 A0 (FPT-48P-M25) (Continued) 2 MB85R1002 (Continued) Top View Bottom View INDEX A B C D E F G H 1 2 3 4 5 6 1 2 3 4 5 6 A LB OE A0 A1 A2 CE2 B I/O9 UB A3 A4 CE1 C I/O10 I/O11 A5 A6 D GND I/O12 NC I/O13 F 6 5 4 3 2 1 6 5 4 3 2 1 A CE2 A2 A1 A0 OE LB I/O1 B I/O1 CE1 A4 A3 UB I/O9 I/O2 I/O3 C I/O3 I/O2 A6 A5 I/O11 I/O10 A7 I/O4 VCC D VCC I/O4 A7 NC I/O12 GND NC NC I/O5 GND E GND I/O5 NC NC I/O13 I/O15 I/O14 A14 A15 I/O6 I/O7 F I/O7 I/O6 A15 A14 I/O14 I/O15 G I/O16 NC A12 A13 WE I/O8 G I/O8 WE A13 A12 NC I/O16 H NC A8 A9 A10 A11 NC H NC A11 A10 A9 A8 NC E VCC VCC (BGA-48P-M23) ■ PIN DESCRIPTION Pin name A0 to A15 Function Address In I/O1 to I/O16 Data Input/Output CE1 Chip Enable 1 in CE2 Chip Enable 2 in WE Write Enable in OE Output Enable in LB, UB VCC GND NC Data Byte Control in Power Supply Ground No Connection 3 MB85R1002 ■ BLOCK DIAGRAM to · · · Address Latch. A0 Ferro Capacitor Cell Row Dec. A15 Column Dec. intCE2 S/A intCE2 CE2 intCEB intOE intWE intCE2 I/O1 to I/O8 I/O9 to I/O16 LB I/O16 UB · · WE I/O9 OE CE1 to intCEB I/O8 · · to I/O1 4 MB85R1002 ■ FUNCTION TRUTH TABLE Mode Standby Pre-charge Read Read (Pseudo-SRAM, OE control*1) Write Write (Pseudo-SRAM, WE control*2) CE1 CE2 WE OE LB UB H X X X X X X L X X X X X X H H X X X X X X H H L H L L H H L L H H L H L X H I/O1 to I/O8 I/O9 to I/O16 High-Z High-Z L Dout Dout L H Dout High-Z H L High-Z Dout L L Dout Dout L H Dout High-Z H L High-Z Dout L L Din Din L H Din High-Z H L High-Z Din L L Din Din L H Din High-Z H L High-Z Din Supply Current Standby (ISB) Operation (ICC) Notes : L = VIL, H = VIH, X can be either VIL or VIH, High-Z = High Impedance : Latch address and latch data at falling edge, : Latch address and latch data at rising edge *1 : OE control of the Pseudo-SRAM means the valid address at the falling edge of OE to read. *2 : WE control of the Pseudo-SRAM means the valid address and data at the falling edge of WE to write. 5 MB85R1002 ■ ABSOLUTE MAXIMUM RATINGS Parameter Symbol Rating Min Max Unit Supply Voltage* VCC −0.5 +4.0 V Input Voltage* VIN −0.5 VCC + 0.5 V VOUT −0.5 VCC + 0.5 V Ambient Operating Temperature TA −20 +85 o C Storage Temperature Tstg −40 +125 o C Output Voltage* * : All voltages are referenced to GND. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS Parameter Symbol Value Min Typ Max Unit Supply Voltage* VCC 3.0 3.3 3.6 V Input Voltage (high)* VIH VCC × 0.8 ⎯ VCC + 0.5 V Input Voltage (low)* VIL −0.5 ⎯ +0.6 TA − 20 ⎯ +85 Ambient Operating Temperature V o C * : All voltages are referenced to GND. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges.Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 6 MB85R1002 ■ ELECTRICAL CHARACTERISTICS 1. DC CHARACTERISTICS Parameter (within recommended operating conditions) Value Test Conditions Unit Min Typ Max Symbol Input Leakage Current |ILI| VIN = 0 V to VCC ⎯ ⎯ 10 µA Output Leakage Current |ILO| VOUT = 0 V to VCC, CE1 = VIH or OE = VIH ⎯ ⎯ 10 µA Operating Power Supply Current ICC CE1 = 0.2 V, CE2 = VCC−0.2 V, Iout = 0 mA*1 ⎯ 10 15 mA ⎯ 10 50 µA VCC × 0.8 ⎯ ⎯ V ⎯ ⎯ 0.4 V CE1 ≥ VCC−0.2 V Standby Current ISB CE2 ≤ 0.2 V*2 OE ≥ VCC−0.2 V, WE ≥ VCC−0.2 V*2 LB ≥ VCC−0.2 V, UB ≥ VCC−0.2 V*2 Output Voltage (high) VOH IOH = −0.1 mA Output Voltage (low) VOL IOL = 2.0 mA *1 : During the measurement of ICC , the Address, Data In were taken to only change once per active cycle. Iout : output current *2 : All pins other than setting pins should be input at the CMOS level voltages such as H ≥ VCC − 0.2 V, L ≤ 0.2 V. 7 MB85R1002 2. AC TEST CONDITIONS Supply Voltage : 3.0 V to 3.6 V Operating Temperature : −20 oC to +85 oC Input Voltage Amplitude : 0.3 V to 2.7 V Input Rising Time : 5 ns Input Falling Time : 5 ns Input Evaluation Level : 2.0 V / 0.8 V Output Evaluation Level : 2.0 V / 0.8 V Output Impedance : 50 pF (1) Read Operation (within recommended operating conditions) Parameter 8 Symbol Value Min Max Unit Read Cycle time tRC 150 ⎯ ns CE1 Active Time tCA1 120 ⎯ ns CE2 Active Time tCA2 120 ⎯ ns OE Active Time tRP 120 ⎯ ns LB, UB Active Time tBP 120 ⎯ ns Pre-charge Time tPC 20 ⎯ ns Address Setup Time tAS 0 ⎯ ns Address Hold Time tAH 50 ⎯ ns OE Setup Time tES 0 ⎯ ns LB, UB Setup Time tBS 5 ⎯ ns Output Data Hold time tOH 0 ⎯ ns Output Set Time tLZ 30 ⎯ ns CE1 Access Time tCE1 ⎯ 100 ns CE2 Access Time tCE2 ⎯ 100 ns OE Access Time tOE ⎯ 100 ns Output Floating Time tOHZ ⎯ 20 ns MB85R1002 (2) Write Operation (within recommended operating conditions) Parameter Symbol Value Min Max Unit Write Cycle Time tWC 150 ⎯ ns CE1 Active Time tCA1 120 ⎯ ns CE2 Active Time tCA2 120 ⎯ ns LB, UB Active Time tBP 120 ⎯ ns Pre-Charge Time tPC 20 ⎯ ns Address Setup Time tAS 0 ⎯ ns Address Hold Time tAH 50 ⎯ ns LB, UB Setup Time tBS 5 ⎯ ns Write Pulse Width tWP 120 ⎯ ns Data Setup Time tDS 0 ⎯ ns Data Hold Time tDH 50 ⎯ ns Write Setup Time tWS 0 ⎯ ns (3) Power ON/OFF Sequence (within recommended operating conditions) Value Symbol Min Typ Max CE1 LEVEL hold time for Power OFF tpd 85 ⎯ ⎯ ns CE1 LEVEL hold time for Power ON tpu 85 ⎯ ⎯ ns Parameter Unit 3. Pin Capacitance (f = 1 MHz, TA = +25 oC) Parameter Input Capacitance Output Capacitance Symbol CIN COUT Test Condition Value Unit Min Typ Max VIN = GND ⎯ ⎯ 10 pF VOUT = GND ⎯ ⎯ 10 pF 9 MB85R1002 ■ TIMING DIAGRAMS 1. Read Cycle Timing 1 (CE1, CE2 Control) tRC tCA1 CE1 tPC CE2 tCA2 tBP tBS LB, UB tAS A0 to A15 tAH Valid H or L tES tRP OE tCE1, tCE2 tOHZ tOH High-Z tLZ I/O1 to I/O16 Valid Invalid Invalid 2. Read Cycle Timing 2 (OE Control) tCA1 CE1 tCA2 CE2 tBP tBS LB, UB tAS A0 to A15 tAH Valid H or L tRC OE tPC tRP tOHZ tOE tOH tLZ I/O1 to I/O16 Invalid 10 High-Z Valid Invalid MB85R1002 3. Write Cycle Timing 1 (CE1, CE2 Control) tWC tCA1 CE1 CE2 tPC tCA2 tBP tBS LB, UB tAH tAS A0 to A15 Valid H or L tWS tWP WE tDS tDH High-Z Valid Data In H or L 4. Write Cycle Timing 2 (WE Control) tCA1 CE1 tCA2 CE2 tBP tBS LB, UB tAS A0 to A15 tAH Valid H or L tWC tWP tPC WE tDS tDH High-Z Data In Valid H or L 11 MB85R1002 ■ POWER ON/OFF SEQUENCE tpd tpu VCC VCC CE2 CE2 3.0 V 3.0 V VIH (Min) VIH (Min) 1.0 V 1.0 V VIL (Max) VIL (Max) GND GND CE2 ≤ 0.2 V CE1 > VCC × 0.8* CE1 : Don't Care CE1 > VCC × 0.8* CE1 CE1 * : CE1 (Max) < VCC + 0.5 V Note : You can choose either of CE1 or CE2, or both for disenable control of the device. ■ NOTES ON USE Data that is written prior to IR reflow is not guaranteed to be retained after IR reflow. ■ ORDERING INFOMATION Part number 12 Package MB85R1002PFTN-GE1 48-pin plastic TSOP(1) (FPT-48P-M25) MB85R1002BGT-GE1 48-pin plastic FBGA (BGA-48P-M23) MB85R1002 ■ PACKAGE DIMENSIONS 48-pin plastic TSOP(1) Lead pitch 0.50 mm Package width × package length 12.00 × 12.40 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.20 mm MAX Weight 0.37 g Code (Reference) P-TSOP(1)48-12×12.4-0.50 (FPT-48P-M25) 48-pin plastic TSOP(1) (FPT-48P-M25) Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max). Note 2) *2 : These dimensions do not include resin protrusions. Note 3) Pin widths and pin thicknesses include plating thickness. Note 4) Pin widths do not include tie bar cutting burrs. 0.10±0.05 (Stand off) (.004±.002) LEAD No. 1 48 0.50(.020) INDEX +0.05 0.22 –0.04 +.002 .009 –.002 *1 12.00±0.10 0.10(.004) M (.472±.004) 24 25 1.13±0.07 (Mounting height) (.044±.003) 14.00±0.20(.551±.008) Details of "A" part *2 12.40±0.10(.488±.004) "A" 0˚~8˚ +0.05 0.08(.003) C 0.145 –0.03 +.002 .006 –.001 2003 FUJITSU LIMITED F48043S-c-2-2 0.25(.010) 0.60±0.15 (.024±.006) Dimensions in mm (inches). Note: The values in parentheses are reference values Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html (Continued) 13 MB85R1002 (Continued) 48-pin plastic FBGA Lead pitch 0.75 mm Package width × package length 8.10 mm × 6.10 mm Lead shape Ball Sealing method Plastic mold Mounting height 1.10 mm Max Weight 0.08 g (BGA-48P-M23) 48-pin plastic FBGA (BGA-48P-M23) 5.25(.207) +0.15 +.006 0.95 –0.10 .043 –.004 (Mounting height) 0.25±0.10(.010±.004) (Stand off) 8.10±0.20(.319±.008) 0.75(.030)TYP B 6 5 A 6.10±0.20 (.240±.008) 4 3.75 (.148) 3 2 1 H (INDEX AREA) G F E D C B A S 48-ø0.35±0.05 (48-ø.014±.002) ø0.08(.003) M S A B 0.10(.004) C 2007 FUJITSU LIMITED B48023S-c-1-1 Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html 14 Dimensions in mm (inches). Note: The values in parentheses are reference values. MB85R1002 FUJITSU LIMITED All Rights Reserved. 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