Philips Semiconductors Linear Products Product specification EIA-232-D/V.28 driver/receiver MC145406 DESCRIPTION PIN CONFIGURATION The MC145406 is a silicon-gate CMOS IC that combines 3 drivers and 3 receivers to fulfill the electrical specifications of standards EIA-232-D and CCITT V.28. The drivers feature true TTL input compatibility, slew-rate limited output, 300Ω power-off source impedance, and output typically switching to within 25% of the supply rails. The receivers can handle up to +25V while presenting 3 to 7kΩ impedance. Hysteresis in the receiver aids reception of noisy signals. By combining both drivers and receivers in a single CMOS chip, the MC145406 provides efficient, low-power solutions for EIA-232-D and V.28 applications. D and N Packages APPLICATIONS • Modem interface • Voice/data telephone interface • Lap-top computers • UART interface VDD 1 16 VCC RX1 2 15 DO1 TX1 3 14 DI1 RX2 4 13 DO2 TX2 5 RX3 6 TX3 7 VSS 8 R D R D R D 12 DI2 11 DO3 10 DI3 9 GND NOTE: D = Driver R = Receiver • Maximum slew rate = 30V/µs • Receivers • +25V input voltage range over the full supply range • 3 to 7kΩ input impedance • Hysteresis on input switchpoint • General • Very low supply currents for long battery life • Operation is independent of power supply sequencing FEATURES • Drivers • +5 to +12V supply range • 300Ω power-off source impedance • Output current limiting • TTL compatible ORDERING INFORMATION DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG # 16-Pin Plastic Dual In-Line (DIP) Package 0 to +70°C MC145406N 0406C 16-Pin Small Outline Large (SOL) Package 0 to +70°C MC145406D 0171B ABSOLUTE MAXIMUM RATINGS SYMBOL RATING UNITS VCC Supply voltage PARAMETER -0.5 to +6.0 V VDD Supply voltage -0.5 to +13.5 V VSS Supply voltage +0.5 to -13.5 V VIR Input voltage range RX1-3 inputs DI1-3 inputs (VSS - 15) to (VDD + 15) -0.5 to (VCC + 0.5) V +100 mA PD DC current per pin Power dissipation (package) 1.0 W TA Operating temperature range 0 to +70 TSTG θJA Storage temperature range Thermal impedance N package D package -65 to +150 °C °C 80 105 °C/W NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < VDI < VDD and GND < VDO < VCC. Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to VSS < VTX1-3 < VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., GND or VCC for DI, and VSS or VDD for RX). August 31, 1994 467 853-1430 13721 Philips Semiconductors Linear Products Product specification EIA-232-D/V.28 driver/receiver MC145406 BLOCK DIAGRAM RECEIVER VCC VCC 15k RX + DO – 5.4k VSS 1.0V VDD 1.8V DRIVER HYSTERESIS VCC 300 TX LEVEL + SHIFT – DI 1.4V VSS PIN # SYMBOL 1 VDD Positive power supply. The most positive power supply pin, which is typically 5 to 12 volts. 8 VSS Negative power supply. The most negative power supply pin, which is typically -5 to -12 volts. 16 VCC Digital power supply. The digital supply pin, which is connected to the logic power supply (maximum +5.5V). 9 GND Ground. Ground return pin is typically connected to the signal ground pin of the EIA-232-D connector (Pin 7) as well as to the logic power supply ground. 2, 4, 6 RX1, RX2, RX3 Receive Data Input. These are the EIA-232-D receive signal inputs whose voltages can range from +25 to -25V. A voltage between +3 and +25 is decoded as a space and causes the corresponding DO pin to swing to ground (0V); a voltage between -3 and -25V is decoded as a mark and causes the DO pin to swing up to VCC. The actual turn-on input switchpoint is typically biased at 1.8V above ground, and includes 800mV of hysteresis for noise rejection. The nominal input impedance is 5kΩ. An open or grounded input pin is interpreted as a mark, forcing the DO pin to VCC. 11, 13, 15 DO1, DO2, DO3 Data Output. These are the receiver digital output pins, which swing from VCC to GND. A space on the RX pin causes DO to produce a logic zero; a mark produces a logic one. Each output pin is capable of driving one LSTTL input load. 10, 12, 14 DI1, DI2, DI3 Data Input. These are the high-impedance digital input pins to the drivers. TTL compatibility is accomplished by biasing the input switchpoint at 1.4V above ground. However, 5V CMOS compatibility is maintained as well. Input voltage levels on these pins must be between VCC and GND. 3, 5, 7 TX1, TX2, TX3 Transmit Data Output. These are the EIA-232-D transmit signal output pins, which swing toward VDD and VSS. A logic one at a DI input causes the corresponding TX output to swing toward VSS. A logic zero causes the output to swing toward VDD (the output voltages will be slightly less than VDD or VSS depending upon the output load). Output slew rates are limited to a maximum of 30V/µs. When the MC145406 is off (VDD = VSS = VCC = GND), the minimum output impedance is 300Ω. August 31, 1994 PIN DESCRIPTION 468 Philips Semiconductors Linear Products Product specification EIA-232-D/V.28 driver/receiver MC145406 ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER RATING UNITS VCC Supply voltage -0.5 to +6.0 V VDD Supply voltage -0.5 to +13.5 V VSS Supply voltage +0.5 to -13.5 V VIR Input voltage range RX1-3 inputs DI1-3 inputs (VSS - 15) to (VDD + 15) -0.5 to (VCC + 0.5) V +100 mA PD DC current per pin Power dissipation (package) 1.0 W TA Operating temperature range 0 to +70 °C -65 to +150 °C 80 105 °C/W TSTG Storage temperature range Thermal impedance θJA N package D package NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < VDI < VDD and GND < VDO < VCC. Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to VSS < VTX1-3 < VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., GND or VCC for DI, and VSS or VDD for RX). DC ELECTRICAL CHARACTERISTICS Typical values are at TA = 0 to 70°C; GND = 0V, unless otherwise specified. LIMITS SYMBOL PARAMETER TEST CONDITIONS UNITS MIN TYP MAX VDD 4.5 5 to 12 13.2 V VSS -4.5 -5 to -12 -13.2 V VCC 4.5 5.0 5.5 V DC supply voltage Quiescent supply current (outputs unloaded, inputs low) IDD VDD = +12V 20 400 µA ISS VSS = -12V 280 600 µA ICC VCC = +5V 260 450 µA RECEIVER ELECTRICAL CHARACTERISTICS Typical values are at TA = 0 to 70°C; GND = 0V; VDD = +5 to +12V; VSS = -5 to -12V; VCC = +5V +5%, unless otherwise specified. LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS VON Input turn-on threshold RX1-3 VDO1-3 = VOL, VCC = 5.0V +5% 1.35 1.80 2.35 V VOFF Input turn-off threshold RX1-3 VDO1-3 = VOH, VCC = 5.0V +5% 0.75 1.00 1.25 V Input threshold hysteresis RX1-3 VCC = 5.0V +5% 0.6 0.8 VON-VOFF RIN Input resistance RX1-3 (VSS-15V) < VRX1-3 < (VDD+15V) 3.0 5.0 VOH High level output voltage DO1-3 IOH = -20µA, VCC = +5.0V 4.9 5.0 IOH = -1mA, VCC = +5.0V 3.8 4.4 VRX1-3 = -3V to (VSS-15V)1 VOL Low level output voltage DO1-3 VRX1-3 = +3V to (VDD+15V)1 7.0 0.005 0.1 IOL = +2mA, VCC = +5.0V 0.15 0.5 IOL = +4mA, VCC = +5.0V 0.3 0.7 469 kΩ V IOL = +20µA, VCC = +5.0V NOTE: 1. This is the range of input voltages as specified by EIA-232-D to cause a receiver to be in the high or low logic state. August 31, 1994 V V Philips Semiconductors Linear Products Product specification EIA-232-D/V.28 driver/receiver MC145406 DRIVER ELECTRICAL CHARACTERISTICS Typical values are at TA = 0 to 70°C; GND = 0V; VCC = +5V +5%, unless otherwise specified. LIMITS SYMBOL PARAMETER TEST CONDITIONS VIL Digital input voltage DI1-3 VIH Digital input voltage DI1-3 Logic 1 IIN Input current DI1-3 VDI1-3 = VCC VOH VOL ISC Output high voltage TX1-3 VDI1-3 = Logic 0, RL = 3.0kΩ Output low voltage1 TX1-3 VDI1-3 = Logic 0, RL = 3.0kΩ Off source resistance Figure 1 TX1-3 Output short-circuit current TX1-3 VDD = +12.0V, VSS = -12.0V MIN TYP Logic 0 3.5 V +1.0 µA V 4.1 VDD = +6.0V, VSS = -6.0V 4.3 5.0 VDD = +12.0V, VSS = -12.0V 9.2 10.4 VDD = +5.0V, VSS = -5.0V -4.0 -4.3 VDD = +6.0V, VSS = -6.0V -4.5 -5.2 VDD = +12.0V, VSS = -12.0V -10.0 -10.3 VDD=VSS=GND=0V, VTX1-3 = +2.0V 300 TX1-3 shorted to GND2 +15.0V3 UNITS 0.8 2.0 VDD = +5.0V, VSS = -5.0V TX1-3 shorted to MAX V V Ω +22 +60 mA +60 +100 mA NOTE: 1. The voltage specifications are in terms of absolute values. 2. Specification is for one TX output pin to be shorted at a time. Should all three driver outputs be shorted simultaneously, device power dissipation limits will be exceeded. 3. This condition could exceed package limitations. SWITCHING CHARACTERISTICS Typical values are at TA = 0 to 70°C; VCC = +5V +5%, unless otherwise specified. (See Figures 2 and 3) LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Drivers tPLH Propagation delay time tPHL SR TX1-3 Low-to-High RL = 3kΩ, CL = 50pF 300 500 ns Propagation delay time TX1-3 High-to-Low RL = 3kΩ, CL = 50pF 300 500 ns Output slew rate (minimum load) TX1-3 RL = 7kΩ, CL = 0pF, VDD = 6 to 12.0V, VSS = -6 to -12V +6 +30 Output slew rate (maximum load) TX1-3 RL = 3kΩ, CL = 2500pF, VDD = 12V, VSS = -12V +3.0 DO1-3 Low-to-High 150 425 ns High-to-Low V/µs Receivers (CL = 50pF) tPLH Propagation delay time tPHL Propagation delay time DO1-3 150 425 ns tR Output rise time DO1-3 120 400 ns tF Output fall time DO1-3 40 100 ns August 31, 1994 470 Philips Semiconductors Linear Products Product specification EIA-232-D/V.28 driver/receiver 12 defines the electrical and physical interface between Data Communication Equipment (DCE) and Data Terminal Equipment (DTE). A DCE is connected to a DTE using a cable that typically carries up to 25 leads, which allow the transfer of timing, data, control, and test signals. The MC145406 provides the necessary level shifting between the TTL/CMOS logic levels and the high voltage levels of EIA-232-D (ranging from +3 to +25V). 16 1 14 MC145406 VDD VCC DI1 TX1 DI2 TX2 3 5 DRIVERS VIN = +2V 10 DI3 TX3 VSS 8 As defined by the specification, an EIA-232-D driver presents a voltage of between +5 to +15V into a load of between 3 to 7kΩ. A logic one at the driver input results in a voltage of between -5 to -15V. A logic zero results in a voltage between +5 to +15V. When operating at +7 to +12V, the MC145406 meets this requirement. When operating at +5V, the MC145406 drivers produce less than +5V at the output (when terminated), which does not meet the EIA-232-D specification. However, the output voltages when using a +5V power supply are high enough (around +4V) to permit proper reception by an EIA-232-D receiver, and can be used in applications where strict compliance to EIA-232-D is not required. 7 ROUT = 9 VIN I Figure 1. Power-Off Source Resistance (Drivers) DRIVERS Another requirement of the MC145406 drivers is that they withstand a short to another driver in the EIA-232-D cable. The worst-case condition that is permitted by EIA-232-D is a +15V source that is current limited to 500mA. The MC145406 drivers can withstand this condition momentarily. In most short circuit conditions the source driver will have a series 300Ω output impedance needed to satisfy the EIA-232-D driver requirements. This will reduce the short circuit current to under 40mA which is an acceptable level for the MC145406 to withstand. 3V 50% DI1-3 0V tF tF 90% TX1-3 10% tPHL VOH VOL tPLH Unlike some other drivers, the MC145406 drivers feature an internally-limited output slew rate that does not exceed 30V/µs. RECEIVERS +3V RECEIVERS 50% RX1-3 The job of an EIA-232-D receiver is to level-shift voltages in the range of -25 to +25V down to TTL/CMOS logic levels (0 to +5V). A voltage of between -3 and -25V on RX1 is defined as a mark and produces a logic one at DO1. A voltage between +3 and +25V is a space and produces a logic zero. While receiving these signals, the RX inputs must present a resistance between 3 and 7kΩ. Nominally, the input resistance of the RX1-3 inputs is 5.0kΩ. 0V tPHL tPLH VOH DO1-3 90% 50% 10% VOL tF tF The input threshold of the RX1-3 inputs is typically biased at 1.8V above ground (GND) with typically 800mV of hysteresis included to improve noise immunity. The 1.8V bias forces the appropriate DO pin to a logic one when its RX input is open or grounded as called for in EIA-232-D specification. Notice that TTL logic levels can be applied to the RX inputs in lieu of normal EIA-232-D signal levels. This might be helpful in situations where access to the modem or computer through the EIA-232-D connector is necessary with TTL devices. However, it is important not to connect the EIA-232-D outputs (TX1) to TTL inputs since TTL operates off +5V only, and may be damaged by the high output voltage of the MC145406. Figure 2. Switching Characteristics DRIVERS 3V 3V TX1-3 –3V tSLH SLEW RATE (SR) = –3V –3V OR tSLH –3V tSHL 3V – (–3V) tSHL The DO outputs are to be connected to a TTL or CMOS input (such as an input to a modem chip). These outputs will swing from VCC to ground, allowing the designer to operate the DO and DI pins from the digital power supply. The TX and RX sections are independently powered by VDD and VSS so that one may run logic at +5V and the EIA-232-D signals at +12V. Figure 3. Slew Rate Characteristics APPLICATIONS INFORMATION The MC145406 has been designed to meet the electrical specifications of standards EIA-232-D/CCITT V.28 and as such, August 31, 1994 471