LANSDALE ML145583

ML145583
3.3 Volt Only Driver/Receiver with
an Integrated Standby Mode
RS 232/EIA–232–E and CCITT V.28
Legacy Device: Motorola MC145583
The ML145583 is a CMOS transceiver composed of three drivers and
five receivers that fulfills the electrical specifications of EIA–232–E,
EIA–562, and CCITT V.28 while operating from a single + 3.3 or + 5.0 V
power supply. This transceiver is a high–performance, low–power consumption device that is equipped with a standby function.
A voltage tripler and inverter converts the + 3.3 V to ± 8.8 V, or a voltage doubler and inverter converts the + 5.0 V to ± 8.8 V. This is accomplished through an on–chip 40 kHz oscillator and five inexpensive external capacitors.
FEATURES
28
1
PACKAGE
MOTOROLA
LANSDALE
SOIC 28W
MC145583DW
ML145583-7P
Note: Lansdale lead free (Pb) product, as it
becomes available, will be identified by a part
number prefix change from ML to MLE.
Drivers:
• ± 5 V Minimum Output Swing at 3.3 or 5.0 V Power Supply
• 300 Ω Power–Off Impedance
• Output Current Limiting
• Three–State Outputs During Standby Mode
Receivers:
• ± 25 V Input Range
• 3 to 7 kΩ Input Impedance
• 0.8 V Hysteresis for Enhanced Noise Immunity
• Three–State Outputs During Standby Mode
Ring Monitor Circuit:
• Invert the Input Level on Rx1 to Logic Output Level on RIMON at
Standby Mode
Page 1 of 7
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SOIC 28W = -7P
SOG PACKAGE
CASE 751F
PIN ASSIGNMENT
C5+
1
28
C2+
GND
2
27
VCC
C5–
3
26
C2–
RIMON
4
25
C1+
VSS
5
24
C1–
STB
6
23
VDD
Rx1
7
22
DO1
Rx2
8
21
DO2
Rx3
9
20
DO3
Tx1
10
19
DI1
Rx4
11
18
DO4
Tx2
12
17
DI2
Rx5
13
16
DO5
Tx3
14
15
DI3
RING
MONITOR
CIRCUIT
(INVERTING)
Issue A
ML145583
LANSDALE Semiconductor, Inc.
FUNCTION DIAGRAM
CHARGE PUMPS
OSC
VCC
C3
GND
VOLTAGE
TRIPLER
+
C1
VDD
VOLTAGE
INVERTER
C5
C2
C5+
C1–
C1+
C2–
+
C4
+
VSS
C5–
C2+
+
**
RECEIVER
VDD
*
VCC
STB
15 kΩ
+
–
DO
5.4 kΩ
1.0 V
TURN OFF
* Protection Circuit.
** Capacitors C1 and C2 are replaced by a 1 µF capacitor at
VCC = 5.0 V supply.
1.8 V
TURN ON
DRIVER
VDD
STB
VCC
Tx
300 Ω
LEVEL
SHIFTER
+
–
DI
1.4 V
VSS
Page 2 of 7
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Issue A
LANSDALE Semiconductor, Inc.
ML145583
MAXIMUM RATINGS (Voltage polarities referenced to GND)
Rating
Symbol
Value
Unit
VCC
– 0.5 to + 6.0
V
VIR
VSS – 15 to VDD + 15
– 0.5 to VCC + 0.5
V
DC Current per Pin
I
± 100
mA
Power Dissipation
PD
1
W
Operating Temperature Range
TA
– 40 to + 85
°C
Tstg
– 85 to + 150
°C
DC Supply Voltage
Input Voltage
Rx1 – Rx5 Inputs
DI1 – DI3 Inputs
Storage Temperature Range
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of
any voltage higher than maximum rated voltages to this high–impedance circuit. For proper
operation, it is recommended that the voltage
at the DI and DO pins be constrained to the
range GND ≤ VDI ≤ VCC and GND ≤ VDO
≤ VCC. Also, the voltage at the Rx pin should
be constrained to (VSS – 15 V) ≤ VRx1 – Rx5
≤ (VDD + 15 V), and Tx should be constrained
to VSS ≤ VTx1 – Tx3 ≤ VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., GND or
VCC for DI, and GND for Rx).
RECOMMENDED OPERATING LIMITS
Parameter
Power Supply
Symbol
Min
Typ
Max
Unit
VCC
VCC*
3.0
4.5
3.3
5.0
3.6
5.5
V
TA
– 40
—
85
°C
Operating Temperature Range
* Capacitors C1 and C2 are replaced by a 1 µF capacitor at VCC = 5 V.
DC ELECTRICAL CHARACTERISTICS (Voltage polarities referenced to GND = 0 V; C1 – C5 = 1 µF; TA = 25°C)
Symbol
Min
Typ
Max
Unit
DC Power Supply
VCC
3.0
3.3
3.6
V
Quiescent Supply Current (Output Unloaded, Input Low)
ICC
—
2.8
6.0
mA
ICC(STB)
—
<5
10
µA
Control Signal Input Voltage (STB)
VIL
VIH
—
VCC – 0.5
—
—
0.5
—
V
Control Signal Input Current (STB)
IIL
IIH
—
—
—
—
10
10
µA
8.5
7.5
8.8
7.9
—
—
—
—
– 8.8
– 7.8
– 8.5
– 7.0
Symbol
Min
Typ
Max
Unit
Parameter
Quiescent Supply Current (Standby Mode; STB = 1, Output Unloaded)
Charge Pumps Output Voltage (VCC = 3 V; C1, C2, C3, C4, C5 = 1 µF)
Output Voltage (VDD)
Iload = 0 mA
Iload = 6 mA
Output Voltage (VSS)
VDD
Iload = 0 mA
Iload = 6 mA
V
VSS
RECEIVER ELECTRICAL SPECIFICATIONS
(Voltage polarities referenced to GND = 0 V; VCC = + 3.3 V
10%; C1 – C5 = 1 µF; TA = 25°C)
Parameter
Input Turn–On Threshold (VDO1 – DO5 = VOL; Rx1 – Rx5)
3.3 V
5.0 V
Von
1.35
2.00
1.8
2.5
2.35
3.10
V
Input Turn–Off Threshold (VDO1 – DO5 = VOH; Rx1 – Rx5)
3.3 V
5.0 V
Voff
0.75
1.20
1.0
1.5
1.25
1.80
V
Rin
3
5.4
7
kΩ
High–Level Output Voltage (DO1 – DO5)
VRx1 – Rx5 = – 3 to – 25 V
Iout = – 20 µA
Iout = – 1 mA
VOH
VCC – 0.1
VCC – 0.6
—
2.7
—
—
V
Low–Level Output Voltage (DO1 – DO5)
VRx1 – Rx5 = + 3 to + 25 V
Iout = + 20 µA
Iout = + 1.6 mA
VOL
—
—
0.01
0.5
0.1
0.7
V
VTH
—
1.1
—
V
Input Resistance
Ring Monitor Circuit (Input Threshold)
High–Level Output Voltage (RIMON)
Iout = – 20 µA
Iout = – 1 mA
VOH
VCC – 0.1
VCC – 0.6
—
2.7
—
—
V
Low–Level Output Voltage (RIMON)
Iout = + 20 µA
Iout = + 1.6 mA
VOL
—
—
0.01
0.5
0.1
0.7
V
Page 3 of 7
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Issue A
ML145583
LANSDALE Semiconductor, Inc.
DRIVER ELECTRICAL SPECIFICATIONS
(Voltage polarities referenced to GND = 0 V; VCC = + 3.3 V or + 5.0 V
10%; C1 – C5 = 1 µF; TA = 25°C)
Parameter
Digital Input Voltage
Logic Low
Logic High
Symbol
Min
Typ
Max
VIL
VIH
—
1.8
—
—
0.7
—
IIL
IIH
VOH
—
—
7
—
—
± 1.0
5.0
8.5
7.0
8.8
—
—
—
—
– 7.0
– 8.8
– 5.0
– 8.5
DI1 – DI3
V
µA
Digital Input Current
DI1 – DI3
VDI = GND
VDI = VCC
Output High Voltage
Load on All Tx1 – Tx3, RL = 3 kΩ; CP = 2500 pF, VDI1 – DI3 = Logic Low
No Load
Output Low Voltage
Load on All Tx1 – Tx3, RL = 3 kΩ; CP = 2500 pF, VDI1 – DI3 = Logic High
No Load
VOL
Ripple (Refer to VDD – VSS Value) ***
VRF
Zoff
Off Source Impedance
Unit
Tx1 – Tx3
Output Short Circuit Current (VCC = 3.3 V or 5.5 V)
Tx1 – Tx3 Shorted to GND*
Tx1 – Tx3 Shorted to ± 15 V**
V
V
—
—
± 5%
300
—
—
—
—
—
—
± 60
± 100
ISC
Ω
mA
* Specification is for one Tx output to be shorted at a time. Should all three driver outputs be shorted simultaneously, device power dissipation
limits could be exceeded.
** This condition could exceed package limitations.
*** Ripple VRF would not exceed ± 5% of (VDD – VSS).
SWITCHING CHARACTERISTICS (VCC = + 3.3 V or + 5 V, 10%; C1 – C5 = 1 µF; TA = 25°C)
Parameter
Symbol
Min
Typ
Max
Unit
Drivers
Propagation Delay Time
Low–to–High
(RL = 3 kΩ, CL = 50 pF or 2500 pF)
Tx1 – Tx3
µs
tDPLH
—
0.5
1
—
0.5
1
SR
±4
—
± 30
V/µs
Output Disable Time*
tDAZ
—
4
10
µs
Output Enable Time*
tDZA
—
25
50
ms
tRPLH
—
—
1
tRPHL
—
—
1
High–to–Low
(RL = 3 kΩ, CL = 50 pF or 2500 pF)
Output Slew Rate (Source R = 300 Ω)
Loading: RL = 3 – 7 kΩ; CL = 2500 pF
tDPHL
Tx1 – Tx3
Receivers
Propagation Delay Time
Low–to–High
µs
DO1 – DO5
High–to–Low
Output Rise Time
DO1 – DO5
tr
—
120
200
ns
Output Fall Time
DO1 – DO5
tf
—
40
100
ns
Output Disable Time*
tRAZ
—
4
10
µs
Output Enable Time*
tRZA
—
25
50
ms
* Including the charge pump setup time.
TRUTH TABLES
Drivers
STB
Tx
Rx
STB
DO
X
H
Z*
X
H
Z*
H
L
L
H
L
L
L
L
H
L
L
H
* GND
VDO ≤ VCC
* VSS
Page 4 of 7
Receivers
DI
VTx ≤ VDD
X = Don’t Care
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X = Don’t Care
Issue A
LANSDALE Semiconductor, Inc.
ML145583
PIN DESCRIPTIONS
VCC
Digital Power Supply (Pin 27)
This digital supply pin is connected to the logic power supply. This
pin should have a not less than 0.33 µF capacitor GND.
GND
Ground (Pin 2)
Ground return pin is typically connected to the signal ground pin of
the EIA–232–E connector (Pin 7) as well as to the logic power supply ground.
VDD
Positive Power Supply (Pin 23)
This is the positive output of the on–chip voltage tripler and the
positive power supply input of the driver/receiver sections of the
device. This pin requires an external storage capacitor to filter the
50% duty cycle voltage generated by the charge pump.
VSS
Negative Power Supply (Pin 5)
This is the negative output of the on–chip voltage tripler/inverter
and the negative power supply input of the driver/ receiver sections
of the device. This pin requires an external storage capacitor to filter
the 50% duty cycle voltage generated by the charge pump.
RIMON
Ring Monitor Circuit (Pin 4)
The Ring Monitor Circuit will convert the input level on Rx1 pin
at standby mode and output on the RIMON pin.
STB
Standby Mode (Pin 6)
The device enters the standby mode while this pin is connected to
the logic high level. During the standby mode, driver and receiver
output pins become high–impedance state. In this condition, supply
current ICC is below 5 µA (typ).
C5+, C5–, C2+, C2–, C1+, C1–
Voltage Tripler and Inverter (Pins 1, 3, 28, 26, 25, 24)
These are the connections to the internal voltage tripler and inverter, which generate the VDD and VSS voltages.
Rx1, Rx2, Rx3, Rx4, Rx5
Receive Data Inputs (Pins 7, 8, 9, 11, 13)
These are the EIA–232–E receive signal inputs. A voltage between
+ 3 and + 25 V is decoded as a space, and causes the corresponding
DO pin to swing to GND (0 V). A voltage between – 3 and – 25 V is
decoded as a mark, and causes the DO pin to swing up to VCC.
DO1, DO2, DO3, DO4, DO5
Data Outputs (Pins 22, 21, 20, 18, 16)
These are the receiver digital output pins, which swing from VCC
to GND. Output level of these pins is high impedance while in standby mode.
DI1, DI2, DI3
Data Inputs (Pins 19, 17, 15)
These are the high impedance digital input pins to the drivers.
Input voltage levels on these pins must be betweenVCC and GND.
Tx1, Tx2, Tx3
Transmit Data Output (Pins 10, 12, 14)
These are the EIA–232–E transmit signal output pins, which
swing toward VDD and VSS. A logic 1 at a DI input causes the corresponding Tx output to swing toward VSS. The actual levels and
slew rate achieved will depend on the output loading (RL/CL). The
minimum output impedance is 300 Ω when turned off.
SWITCHING CHARACTERISTICS
DRIVER
DRIVER
DI1 – DI3
(INPUT)
+ 3.3 V
+3V
STB (INPUT)
50%
+ 1.5 V
+ 1.5 V
0V
0V
tf
Tx1 – Tx3
(OUTPUT)
tr
VOH
90%
10%
tDPHL
VOL
Rx1 – Rx5
(INPUT)
HIGH Z
–5V
tDAZ
tDPLH
RECEIVER
+5V
Tx1 – Tx3
(OUTPUT)
+5V
–5V V
OL
tDZA
RECEIVER
+3V
+ 3.3 V
+ 1.5 V
STB (INPUT)
50%
+ 1.5 V
0V
0V
DO1 – DO5
(OUTPUT)
tRPHL
90%
tRPLH
10%
tf
Page 5 of 7
VOH
VOH
90%
DO1 – DO5
(OUTPUT)
10%
VOL
tr
tRAZ
www.lansdale.com
HIGH Z
90%
10%
VOH
VOL
tRZA
Issue A
ML145583
LANSDALE Semiconductor, Inc.
ESD PROTECTION
ESD protection on IC devices that have their pins accessible
to the outside world is essential. High static voltages applied to
the pins when someone touches them either directly or indirectly can cause damage to gate oxides and transistor junctions
by coupling a portion of the energy from the I/O pin to the
power supply buses of the IC. This coupling will usually occur
MMBZ15VDLT1 x 8
through the internal ESD protection diodes which are designed
to do just that. The key to protecting the IC is to shunt as much
of the energy to ground as possible before it enters the IC.
Figure 1 shows a technique which will clamp the ESD voltage
at approximately ± 15 V using the MMBZ15VDLT1. Any
residual voltage which appears on the supply pins is shunted to
ground through the capacitors C1and C2.
C5+
C2+
GND
VCC
C5–
C2–
RIMON
C1+
VSS
C1–
STB
VDD
Rx1
DO1
Rx2
DO2
Rx3
DO3
Tx1
DI1
Rx4
DO4
Tx2
DI2
Rx5
DO5
Tx3
DI3
0.1 µF
0.1 µF
C1
C2
Figure 1. ESD Protection Scheme
Page 6 of 7
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Issue A
ML145583
LANSDALE Semiconductor, Inc.
OUTLINE DIMENSIONS
SOIC 28W = -7P
(ML145583-7P)
SOG PACKAGE
CASE 751F–04
-A28
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
15
14X
-B1
P
0.010 (0.25)
M
B
M
14
28X D
0.010 (0.25)
M
T A
S
B
M
S
R X 45°
C
-T26X
-T-
G
K
SEATING
PLANE
F
J
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
17.80 18.05
7.60
7.40
2.65
2.35
0.49
0.35
0.90
0.41
1.27 BSC
0.32
0.23
0.29
0.13
8°
0°
10.05 10.55
0.25
0.75
INCHES
MIN
MAX
0.701 0.711
0.292 0.299
0.093 0.104
0.014 0.019
0.016 0.035
0.050 BSC
0.009 0.013
0.005 0.011
0°
8°
0.395 0.415
0.010 0.029
Lansdale Semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Lansdale does not assume any liability arising out of the application or use of any product or circuit
described herein; neither does it convey any license under its patent rights nor the rights of others. “Typical” parameters which
may be provided in Lansdale data sheets and/or specifications can vary in different applications, and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by the customer’s technical experts. Lansdale Semiconductor is a registered trademark of Lansdale Semiconductor, Inc.
Page 7 of 7
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Issue A