ONSEMI MC74LCX02DTR2

MC74LCX02
Low−Voltage CMOS Quad
2−Input NOR Gate
With 5 V−Tolerant Inputs
The MC74LCX02 is a high performance, quad 2−input NOR gate
operating from a 2.3 to 3.6 V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5 V allows MC74LCX02 inputs to be safely driven
from 5 V devices.
Current drive capability is 24 mA at the outputs.
MARKING
DIAGRAMS
14
SOIC−14
D SUFFIX
CASE 751A
14
Features
•
•
•
•
•
•
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1
Designed for 2.3 V to 3.6 V VCC Operation
1
5 V Tolerant Inputs − Interface Capability With 5 V TTL Logic
14
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current (10 A) Substantially Reduces
System Power Requirements
Latchup Performance Exceeds 500 mA
14
1
LCX
02
ALYW
TSSOP−14
DT SUFFIX
CASE 948G
•
• ESD Performance: Human Body Model >2000 V;
•
LCX02
AWLYWW
1
Machine Model >200 V
Pb−Free Packages are Available*
14
74LCX02
ALYW
SOEIAJ−14
M SUFFIX
CASE 965
14
1
1
A
L, WL
Y
W, WW
=
=
=
=
Assembly Location
Wafer Lot
Year
Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
 Semiconductor Components Industries, LLC, 2005
January, 2005 − Rev. 5
1
Publication Order Number:
MC74LCX02/D
MC74LCX02
VCC
O2
B2
A2
O3
B3
A3
14
13
12
11
10
9
8
A0
B0
A1
B1
A2
B2
1
2
3
4
5
6
7
O0
A0
B0
O1
A1
B1
GND
A3
B3
2
1
3
5
4
6
11
13
12
8
10
9
Figure 1. Pinout: 14−Lead (Top View)
O0
O1
O2
O3
Figure 2. Logic Diagram
PIN NAMES
TRUTH TABLE
Pins
Function
An, Bn
Data Inputs
On
Outputs
Inputs
Outputs
An
Bn
On
L
L
H
L
H
L
H
L
L
H
H
L
H = High Voltage Level
L = Low Voltage Level
For ICC reasons, DO NOT FLOAT Inputs
MAXIMUM RATINGS
Symbol
Parameter
VCC
DC Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
Value
Condition
Unit
−0.5 to +7.0
V
−0.5 ≤ VI ≤ +7.0
V
−0.5 ≤ VO ≤ VCC + 0.5
Output in HIGH or LOW State (Note 1)
V
DC Input Diode Current
−50
VI < GND
mA
IOK
DC Output Diode Current
−50
VO < GND
mA
+50
VO > VCC
mA
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current Per Ground Pin
±100
mA
TSTG
Storage Temperature Range
−65 to +150
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
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2
MC74LCX02
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Type
Max
Unit
2.0
1.5
2.5, 3.3
2.5, 3.3
3.6
3.6
V
0
5.5
V
0
VCC
V
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
−24
−12
−8
mA
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
+24
+12
+8
mA
−40
+85
°C
0
10
ns/V
VCC
Supply Voltage
Operating
Data Retention Only
VI
Input Voltage
VO
Output Voltage
(HIGH or LOW State)
(3−State)
IOH
HIGH Level Output Current
IOL
LOW Level Output Current
TA
Operating Free−Air Temperature
t/V
Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V
DC ELECTRICAL CHARACTERISTICS
TA = −40°C to +85°C
Symbol
VIH
VIL
VOH
VOL
Characteristic
HIGH Level Input Voltage (Note 2)
LOW Level Input Voltage (Note 2)
HIGH Level Output Voltage
LOW Level Output Voltage
Condition
Min
2.3 V ≤ VCC ≤ 2.7 V
1.7
2.7 V ≤ VCC ≤ 3.6 V
2.0
Max
V
2.3 V ≤ VCC ≤ 2.7 V
0.7
2.7 V ≤ VCC ≤ 3.6 V
0.8
2.3 V ≤ VCC ≤ 3.6 V; IOH = −100 A
VCC − 0.2
VCC = 2.3 V; IOH = −8 mA
1.8
VCC = 2.7 V; IOH = −12 mA
2.2
VCC = 3.0 V; IOH = −18 mA
2.4
VCC = 3.0 V; IOH = −24 mA
2.2
Unit
V
V
2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 A
0.2
VCC = 2.3 V; IOL = 8 mA
0.6
VCC = 2.7 V; IOL = 12 mA
0.4
VCC = 3.0 V; IOL = 16 mA
0.4
VCC = 3.0 V; IOL = 24 mA
0.55
V
II
Input Leakage Current
2.3 V ≤ VCC ≤ 3.6 V; 0 V ≤ VI ≤ 5.5 V
±5
A
ICC
Quiescent Supply Current
2.3 ≤ VCC ≤ 3.6 V; VI = GND or VCC
10
A
2.3 ≤ VCC ≤ 3.6 V; 3.6 ≤ VI or VO ≤ 5.5 V
±10
2.3 ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V
500
ICC
Increase in ICC per Input
2. These values of VI are used to test DC electrical characteristics only.
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3
A
MC74LCX02
AC CHARACTERISTICS tR = tF = 2.5 ns; RL = 500 Limits
TA = −40°C to +85°C
Symbol
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
VCC = 2.5 V ± 0.2 V
CL = 50 pF
CL = 50 pF
CL = 30 pF
Parameter
Waveform
Min
Max
Min
Max
Min
Max
Unit
tPLH
Propagation Delay Time
1
1.5
5.5
1.5
6.2
1.5
6.6
ns
tPHL
Input−to−Output
1.5
5.5
1.5
6.2
1.5
6.6
tOSHL
Output−to−Output Skew
1.0
tOSLH
(Note 3)
1.0
ns
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Symbol
VOLP
VOLV
Characteristic
Condition
Min
Typ
Max
Unit
Dynamic LOW Peak Voltage
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
0.8
V
(Note 4)
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
0.6
V
Dynamic LOW Valley Voltage
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
−0.8
V
(Note 4)
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.6
V
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical
Unit
CIN
Input Capacitance
VCC = 3.3 V, VI = 0 V or VCC
7
pF
COUT
Output Capacitance
VCC = 3.3 V, VI = 0 V or VCC
8
pF
CPD
Power Dissipation Capacitance
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
25
pF
ORDERING INFORMATION
Device
Package
Shipping†
MC74LCX02D
SOIC−14
55 Units / Rail
MC74LCX02DR2
SOIC−14
2500 Tape & Reel
MC74LCX02DR2G
SOIC−14
(Pb−Free)
2500 Tape & Reel
MC74LCX02DT
TSSOP−14*
96 Units / Rail
MC74LCX02DTR2
TSSOP−14*
2500 Tape & Reel
MC74LCX02MEL
SOEIAJ−14
2000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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4
MC74LCX02
Vcc
Vmi
An, Bn
Vmi
0V
tPHL
tPLH
VOH
Vmo
On
Vmo
VOL
WAVEFORM 1 − PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Vcc
Symbol
3.3 V + 0.3 V
2.7 V
2.5 V + 0.2 V
Vmi
1.5 V
1.5 V
Vcc/2
Vmo
1.5 V
1.5 V
Vcc/2
Figure 3. AC Waveforms
VCC
PULSE
GENERATOR
DUT
RT
CL =
CL =
RL =
RT =
CL
RL
50 pF at VCC = 3.3 + 0.3 V or equivalent (includes jig and probe capacitance)
30 pF at VCC = 2.5 + 0.2 V or equivalent (includes jig and probe capacitance)
R1 = 500 or equivalent
ZOUT of pulse generator (typically 50 )
Figure 4. Test Circuit
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5
MC74LCX02
PACKAGE DIMENSIONS
SOIC−14
D SUFFIX
CASE 751A−03
ISSUE G
−A−
14
8
−B−
P 7 PL
0.25 (0.010)
M
B
M
7
1
G
F
R X 45 C
−T−
D 14 PL
0.25 (0.010)
SEATING
PLANE
M
T B
A
S
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
S
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0
7
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0
7
0.228 0.244
0.010 0.019
TSSOP−14
DT SUFFIX
CASE 948G−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
−U−
L
PIN 1
IDENT.
F
7
1
0.15 (0.006) T U
N
S
DETAIL E
K
A
−V−
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
K1
J J1
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
G
H
DETAIL E
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6
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.50
0.60
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0
8
INCHES
MIN
MAX
0.193
0.200
0.169
0.177
−−−
0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.020
0.024
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0
8
MC74LCX02
PACKAGE DIMENSIONS
SOEIAJ−14
M SUFFIX
CASE 965−01
ISSUE O
14
LE
8
Q1
E HE
L
7
1
M
DETAIL P
Z
D
VIEW P
A
e
c
DIM
A
A1
b
c
D
E
e
HE
L
LE
M
Q1
Z
A1
b
0.13 (0.005)
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
0.10 (0.004)
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7
MILLIMETERS
MIN
MAX
−−−
2.05
0.05
0.20
0.35
0.50
0.18
0.27
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 0
0.70
0.90
−−−
1.42
INCHES
MIN
MAX
−−−
0.081
0.002
0.008
0.014
0.020
0.007
0.011
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 0
0.028
0.035
−−−
0.056
MC74LCX02
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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Phone: 81−3−5773−3850
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8
For additional information, please contact your
local Sales Representative.
MC74LCX02/D