Application Note RF/IF Down-Converter + PLL Frequency Synthesizer ICs for GPS Receivers Usage and Applications of µPB1005K Document No. P14827EJ1V0AN00 (1st edition) Date Published September 2000 N CP(K) © 2000 Printed in Japan [MEMO] 2 Application Note P14827EJ1V0AN00 NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation. The information in this document may be revised without notice. This document introduces general applications of the products in this series. The application circuits and circuit constants in this document are not intended for use in actual mass production design. In addition, please take note that restrictions of the application circuit or standardization of the application circuit characteristics are not intended. Especially, characteristics of high-frequency ICs change depending on the external components and mounting pattern. Therefore the external circuit constants should be determined based on the required characteristics on your planned system referring to this document and characteristics should be checked before using these ICs. • The information in this document is current as of September, 2000. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. 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(Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above). M8E 00. 4 Application Note P14827EJ1V0AN00 3 [MEMO] 4 Application Note P14827EJ1V0AN00 CONTENTS 1. INTRODUCTION............................................................................................................................... 6 2. PRODUCT CONCEPT ...................................................................................................................... 6 3. PRODUCT FEATURES .................................................................................................................... 7 3.1 Main Features ......................................................................................................................... 7 3.2 Package ................................................................................................................................... 9 4. APPLICATION DESIGN EXAMPLES ............................................................................................ 10 4.1 Application design examples.............................................................................................. 10 4.2 External Component Examples .......................................................................................... 13 4.3 RF Matching Circuit and RF Filter Characteristics ........................................................... 14 4.4 VCO Design........................................................................................................................... 16 4.5 Temperature Dependence of VCO Characteristics ........................................................... 17 4.6 Loop Filter Design................................................................................................................ 18 5. PLL CHARACTERISTICS .............................................................................................................. 20 5.1 Standard Spectrum Waveform and C/N Characteristics .................................................. 20 5.2 Lockup Time Characteristics .............................................................................................. 21 5.3 2nd IF Output Spectrum Characteristics ........................................................................... 21 6. CONCLUSION ................................................................................................................................ 23 APPENDIX (1) Smith charts for input/output ports.................................................................................... 24 (2) External filter example and characteristics ....................................................................... 25 (3) Related documents .............................................................................................................. 27 CAUTIONS (1) Observe precautions for handling because this device, which employs an ultra-fine process, is very sensitive to electrostatic discharges. (2) The bypass capacitor should be attached to the VCC pin. (3) Design the loop filter constant according to the VCO to be used. (4) Form the ground pattern as wide as possible. (5) Insert a DC cut capacitor for high-frequency signal I/O pins. (6) When soldering, leave the bias in the OFF status unless evaluating the VCO. Application Note P14827EJ1V0AN00 5 1. INTRODUCTION The Global Positioning System (GPS) was first developed in the United States and is now also widely used in civilian applications all over the world. GPS receivers are used as position information receivers such as those in car navigation systems, and the market for such receivers is rapidly expanding throughout the world, including Japan. This market expansion is resulting in lower prices for GPS modules, which has effectively broadened their application scope to include systems such as notebook computers and wristwatch-size miniature portable receivers. Rising market needs for portable systems that include GPS modules have boosted demand for GPS-related ICs that are lower priced, consume less power, and come in compact packages that enable high-density mounting. NEC already sells the µPC2756T/TB and the µPC2753GR frequency down-converters for GPS receivers. To meet the needs cited above, NEC has also been developing and commercializing new ICs that integrates a PLL frequency synthesizer and frequency down-converter on the same chip. 2. PRODUCT CONCEPT The µPB1005K is a high-frequency silicon monolithic IC developed for frequency converters used in GPS receivers. This IC integrates on a single chip a frequency converter (down-converter) with an operating frequency band corresponding to the civilian GPS frequency (L1 frequency = 1575.42 MHz) and a PLL synthesizer that stabilizes the receiving frequency. This IC uses NEC’s own NESATTM (NEC Silicon Advanced Technology) III ultrafine fabrication process for 0.6 µm emitter width. The fact that the only frequency for civilian GPS is L1 enables the use of a fixed-frequency division method that eliminates input of frequency data or switching of frequency division values, which are required in conventional PLL frequency synthesizers. The reference frequency of 16.368 MHz is provided in accordance with the input frequency specification for demodulation ICs, which are currently the dominant type. This IC comes in a 36-pin plastic QFN package that enables high-density integration of chip sets. 6 Application Note P14827EJ1V0AN00 3. PRODUCT FEATURES 3.1 Main Features The main features of this new product are summarized below. (1) Double conversion method: Enables use of dielectric RF filter. (2) High integration of RF block: Single-chip integration of RF/IF down-converter and PLL frequency synthesizer (3) Enables high density and surface mounting: 36-pin plastic QFN package (4) Eliminates channel selection frequency data: Uses fixed frequency division with lockup activated at power-on. (5) Large phase comparison frequency: The reference spurious signal output does not appear in the (6) Enables effective use of external filter: Accepts a higher frequency for 1st IF, which makes it easier to vicinity of the VCO carrier, which facilitates loop filter design. reduce spurious emissions due to insertion of LC filters for the 1st and 2nd IF. (7) 2nd IF output by clipped wave: An on-chip differential 2nd IF amplifier provides a limiter effect. (8) Gain adjustment enabled in IF mixer: When necessary, an external control circuit can be connected to (9) Reference frequency: 16.368 MHz enable auto gain control. (10) Power supply voltage VCC = 2.7 to 3.3 V: Applicable for portable GPS receivers. Table 3-1 provides a product overview, and Figure 3-1 show the product’s pin configuration and internal block diagram. See the data sheet for the product specifications. Table 3-1. Product Overview Parameter µPB1005K Reference frequency 16.368 MHz 2nd IF frequency 4.092 MHz Receiving frequency 1 575.42 MHz Power supply voltage 2.7 to 3.3 V Power consumption Package 45.0 mA 36-pin plastic QFN Application Note P14827EJ1V0AN00 7 GND (2ndIF-AMP) 2ndIFin1 2ndIFin2 2ndIFbypass VCC (2ndIF-AMP) 2ndIFout N.C. REFout VCC (Reference block) Figure 3-1. µPB1005K Pin Configuration and Internal Block Diagram 27 26 25 24 23 22 21 20 19 IF-MIXout 28 18 N.C. N.C. 29 17 REFin VGC (IF-MIX) 30 16 N.C. 2 GND 15 (Divider block) VCC (IF-MIX) 31 8 N.C. 32 14 LOout 25 IF-MIXin 33 PD GND (IF-MIX) 34 8 VCC 13 (Divider block) 12 GND (Phase detector) 4 5 6 7 8 9 VCC (Phase detector) N.C. PD-Vout3 3 GND (1stLO-OSC) 2 1stLO-OSC2 1 1stLO-OSC1 10 PD-Vout2 VCC (1stLO-OSC) VCC (RF-MIX) 36 GND (RF-MIXin) 11 PD-Vout1 RF-MIXin RF-MIXout 35 Application Note P14827EJ1V0AN00 3.2 Package The µPB1005K uses a non-lead 36-pin QFP (QFN) package. The pins located at the four corners of the 36-pin QFN package (pins 9-10, pins 18-19, pins 27-28, and pins 36-1) are called island pins. They are provided to fix the lead frame and do not serve any other function, thus they do not get connected inside the chip. These island pins are thinner than the other function pins. They are not to be soldered, but in order to avoid contact between brace pins and other pins, trace a pattern and leave the brace pins unconnected. Figure 3-2. 36-Pin Plastic QFN (Unit: mm) 6.2 ± 0.2 6.2 ± 0.2 6.0 ± 0.2 6.0 ± 0.2 6.2 ± 0.2 6.0 ± 0.2 4 – C0.5 Pin 36 Pin 1 6.2 ± 0.2 6.0 ± 0.2 0.6 ± 0.1 1.0 MAX. 0.22 ± 0.05 0.5 ± 0.025 Back side of product Application Note P14827EJ1V0AN00 9 4. APPLICATION DESIGN EXAMPLES 4.1 Application design examples Figure 4-1 show a circuit example of a GPS frequency converter block that was designed using an application evaluation board for this IC. Figure 4-2 shows examples of implemented patterns. This application evaluation board is a PCB used to evaluate frequency converter blocks for GPS receivers that include the µPB1005K, and the board has printed patterns that enable mounting of external ICs, filters, to TCXO. Figure 4-1. Application Circuit Example VCC (3 V) 1 000 pF 0.1 µ F 10 000 1 000 pF pF 1 000 pF REFout 0.1 µ F 1 000 pF 2nd IF filter 27 0.01 µ F 1 000 pF VGC 26 25 24 23 22 21 20 19 28 18 29 17 30 16 2 31 1 µF 1 000 pF 8 32 1 000 pF 1 000 pF 14 25 13 LOout 1 000 pF 1 000 pF PD 1st LO monitor 1 000 pF TCXO 1 000 pF 15 33 1st IF filter 2nd IFout 1.95 kΩ 34 12 35 11 36 10 1 000 pF RFin RF amplifer 1 000 pF 1 000 pF RF filter 1 000 pF 6.8 nH 1 2 3 4 24 pF 1 pF 5 6 7 8 9 1.2 kΩ 24 pF 6.2 kΩ 33 nF 4.7 kΩ 4.7 kΩ 3.9 nH 1 000 pF 1 800 pF The application evaluation board shown in Figure 4-2 has printed patterns for monitoring the following items, in addition to the application’s input/output operations. <1> 1st LO monitor: Monitoring is enabled by coupling a capacitor to pin 35 (1st IF output pin of RF mixer). This can be used to monitor the oscillation frequency when adjusting the external circuit constant of the 1st LO. It can also be used to monitor image leakage, the 1st IF frequency, as well as 2nd LO leakage to the 1st IF. <2> Loout: <3> 1st LO ex-in: This enables monitoring of the phase comparison frequency. This can be used when evaluating external input from a signal generator without configuring a VCO using a PLL. 10 Application Note P14827EJ1V0AN00 Figure 4-2. Application Evaluation Board Implementation Example (a) Top view 70 mm NEC 1st LO monitor C7 2nd IF filter C10 C9 2nd IF out C8 50 mm C11 TCXO out µ PB1005K C12 RF in C13 R3 R4 C4 R2 C3 R1 C5 C6 C1 L1 C2 µ PB1005K 1st LO ex-in LO out 3 mm 20 mm Application Note P14827EJ1V0AN00 11 (b) Bottom view C 18 C C 19 20 C17 1st IF filter µ PC 2749 C C21 22 C 16 C 15 L2 C25 C 14 V-D R5 TCXO 12 Application Note P14827EJ1V0AN00 RF filter C23 C24 Table 4-1. Ratings for External Capacitors and Resistors Component Type Symbol Rating C1 1 pF C2, C5, C6, C10, C12, C13, C16 to C19, C21 to C25 1 000 pF C3 1 800 pF C4 33 nF C7, C8 0.1 µF C9 0.01 µF C11 1 µF C14, C15 24 pF (UJ) C20 10 000 pF L1 6.8 nH L2 3.9 nH R1 6.2 kΩ R2, R5 4.7 kΩ R3 1.2 kΩ R4 0Ω Chip capacitor Chip inductor Chip resistor The chip capacitor and chip resistor manufactured by Murata Manufacturing Co., Ltd. are used. 4.2 External Component Examples Table 4-2 lists external components other than capacitors, inductors, and resistors. These types of commercial components can be used. The following components and manufacturers are listed only as examples, so any components whose characteristics are similar to the listed components can be used. Table 4-2. External Component Examples Component Type Part number Manufacturer RF amplifier SiMMIC µPC2749TB NEC RF filter Dielectric BPF Type TDF, TDF3A-1575B-10 Toko 1st IF filter BPF for LC Type 5CCEW, 662BBX-037 Toko 2nd IF filter LPF for LC Type FST, 630LKN-1006 Toko Inductor for VCO Layer-built chip L LL1608-F3N9S (3.9 nH) Toko V-Di Varactor diode 1SV285 Toshiba TC7S04F, etc. Toshiba TCXO-201C1 (16.368 MHz) Kinseki Output buffer Reference signal oscillator Caution TCXO The external components and their characteristics are presented in summary form. For details concerning these external components, including these filters, contact the respective manufacturers. Application Note P14827EJ1V0AN00 13 4.3 RF Matching Circuit and RF Filter Characteristics In dielectric RF filters and other filters, 50 Ω impedance is connected to inputs and outputs to regulate insertion loss and attenuation characteristics. Figure 4-3 illustrates an RF filter’s S11 characteristics when ZL = 50 Ω and when ZL ≠ 50 Ω. As shown in the figure, this RF filter is best suited for applications in which ZS = ZL = 50 Ω. Figure 4-3. S11 of RF Filter (a) When ZL = 50 Ω S11 REF 1 log MAG. S11 REF 0.0 dB 10.0 dB/ 1 −20.731 dB 1.0 Units 200.0 m Units/ 42.783 Ω 4.3164 Ω CENTER 1.57542 GHz MARKER 1 1.57542 GHz 1 START STOP 1.075420000 GHz 2.075420000 GHz START STOP 1.075420000 GHz 2.075420000 GHz (b) When ZL = 100 Ω log MAG. S11 REF 0.0 dB 10.0 dB/ 1 −8.5229 dB S11 REF 1.0 Units 1 200.0 m Units/ 74.668 Ω −42.637 Ω CENTER 1.57542 GHz MARKER 1 1.57542 GHz 1 START 1.075420000 GHz STOP 2.075420000 GHz 14 START 1.075420000 GHz STOP 2.075420000 GHz Application Note P14827EJ1V0AN00 The µPC2749TB can be used at the front stage of the RF filter as an internal 50 Ω matching RF amplifier, and the RF input pin that becomes the RF filter load should be configured with a matching circuit that includes a DC cut capacitor, an external series inductor, and an external parallel capacitor. Figure 4-4 illustrates the S11 characteristics of the RF input pin. As shown in this figure, this makes matching relatively simple. Since the RF filter is inserted between the RF mixer input pin and the front-stage RF amplifier, it is useful for image level suppression. Figure 4-4. S11 Characteristics for 50 Ω Impedance Matching at RF Input Pin Monitor (RF filter output mount section) 6.8 nH <1> Connector 1 pF S11 REF 1.0 Units 1 200.0 mUnits/ 49.246 Ω −4.7383 Ω log MAG. S11 REF 0.0 dB 10.0 dB/ 1 −25.737 dB MARKER 1 1.57542 GHz MARKER 1 1.57542 GHz 1 1 START 1.075420000 GHz STOP 2.075420000 GHz START 1.075420000 GHz STOP 2.075420000 GHz Application Note P14827EJ1V0AN00 15 4.4 VCO Design Basic design Since the base pins of the differential amplifier type oscillator protrude, obtain the oscillation by cutting off the DC flow and allowing positive feedback through the varactor diode and the inductor. Use a varactor diode that has a small minimum capacitance, such as Toshiba’s 1SV285. The VCO control voltage should be applied via a resistor with a resistance of 4.7 kΩ, for example. Determine the relation between the VCO control voltage and the oscillation frequency based on the varactor diode’s variable capacitance value and the inductor’s value. In NEC’s application evaluation, L = 3.9 nH because the VCO oscillation frequency is 1636.80 MHz. Verification after mounting on PCB When it is not possible to verify the parasitic parameter effect of the PCB only by theoretical VCO design, we suggest comparing theoretical design with PCB evaluation results in the manner described below. While monitoring local leakage via a spectrum analyzer that has been connected to the 1st LO monitor, apply a 1.5 V control voltage to VCO. Next, adjust the inductor’s value or the mounting position. Lockup is enabled when the inductor’s value comes to match the 1st LO frequency’s TYP value. Figure 4-5 illustrates the VCO sensitivity characteristics and shows a circuit diagram. Figure 4-5. VCO Sensitivity Characteristics Example and Circuit Diagram 3.5 Control voltage VCONT (V) 3.0 2.5 2.0 1.5 1.0 0.5 0 0 1.50 1.55 1.60 1.65 1.70 1.75 VCO oscillation frequency for 1st LO fVCO (GHz) VCC Internal (to IC) 3 VCC To RF-MIX or prescaler input amplifier External DC cut 4 L Control voltage (from PLL loop filter) 5 DC cut 6 16 Application Note P14827EJ1V0AN00 4.5 Temperature Dependence of VCO Characteristics Configure the VCO so as to minimize frequency fluctuations caused by the ambient temperature. If the VCO frequency reaches a range that disables PLL operations of this IC due to the ambient temperature fluctuation by the external components temperature coefficient, lockup operation becomes impossible. Figures 4-6 and 4-7 show the dependence on ambient temperature of VCO sensitivity characteristics when using the CH standard, which uses a small rate of change in temperature compensation, and UJ standard, which uses a large rate of change in temperature compensation, for the DC cut capacitor of the base pin of the differential amplifier type oscillator, respectively. Using a UJ standard capacitor is particularly effective for suppressing frequency fluctuations at low temperatures. Also, since the slope of the VCO sensitivity curve is determined by the varactor diode, use a varactor diode with small frequency fluctuation characteristics within the VCO control voltage range (0 to 3.0 V). Figure 4-6. VCO Sensitivity Characteristics when Figure 4-7. VCO Sensitivity Characteristics when Using UJ Standard for DC Cut Capacitor 3.5 3.5 3.0 3.0 2.5 TA = +85 ˚C 2.0 1.5 TA = +25 ˚C 1.0 0.5 Control voltage VCONT (V) Control voltage VCONT (V) Using CH Standard for DC Cut Capacitor 2.5 TA = +85 ˚C 2.0 1.5 TA = +25 ˚C 1.0 0.5 TA = −40 ˚C 0 TA = −40 ˚C 0 0 1.50 1.55 1.60 1.65 1.70 1.75 VCO oscillation frequency for 1st LO fVCO (GHz) 0 1.50 1.55 1.60 1.65 1.70 1.75 VCO oscillation frequency for 1st LO fVCO (GHz) Application Note P14827EJ1V0AN00 17 4.6 Loop Filter Design Adjust the loop filter constant until the carrier’s C/N drops below −40 dBc at 12.5 kHz detuning. Note that there is a relation between the loop filter constant and the VCO sensitivity characteristics. The parameters and corresponding relational expressions required for designing the loop filter are shown below (persons wishing to study these parameters and relevant logic should see the existing PLL documentation.) Parameters required for design of loop filter • PLL block parameters: Phase comparator gain Kφ, VCO gain KV, dividing ratio N • PLL loop parameters: Damping filter ζ, natural angular frequency ωn Relational expressions for active lag-lead filter CC Kφ • KV R1 = N • ω2n • C R2 = CC = 2•ζ ωn•C (Ω) R2 Phase/frequency comparator output (Ω) 1 R2 • (5 to 10) • ω n R1 (F) Conversion gain of phase comparator Kφ = ∴ Kφ = VOH – VOL 1 × 2 2π (V/rad) VCC – GND 1 × 2 2π (V/rad) .........* * Approximate expression VCO sensitivity KV = ∆f × 2π ∆V (rad/V • sec) N count (dividing ratio for VCO input signal) N = 200 18 Application Note P14827EJ1V0AN00 C To VCO Loop amplifier The following external constant values were obtained by tests using the design shown in the application circuit example illustrated in Figure 4-1. Loop filter circuit constants 7 C = 33 nF To power supply RL R2 = 1.2 kΩ 9 To VCO C Cad was added for suppression of spurious R2 signal output. Cad = 1800 pF 10 Cad From phase/frequency R1 comparator 1.24 kΩ on chip 11 Internal (to IC) External Since the VCO oscillation frequency and the R1 and N values are all fixed in this IC, the relations between loop filter circuit constants that optimized characteristics through experiments were obtained, and a method for easily obtaining C and R2 from these interrelationships was evolved. Since this IC is an active-filter type, the following circuit constant expressions for active filters are used. Kφ • KV R1 = N • ω n2 • C 2•ζ ωn = R2 • C From these two expressions, it follows that: Kφ • KV • R22 • C R1 = N•4•ζ2 2 KV • R2 • C R1 • 4 • ζ 2 = N Kφ After testing the µPB1005K to obtain optimum characteristics, the external circuit constants for the loop filter were found to be C = 33 nF, R2 = 1.2 kΩ (R1 is on chip). The gain of the configured VCO is: KV = (1 725 − 1 545) MHz × 2 π / 3.0 V = 377 × 106 (rad/V • sec) Furthermore, the following empirical value is obtained based on the values for C and R2. KV • R22 • C 377 × 106 × 1 2002 × 33 × 10-9 = = 89.58 × 103 N 200 Empirical value Thus the following expression is obtained. µPB1005K loop filter empirical expression N 3 R2 = × 89.58 × 10 KV • C Where N = 200. The KV value may vary depending on the components that are used, so the C and R2 values obtained via the above relational expressions should be considered as a guide for obtaining optimized values via testing on your circuit board. Application Note P14827EJ1V0AN00 19 5. PLL CHARACTERISTICS 5.1 Standard Spectrum Waveform and C/N Characteristics The 1st LO monitor was used to measure the VCO’s carrier spectrum. Figure 5-1 shows the VCO carrier spectrum. Main results • When VCONT voltage (1.5 V) was externally applied, the oscillation frequency became 1636.80 MHz and the VCO sensitivity characteristics were obtained by adjusting the inductor’s mounting position. (See Figure 4-5.) • When the C/N value exceeds −78 dBc/Hz based on 1 kHz detuning, the characteristic of a noise level of −65 dBc/Hz generally set by GPS manufacturers is met (according to NEC’s marketing research). Figure 5-1. VCO Carrier Spectrums (Monitored via 1st LO Monitor) REF −10.0 dBm ATTEN 10 dB MKR 1.636815 GHz −35.90 dBm 10 dB/ REF CENTER 1.63681 GHz RES BW 1 00 kHz MARKER ∆ 15.01 kHz −58.80 dB VBW 1 kHz −10.0 dBm ATTEN 10 dB SPAN 5.00 MHz SWP 10.0 sec MKR ∆ 100.0 kHz −55.60 dB 10 dB/ CENTER 1.6368149 GHz VBW 10 Hz RES BW 1 kHz REF −20.0 dBm VAVG 8 ATTEN 10 dB SPAN 5.00 kHz SWP 10.0 sec MKR ∆ −86.67 dB/Hz 1.00 kHz 10 dB/ MARKER ∆ 100.0 kHz −55.60 dB CENTER 1.636814 GHz VBW 30 Hz RES BW 3 kHz 20 MKR ∆ 15.01 kHz −58.80 dB 10 dB/ MARKER ∆ 1.636815 GHz −35.90 dBm REF −10.0 dBm ATTEN 10 dB MARKER ∆ 1.00 kHz −86.67 dB/Hz SPAN 201 kHz SWP 10.0 sec CENTER 1.63660063 GHz RES BW 100 Hz VBW 30 Hz Application Note P14827EJ1V0AN00 SPAN 10.00 kHz SWP 4.6 sec 5.2 Lockup Time Characteristics The lockup time was checked using a board assembled from the application circuit example. The lockup time of the PLL synthesizer at power-on was measured for the reference characteristics of the application circuit example. The power supply equipment for the circuit’s power supply pin was replaced with a pulse generator and the supply voltage (3 V) was turned ON and OFF repeatedly, after which the zero-span mode of the spectrum analyzer was used to analyze the VCO carrier leak signal at the 1st LO monitor pin, and the length of time until the 1.6368 GHz oscillation power comes within ±1 dB and reaches lockup was measured. Figure 5-2 shows the trace plot data for the rising edge of the carrier in the zero-span mode. The lockup time from power-on to normal operation was approximately 90 µs. Figure 5-2. Measurement of Lockup Time (via Spectrum Analyzer in Zero-Span Mode) ATTEN 10 dB RL 0 dBm 10 dB/ 90 µ s 3V 0V CENTER 1.636801 GHz RBW 1.0 MHz VBW 3.0 MHz SPAN 0 Hz SWP 500 µ s 5.3 2nd IF Output Spectrum Characteristics Figure 5-3 shows the 2nd IF output spectrum characteristics. This spectrum was measured using a spectrum analyzer to monitor the 2nd IF output frequency based on a −100 dBm input level to the first RF amplifier (µPC2749TB) in the application circuit example. Application Note P14827EJ1V0AN00 21 Figure 5-3. 2nd IF Output Spectrum Characteristics REF 10.0 dBm ATTEN 20 dB Figure 5-4. Measurement Circuit MKR 4.092 GHz −30.00 dBm 10 dB/ 2nd IF OUT <22> MARKER 4.092 MHz −30.00 dBm 1.95 kΩ 50 Ω SA START 100 kHz RES BW 30 kHz VBW 1 kHz STOP 8.00 MHz SWP 290 msec Figure 5-3 shows the 2nd IF output spectrum characteristics, and Figure 5-4 shows the measurement circuit that was used. The 2nd IF output power specification for this IC is −14.5 dBm (MIN.), but a value of −30.0 dBm was detected in the measurement data in Figure 5-3. The specification is the value from the voltage gain, whereas the measurement value of the spectrum analyzer in Figure 5-3 is due to the power gain. Since this data is obtained via the measurement circuit shown in Figure 5-4, which includes a 1.95 kΩ load and an instrument impedance of 50 Ω, the actual value must be converted as follows. Output power = (read value of spectrum analyzer) + 10 log (2000/50) = (read value of spectrum analyzer) + 16 dBm. Thus, calculation of the measurement data in Figure 5-3 yields the following: 2nd IF output power = −30 dBm + 16 dBm = −14 dBm Figure 5-5 shows the 2nd IF output amplitude measured with an oscilloscope. An output amplitude value exceeding 600 mVP-P was detected for a −100 dBm input level to the application circuit’s first RF amplifier (µPC2749TB). This data indicates a square wave of approximately 800 mVP-P. 22 Application Note P14827EJ1V0AN00 Figure 5-5. 2nd IF Output Amplitude 200 mV 0.00s Freq (1) = 4.092 MHz 6. 50 ns / VP-P (1) = 862.5 mV CONCLUSION The above has described the usage and applications of the µPB1005K RF/IF down-converter + PLL frequency synthesizer ICs for GPS receivers. Refer to the appendix for characteristics concerning examples of commercially available components used as external components for this IC. Application Note P14827EJ1V0AN00 23 APPENDIX (1) Smith charts for input/output ports (VCC = 3.0 V) S11 1: 19.184 Ω −52.871 Ω 2.0068 pF 1 575.420 000 MHz RF-MIXin MARKER1...1.57542 GHz S11 1: 271.94 Ω −945.25 Ω 2.7431 pF 61.380000 MHz RF-MIXin MARKER1...61.38 MHz 1 1 START 1 000 . 000 000 MHz STOP 2 000.000 000 MHz S22 1: 24.140 Ω 2.1191 Ω 5.4948 nH 61.380000 MHz RF-MIXout MARKER1...61.38 MHz START 10 . 000 000 MHz STOP 100.000 000 MHz S11 1: 3.9248 kΩ −3.8625 kΩ 10.07 pF 4.092000 MHz 2nd IFin1 MARKER1...4.092 MHz 1 1 START 10.000 000 MHz STOP 100.000 000 MHz 24 START 0.500 000 MHz STOP 10.000 000 MHz Application Note P14827EJ1V0AN00 (2) External filter example and characteristics (For corresponding components, refer to Table 4-1 Ratings for External Capacitors and Resistors.) Source: Toko, Inc. TDF3A-1575B-10 20 50 25 60 30 70 35 80 40 90 45 Span: 500 MHz Center Frequency : 1575 MHz 50 1.97 dB max. Passband Insertion Loss Passband Ripple 0.08 dB Passband V.S.W.R. 1.27 max. 36.11 dB at 1,540.40 MHz 10.72 dB at 1,610.40 MHz 9.00 dB at 1,715.40 MHz 33.15 dB OUT T max. 5.7 Specifications Center Frequency (Fo) Passband Width Input Output Impedance Insertion Loss in Passband Ripple in Passband V.S.W.R. in Passband Attenuation GND 4.7 A = 5.6 B = 2.5 C = 3.0 Attenuation at 1,435.40 MHz 1.0 40 Marking. B 15 1.2 10 30 1.2 20 IN GND 1.0 5 Return Loss (dB) 10 100 Toko No. : TDF3A-1575B-10 Dimensions 0 A ± 0.5. Sample No. : 1 0 Attenuation (dB) DIELECTRIC BANDPSS FILTER TDF Series Tolerance : ±0.3 Unit : mm : : : : : : : : : 1575.4 MHz Fo ± 5.0 MHz 50 Ω 2.7 dB max. 1.0 dB max. 2.0 max. 7.0 dB min. at Fo ± 35 MHz 30 dB min. at Fo ± 140 MHz 28 dB min. at Fo ± 140 MHz Date: 95.11.06 Instrument : WILTRON 37269A 5CCEW <6> 662BBX-037 :3.04.23 12:16 MO 10 dB −53.15 dB 1 dB/ −4.65 dB MKR[ 250]:61.38 MHz −3.45 dB A[*]:MAGTD −3.32 dB B[*]:B <4> INSTRUMENTS 3577A (hp) 1 kΩ <1><2><3> 1 kΩ Use pins 4 and 6 in a floating state. CF:61.38 MHz OUT[B]:0.00 dBm ST:4.20 sec IRG[R]:0 dBm IRG[T]:0 dBm MAGTD SPAN :100 MHz EL:0.00 cm RBM:10 kHz VBW:10 kHz 50 Ω OFFSET CTR Measurement circuit (Bottom view) Rin Key Rin Rout = 50 Ω Rout = 50 Ω ATTENUAION [dB] 1 dB /div. 5 MHz /div. 0 1.4 10 1.2 20 1 30 0.8 40 0.6 50 0.4 60 0.2 70 0.1 <1><2><3> <4><5><6> GROUP DELAY [ µ sec] 10 dB /div. 10 MHz /div. 0 0.2 0.5 1 2 FREQUENCY [MHz] 5 10 <12><11><10> <9><8><7> Caution For details concerning the characteristics of external components, contact the respective manufacturers. Application Note P14827EJ1V0AN00 25 Reference oscillator (TCXO) Source: Kinseki (VC-) TCXO-201C1 Temperature compensation crystal oscillator/TCXO, VC-TCXO • Features • For cellular phone (VC-) TCXO • Surface-mounting (ceramic base) type enabling automatic mounting • Low profile, 2.4 mm high • Reflow soldering can be used. • Package Dimensions 0.72 0.8 2.54 9.6 ± 0.3 2.4 ± 0.1 11.4 ± 0.3 (VC-) TCXO-201C1 4 5 6 7 1 8−R0.25 1.0 ± 0.1 8 1.0 ± 0.1 CONNECTION 1 : NC 4 : GND 5 : OUTPUT 6 : GND 7 : VC VC-TCXO NC TCXO 8 : +DC Dimensions (mm) • Specifications Parameter TCXO-201C1 Note 1 VC-TCXO-201C1 Part No. Reference frequency 12.8, 13.0, 14.4, 14.85, 15.36, 19.2, 19.68 MHz ±2.5 × 10−6/−30 to +75 °CNote 2 Frequency stability ±1 × 10−6MAX./year Secular change Supply voltage +5 V ± 5% Consumption current 2.0 mA MAX. Output Note 3 Output load 10 kΩ /10 pF Output level 1VP-P MIN. (DC cut) ±3 × 10−6MIN. Frequency variable range Control voltage frequency characteristic ±4 × 10−6MIN./+2.5 ± 2V (normal direction) Volume 0.27 cc Notes 1. For the reflow conditions, contact an NEC sales representative. 6 2. Product with frequency stability of ±1.5 × 10− /−20 to +75 °C can also be manufactured. 3. Products with as supply voltage of 3.0 V can also be manufactured. Caution 26 For the detailed characteristics of the external component examples, contact an NEC sales representative. Application Note P14827EJ1V0AN00 (3) Related documents Application Note Fundamentals of Frequency Synthesizer Circuits Employing Phase-Locked Loop Document No.: P12196E (Old Document No.: IEB-1003) Data Sheet µPB1005K Document No.: P14016E Data Sheet µPC2749TB Document No.: P13489E Application Note Use and Application of Silicon High-Frequency Wideband Amplifier MMIC (µPC2749TB, etc.) Document No.: P11976E Application Note P14827EJ1V0AN00 27 [MEMO] 28 Application Note P14827EJ1V0AN00 [MEMO] Application Note P14827EJ1V0AN00 29 [MEMO] 30 Application Note P14827EJ1V0AN00 Facsimile Message From: Name Company Tel. Although NEC has taken all possible steps to ensure that the documentation supplied to our customers is complete, bug free and up-to-date, we readily accept that errors may occur. Despite all the care and precautions we've taken, you may encounter problems in the documentation. Please complete this form whenever you'd like to report errors or suggest improvements to us. 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