Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated PHX2N60E FEATURES SYMBOL • Repetitive Avalanche Rated • Fast switching • Stable off-state characteristics • High thermal cycling performance • Isolated package QUICK REFERENCE DATA d VDSS = 600 V ID = 1.3 A g RDS(ON) ≤ 6 Ω s GENERAL DESCRIPTION PINNING N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching applications. PIN SOT186A DESCRIPTION case 1 gate 2 drain 3 source case isolated The PHX2N60E is supplied in the SOT186A full pack, isolated package. 1 2 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDSS VDGR VGS ID Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Tj = 25 ˚C to 150˚C Tj = 25 ˚C to 150˚C; RGS = 20 kΩ IDM PD Tj, Tstg Pulsed drain current Total dissipation Operating junction and storage temperature range - 55 600 600 ± 30 1.3 0.83 7.6 25 150 V V V A A A W ˚C MIN. MAX. UNIT - 102 mJ - 3.7 mJ - 1.9 A Ths = 25 ˚C; VGS = 10 V Ths = 100 ˚C; VGS = 10 V Ths = 25 ˚C Ths = 25 ˚C AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS EAR IAS, IAR CONDITIONS Non-repetitive avalanche energy Unclamped inductive load, IAS = 1.3 A; tp = 0.2 ms; Tj prior to avalanche = 25˚C; VDD ≤ 50 V; RGS = 50 Ω; VGS = 10 V; refer to fig:17 Repetitive avalanche energy1 IAR = 1.9 A; tp = 2.5 µs; Tj prior to avalanche = 25˚C; RGS = 50 Ω; VGS = 10 V; refer to fig:18 Repetitive and non-repetitive avalanche current 1 pulse width and repetition rate limited by Tj max. December 1998 1 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated PHX2N60E ISOLATION LIMITING VALUE & CHARACTERISTIC Ths = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS Visol R.M.S. isolation voltage from all three terminals to external heatsink f = 50-60 Hz; sinusoidal waveform; R.H. ≤ 65% ; clean and dustfree Cisol Capacitance from T2 to external f = 1 MHz heatsink MIN. TYP. - - 10 MAX. UNIT 2500 V - pF THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS Rth j-hs with heatsink compound Rth j-a Thermal resistance junction to heatsink Thermal resistance junction to ambient MIN. TYP. MAX. UNIT - - 5 K/W - 55 - K/W ELECTRICAL CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. V(BR)DSS VGS = 0 V; ID = 0.25 mA 600 - - V VDS = VGS; ID = 0.25 mA - 0.1 - %/K 2.0 0.5 - 4.6 3.0 1.4 1 50 10 6 4.0 100 500 200 Ω V S µA µA nA Drain-source breakdown voltage ∆V(BR)DSS / Drain-source breakdown ∆Tj voltage temperature coefficient RDS(ON) Drain-source on resistance VGS(TO) Gate threshold voltage gfs Forward transconductance IDSS Drain-source leakage current TYP. MAX. UNIT IGSS VGS = 10 V; ID = 1 A VDS = VGS; ID = 0.25 mA VDS = 30 V; ID = 1 A VDS = 600 V; VGS = 0 V VDS = 480 V; VGS = 0 V; Tj = 125 ˚C Gate-source leakage current VGS = ±30 V; VDS = 0 V Qg(tot) Qgs Qgd Total gate charge Gate-source charge Gate-drain (Miller) charge ID = 2 A; VDD = 480 V; VGS = 10 V - 20 2 9 25 3 15 nC nC nC td(on) tr td(off) tf Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time VDD = 300 V; RD = 150 Ω; RG = 24 Ω - 10 20 60 20 - ns ns ns ns Ld Ls Internal drain inductance Internal source inductance Measured from drain lead to centre of die Measured from source lead to source bond pad - 4.5 7.5 - nH nH Ciss Coss Crss Input capacitance Output capacitance Feedback capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 236 34 20 - pF pF pF December 1998 2 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated PHX2N60E SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS IS Ths = 25˚C - - 1.9 A Ths = 25˚C - - 7.6 A VSD Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage IS = 2 A; VGS = 0 V - - 1.2 V trr Qrr Reverse recovery time Reverse recovery charge IS = 2 A; VGS = 0 V; dI/dt = 100 A/µs - 360 2.4 - ns µC ISM 120 MIN. Normalised Power Derating PD% 10 with heatsink compound 110 TYP. MAX. UNIT PHX1N60A Drain current, ID (Amps) tp = 10 us D S/I 100 90 = N) VD S(O RD 80 70 100us 1 1ms 60 DC 50 40 10ms 0.1 100ms 30 20 10 0 0 20 40 60 80 Ths / C 100 120 0.01 10 140 Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Ths) 120 1E+01 with heatsink compound 110 1000 Fig.3. Safe operating area. Ths = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp Normalised Current Derating ID% 100 Drain-source voltage, VDS (Volts) 100 90 ZTHX43 Zth j-hs / (K/W) 0.5 80 70 1E+00 0.2 0.1 60 0.05 50 40 1E-01 0.02 PD 30 tp D= 20 0 10 0 0 20 40 60 80 Ths / C 100 120 1E-02 1E-07 140 1E-05 1E-03 t/s 1E-01 t 1E+01 Fig.4. Transient thermal impedance. Zth j-hs = f(t); parameter D = tp/T Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Ths); conditions: VGS ≥ 10 V December 1998 T tp T 3 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated PHX2N60E ID, Drain current (Amps) 4 PHP1N60A 2 Transconductance, gfs (S) 20 V Tj = 25 C PHP1N60A VDS > ID x RDS(on)max 10 V 3 1.5 6.5 V 6V Tj = 25 C 150 C 1 2 5.5 V 1 0.5 5V VGS = 4.5 V 0 0 5 10 15 20 VDS, Drain-Source voltage (Volts) 25 0 30 0 1 Fig.5. Typical output characteristics. ID = f(VDS); parameter VGS Drain-Source on resistance, RDS(ON) (Ohms) 5V 5.5 V 12 2 3 Drain current, ID (A) 4 5 Fig.8. Typical transconductance. gfs = f(ID); parameter Tj Normalised RDS(ON) = f(Tj) a PHP1N60A Tj = 25 C 10 2 6V 8 6.5 V 6 10 V VGS = 20 V 1 4 2 0 0 0 1 2 3 Drain current, ID (Amps) -60 4 Fig.6. Typical on-state resistance. RDS(ON) = f(ID); parameter VGS 5 Drain current, ID (A) -40 -20 0 20 40 60 Tj / C 80 100 120 140 Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 1 A; VGS = 10 V VGS(TO) / V PHP1N60A VDS > ID x RDS(on)max max. 4 4 typ. 3 3 min. 2 2 150 C 1 1 Tj = 25 C 0 0 0 2 4 6 Gate-source voltage, VGS (V) 8 -60 10 -20 0 20 40 60 Tj / C 80 100 120 140 Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS Fig.7. Typical transfer characteristics. ID = f(VGS); parameter Tj December 1998 -40 4 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated 1E-01 PHX2N60E SUB-THRESHOLD CONDUCTION ID / A 1000 Switching times, td(on), tr, td(off), tf (ns) 1E-02 2% 1E-03 typ 100 98 % td(off) 1E-04 tr tf 10 td(on) 1E-05 1E-06 0 1 2 VGS / V 3 1 4 Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS 0 20 40 60 Gate resistance, RG (Ohms) 80 100 Fig.14. Typical switching times; td(on), tr, td(off), tf = f(RG) PHP1N60A Capacitances, Ciss, Coss, Crss (pF) 1000 PHP1N60A VDD = 300 V RD = 150 Ohms Tj = 25 C 1.15 Normalised Drain-source breakdown voltage V(BR)DSS @ Tj V(BR)DSS @ 25 C Ciss 1.1 100 1.05 Coss 1 10 0.95 Crss 0.9 1 1 10 100 Drain-source voltage, VDS (V) 0.85 -100 1000 Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 20 Gate-Source voltage, VGS (Volts) ID = 2 A PHP1N60A 120 V 0 50 Tj, Junction temperature (C) 100 150 Fig.15. Normalised drain-source breakdown voltage; V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj) 10 PHP1N60A Source-drain diode current, IF(A) VGS = 0 V 240 V 15 -50 8 VDD = 480 V 150 C Tj = 25 C 6 10 4 5 2 0 0 10 20 Gate charge, Qg (nC) 30 0 40 Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); parameter VDS December 1998 0 0.5 1 Source-Drain voltage, VSDS (V) 1.5 Fig.16. Source-Drain diode characteristic. IF = f(VSDS); parameter Tj 5 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated 10 PHX2N60E Non-repetitive Avalanche current, IAS (A) 10 Maximum Repetitive Avalanche Current, IAR (A) Tj prior to avalanche = 25 C Tj prior to avalanche = 25 C 1 1 125 C 125 C VDS 0.1 tp ID 0.1 1E-06 PHP2N60E 1E-05 1E-04 1E-03 PHP2N60E 0.01 1E-06 1E-02 Fig.17. Maximum permissible non-repetitive avalanche current (IAS) versus avalanche time (tp); unclamped inductive load December 1998 1E-05 1E-04 1E-03 1E-02 Avalanche time, tp (s) Avalanche time, tp (s) Fig.18. Maximum permissible repetitive avalanche current (IAR) versus avalanche time (tp) 6 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated PHX2N60E MECHANICAL DATA Dimensions in mm Net Mass: 2 g 10.3 max 4.6 max 3.2 3.0 2.9 max 2.8 Recesses (2x) 2.5 0.8 max. depth 6.4 15.8 19 max. max. 15.8 max seating plane 3 max. not tinned 3 2.5 13.5 min. 1 0.4 2 3 M 1.0 (2x) 0.6 2.54 0.9 0.7 0.5 2.5 5.08 1.3 Fig.19. SOT186A; The seating plane is electrically isolated from all terminals. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for F-pack envelopes. 3. Epoxy meets UL94 V0 at 1/8". December 1998 7 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistors Avalanche energy rated PHX2N60E DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. December 1998 8 Rev 1.200