Philips Semiconductors Product specification PowerMOS transistor Avalanche energy rated IRF830 FEATURES SYMBOL QUICK REFERENCE DATA • Repetitive Avalanche Rated • Fast switching • High thermal cycling performance • Low thermal resistance d VDSS = 500 V ID = 5.9 A g RDS(ON) ≤ 1.5 Ω s GENERAL DESCRIPTION PINNING N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching applications. PIN SOT78 (TO220AB) DESCRIPTION 1 gate 2 drain 3 source tab tab drain The IRF830 is supplied in the SOT78 (TO220AB) conventional leaded package. 1 23 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDSS VDGR VGS ID Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Tj = 25 ˚C to 150˚C Tj = 25 ˚C to 150˚C; RGS = 20 kΩ IDM PD Tj, Tstg Pulsed drain current Total dissipation Operating junction and storage temperature range - 55 500 500 ± 30 5.9 3.7 24 125 150 V V V A A A W ˚C MIN. MAX. UNIT - 287 mJ - 10 mJ - 5.9 A Tmb = 25 ˚C; VGS = 10 V Tmb = 100 ˚C; VGS = 10 V Tmb = 25 ˚C Tmb = 25 ˚C AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS EAR IAS, IAR CONDITIONS Non-repetitive avalanche energy Unclamped inductive load, IAS = 4.2 A; tp = 0.21 ms; Tj prior to avalanche = 25˚C; VDD ≤ 50 V; RGS = 50 Ω; VGS = 10 V; refer to fig:17 Repetitive avalanche energy1 IAR = 5.9 A; tp = 2.5 µs; Tj prior to avalanche = 25˚C; RGS = 50 Ω; VGS = 10 V; refer to fig:18 Repetitive and non-repetitive avalanche current 1 pulse width and repetition rate limited by Tj max. March 1999 1 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Avalanche energy rated IRF830 THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. in free air TYP. MAX. UNIT - - 1 K/W - 60 - K/W ELECTRICAL CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. Drain-source breakdown voltage ∆V(BR)DSS / Drain-source breakdown ∆Tj voltage temperature coefficient RDS(ON) Drain-source on resistance VGS(TO) Gate threshold voltage gfs Forward transconductance IDSS Drain-source leakage current VGS = 0 V; ID = 0.25 mA 500 - - V VDS = VGS; ID = 0.25 mA - 0.1 - %/K 2.0 2 - 1.2 3.0 3.6 1 30 10 1.5 4.0 25 250 200 Ω V S µA µA nA V(BR)DSS TYP. MAX. UNIT IGSS VGS = 10 V; ID = 3 A VDS = VGS; ID = 0.25 mA VDS = 30 V; ID = 3 A VDS = 500 V; VGS = 0 V VDS = 400 V; VGS = 0 V; Tj = 125 ˚C Gate-source leakage current VGS = ±30 V; VDS = 0 V Qg(tot) Qgs Qgd Total gate charge Gate-source charge Gate-drain (Miller) charge ID = 6 A; VDD = 400 V; VGS = 10 V - 53 4 28 64 6 34 nC nC nC td(on) tr td(off) tf Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time VDD = 250 V; RD = 39 Ω; RG = 12 Ω - 10 33 92 40 - ns ns ns ns Ld Ld Ls Internal drain inductance Internal drain inductance Internal source inductance Measured from tab to centre of die Measured from drain lead to centre of die Measured from source lead to source bond pad - 3.5 4.5 7.5 - nH nH nH Ciss Coss Crss Input capacitance Output capacitance Feedback capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 610 96 54 - pF pF pF SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS IS Tmb = 25˚C - - 5.9 A Tmb = 25˚C - - 24 A VSD Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage IS = 6 A; VGS = 0 V - - 1.2 V trr Qrr Reverse recovery time Reverse recovery charge IS = 6 A; VGS = 0 V; dI/dt = 100 A/µs - 390 4 - ns µC ISM March 1999 MIN. 2 TYP. MAX. UNIT Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Avalanche energy rated Normalised Power Derating PD% 120 IRF830 1 110 100 90 Zth j-mb, Transient thermal impedance (K/W) D = 0.5 PHP3N60 0.2 0.1 0.1 0.05 80 70 0.02 60 50 40 0.01 single pulse 30 PD tp 20 10 D= tp T t T 0 0 20 40 60 80 100 Tmb / C 120 0.001 1us 140 Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) 120 1ms 100us 10ms tp, pulse width (s) 1s 100ms Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T Normalised Current Derating ID% 10us 15 110 PHP4N50 ID, Drain current (Amps) Tj = 25 C 7V 100 90 10 V 6.5 V 80 10 6V 70 60 50 5.5 V 40 5 5V 30 20 10 VGS = 4.5 V 0 0 20 40 60 80 Tmb / C 100 120 0 140 Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 10 V 100 5 10 15 20 VDS, Drain-Source voltage (Volts) 25 30 Fig.5. Typical output characteristics. ID = f(VDS); parameter VGS PHP4N50 ID, Drain current (Amps) 0 RDS(on), Drain-Source on resistance (Ohms) 4 4.5 V 5V PHP4N50 Tj = 25 C 5.5 V VGS = 6 V ID S/ )= VD 3 tp = 10 us N (O 10 6.5 V S RD 7V 2 100 us 1 ms 1 DC 0.1 10 1 10 ms 100 1000 VDS, Drain-source voltage (Volts) 0 10000 Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp March 1999 10 V 0 5 10 ID, Drain current (Amps) 15 Fig.6. Typical on-state resistance. RDS(ON) = f(ID); parameter VGS 3 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Avalanche energy rated IRF830 VGS(TO) / V PHP4N50 ID, Drain current (Amps) 15 VDS > ID x RDS(on)max max. 4 typ. 3 10 min. 2 5 1 Tj = 25 C Tj = 150 C 0 0 0 2 4 6 VGS, Gate-Source voltage (Volts) 8 -60 10 gfs, Transconductance (S) -20 0 20 40 60 Tj / C 80 100 120 140 Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS Fig.7. Typical transfer characteristics. ID = f(VGS); parameter Tj 6 -40 PHP4N50 1E-01 SUB-THRESHOLD CONDUCTION ID / A VDS > ID x RDS(on)max 5 1E-02 Tj = 25 C 150 C 4 2% 1E-03 typ 98 % 3 1E-04 2 1E-05 1 0 1E-06 0 5 ID, Drain current (A) 10 0 15 Fig.8. Typical transconductance. gfs = f(ID); parameter Tj 2 VGS / V 3 4 Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS Normalised RDS(ON) = f(Tj) a 1 1000 PHP4N50 Junction capacitances (pF) Ciss 2 100 1 Coss Crss 0 -60 -40 -20 0 20 40 60 Tj / C 80 10 100 120 140 Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 3 A; VGS = 10 V March 1999 1 10 100 VDS, Drain-Source voltage (Volts) 1000 Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 4 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Avalanche energy rated 15 IRF830 PHP4N50 VGS, Gate-Source voltage (Volts) 20 IF, Source-Drain diode current (Amps) PHP4N50 VGS = 0 V ID = 6 A Tj = 25 C 250 V 15 100 V 10 VDD = 400 V 10 Tj = 25 C 150 C 5 5 0 0 10 20 30 40 50 Qg, Gate charge (nC) 60 70 0 80 0.2 0.4 0.6 0.8 1 VSDS, Source-Drain voltage (Volts) 1.2 1.4 Fig.16. Source-Drain diode characteristic. IF = f(VSDS); parameter Tj Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); parameter VDS 1000 0 PHP4N50 Switching times (ns) VDD = 250 V VGS = 10 V RD = 39 Ohms Tj = 25 C Non-repetitive Avalanche current, IAS (A) 10 25 C 100 td(off) tf Tj prior to avalanche = 125 C 1 tr VDS td(on) 10 tp ID 1 0.1 1E-06 0 10 20 30 40 RG, Gate resistance (Ohms) 50 1E-05 60 1E-04 1E-03 1E-02 Avalanche time, tp (s) Fig.14. Typical switching times; td(on), tr, td(off), tf = f(RG) 1.15 PHP6N50E Fig.17. Maximum permissible non-repetitive avalanche current (IAS) versus avalanche time (tp); unclamped inductive load Normalised Drain-source breakdown voltage V(BR)DSS @ Tj V(BR)DSS @ 25 C 10 1.1 Maximum Repetitive Avalanche Current, IAR (A) Tj prior to avalanche = 25 C 1.05 1 125 C 1 0.1 0.95 0.9 0.85 -100 PHP6N50E 0.01 1E-06 -50 0 50 Tj, Junction temperature (C) 100 150 1E-04 1E-03 1E-02 Avalanche time, tp (s) Fig.15. Normalised drain-source breakdown voltage; V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj) March 1999 1E-05 Fig.18. Maximum permissible repetitive avalanche current (IAR) versus avalanche time (tp) 5 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Avalanche energy rated IRF830 MECHANICAL DATA Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220 E SOT78 A A1 P q D1 D L1 L2(1) Q b1 L 1 2 e e 3 c b 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) (1) UNIT A A1 b b1 c D D1 E mm 4.5 4.1 1.39 1.27 0.9 0.7 1.3 1.0 0.7 0.4 15.8 15.2 6.4 5.9 10.3 9.7 e L L1 2.54 15.0 13.5 3.30 2.79 L2 max. P q Q 3.0 3.8 3.6 3.0 2.7 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 97-06-11 TO-220 Fig.19. SOT78 (TO220AB); pin 2 connected to mounting base (Net mass:2g) Notes 1. This product is supplied in anti-static packaging. The gate-source input must be protected against static discharge during transport or handling. 2. Refer to mounting instructions for SOT78 (TO220AB) package. 3. Epoxy meets UL94 V0 at 1/8". March 1999 6 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Avalanche energy rated IRF830 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. March 1999 7 Rev 1.000