PERICOM PI90LV048ALE

PI90LV048A/PI90LVT048A
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3V LVDS Quad Flow-Through
Differential Line Receivers
Features
Description
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The PI90LV048A/PI90LVT048A quad flow-through differential line
receivers are designed for applications requiring ultra low-power
dissipation and high data rates. The device is designed to support
data rates in excess of 500 Mbps (250 MHz) using Low Voltage
Differential Signaling (LVDS) technology.
500 Mbps (250 MHz) switching rates
Flow-through pinout simplifies PCB layout
150ps channel-to-channel skew (typical)
100ps differential skew (typical)
2.7ns maximum propagation delay
3.3V power supply design
High impedance LVDS inputs on power down
Low Power design (40mW, 3.3V static)
Wide common-mode input voltage range: 0.2V to 2.7V
Accepts small swing (350mV typical) differential signal levels
Supports open, short and terminated input fail-safe
Low-power state when in fail-safe
Conforms to ANSI/TIA/EIA-644 Standard
Industrial temperature operating range (–40°C to +85°C)
Packaging (Pb-free & Green available):
- 16-pin SOIC (W)
- 16-pin TSSOP (L)
The devices accept low-voltage (350 mV typical) differential input
signals and translates them to 3V CMOS output levels. The receiver
supports a 3-state function, which may be used to multiplex outputs,
and also supports open, shorted and terminated (100-ohms) input failsafe. The receiver output will be HIGH for all fail-safe conditions.
PI90LVT048A features integrated parallel termination resistors
(nominally 110-ohms) that eliminate the requirement for four discrete termination resistors and reduce stud length. PI90LV048A
inputs are high impedance and require an external termination
resistor when used in a point-to-point connection. The devices
have a flow-through pinout for easy PCB layout.
The EN and EN inputs are ANDed together and control the 3-state
outputs. The enables are common to all four receivers. The
PI90LV048A and companion LVDS line driver (eg. PI90LV047A)
provide a new alternative to high-power PECL/ECL devices for
high-speed point-to-point interface applications.
Block Diagram
4 Places
PI90LVT048A
Only
RIN1+
100Ω
R1
ROUT1
R2
ROUT2
RIN1–
Pin Configuration
RIN2+
RIN2–
RIN3+
ROUT3
R3
RIN3–
RIN4+
ROUT4
R4
RIN4–
EN
EN
RIN1–
1
16
EN
RIN1+
2
15
ROUT1
RIN2+
3
14
ROUT2
RIN2–
4
13
VCC
RIN3–
5
12
GND
RIN3+
6
11
ROUT3
RIN4+
7
10
ROUT4
RIN4–
8
9
EN
Truth Table
Enable s
EN
H
Inputs
Outputs
RIN+ – RIN–
ROUT
VID ≥ 0.1V
H
VID ≤ –0.1V
L
Full fail- safe OPEN/SHORT or terminated
H
X
Z
EN
L or Open
All other combinations of ENABLE inputs
1
PS8608A
10/04/04
PI90LV048A/PI90LVT048A
3V LVDS Quad Flow-Through
Differential Line Receivers
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Absolute Maximum Ratings
Supply Voltage (VCC) .............................................. –0.3V to +4V
Input Voltage (RIN+ – RIN–) ................................. –0.3V to 3.9V)
Enable Input Voltage (EN, EN) .................. –0.3V to (VCC + 0.3V)
Output Voltage (ROUT) ............................. –0.3V to (VCC + 0.3V)
Maximum Package Power Dissipation: +25°C
M Package ................................................................. 1088 mW
MTC Package ............................................................... 866 mW
Derate M Package .............................. 8.5 mW/°C above +25°C
Derate MTC Package ........................ 6.9 mW/°C above +25°C
Storage Temperature Range .............................. –65°C to +150°C
Lead Temperature Range
Soldering (4 seconds) ................................................... +260°C
Maximum Junction Temperature ...................................... +150°C
ESD Rating(10)
(HBM, 1.5kW, 100pF) ...................................................... ≥10kV
(EIAJ, 0W, 200pF) ......................................................... ≥1200V
Recommended Operating Conditions
Min Typ
Supply Voltage (VCC)
+3.0 +3.3
Receiver Input Voltage
GND
Operating Free Air Temperature (TA) –40 +25
Max Units
+3.6
V
+3.0
V
+85
°C
Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified(2, 3).
Symbol
Parame te r
VTH
Differential input high treshold
VTL
Differential input lowtreshold
VCMR
Common- mode voltage range
Te s t Conditions
VID = 200mV peak- to- peak(5 )
Input Current
VO L
Output High Voltage
Output low voltage
2.6
±1
+10
–20
±1
+20
IO H = –0.4mA, VID = +200mV
2.7
3.3
IO H = –0.4mA, Input terminated
2.7
3.3
IO H = –0.4mA, Input shorted
2.7
3.3
VC C = 0V
IO L = 2mA, VID = –200mV
RO U T
0V(11 )
IO Z
Output 3- State current
Disabled, VO U T = 0V or VC C
VIH
Input high voltage
VIL
Input low voltage
Input current
VIN = 0V or VC C , Other Input = VC C or GND
VC L
Input clamp voltage
IC L = –18mA
IC C
No load supply current
Receivers enabled
EN= VCC, One Differential Input = VCC
other Differential Input = GND
No load supply current
Receivers disabled
EN= GND, One Differential Input = VCC
other Differential Input = GND
Termination input resistance
(PI90LVT048A)
VIN = VC C or 0
CW
0.1
–10
VIN = 0V
Enabled, VO U T =
RTER M
RIN + ,
RIN –
+10
Output short circuit current
IC C Z
–100
±5
VC C = 3.6V or 0V
IO S
II
Typ. M ax. Units
–10
VIN = +3.6V
VO H
M in.
+100
VC M = +1.2V, 0.05V, 2.95V(1 3 )
VIN = +2.8V
IIN
Pin
EN,
EN
2
V
µA
V
0.05
0.25
–15
–47
–100
mA
–10
±1
+10
µA
2.0
VC C
GND
0.8
–20
±5
–1.5
–0.8
9
+20
V
µA
V
15
VC C
mA
90
Input capacitance
mV
1
5
110
132
Ω
5
10
pF
PS8608A
10/04/04
PI90LV048A/PI90LVT048A
3V LVDS Quad Flow-Through
Differential Line Receivers
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Switching Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified.(2,3)
Symbol
Parame te r
Conditions
tP HLD
Differential Propagation Delay High to Low
tP LHD
Differential Propagation Delay Low to High
tS K D1
Differential Pulse Skew, tPHLD – tPLHD
tS K D2
Channel- to- Channel Skew(7)
( 6 )
CL = 15pF
VID = 200mV
(Figures 1 & 2)
M in.
Typ.
M ax.
1.2
2.0
3.2
1. 2
1. 9
3.2
0
0.1
0.4
0
0.15
0.5
tS K D3
Differential Part- to- Part
Skew(8)
1. 0
tS K D4
Differential Part- to- Part Skew(9)
1. 5
tTLH
Rise Time
0.5
1. 0
tTHL
Fall Time
0.35
1.0
tP HZ
Disable Time High to Z
8
14
tP LZ
Disable Time Low to Z
8
15
tP ZH
Enable Time Z to High
9
14
tP ZL
Enable Time Z to Low
9
14
fM AX
Maximum Operating
Frequency(14)
RL = 2 kohms,
CL = 15pF
(Figures 3 & 4)
All Channels switching
250
Units
ns
MHz
Notes
1.
“Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
2.
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are
referenced to ground unless otherwise specified.
3.
All typicals are given for: VCC = +3.3V, TA = +25°C.
4.
Generator waveform for all tests unless otherwise specified: f =1 MHz, ZO =50 ohms, tr and tf (0% to 100%) ≤ 3ns for RIN.
5.
The VCMR range is reduced for larger VID. Example: if VID = 400mV, the VCMR is 0.2V to 2.2V. The fail-safe condition with inputs
shorted is not supported over the common-mode range of 0V to 2.4V, but is supported only with inputs shorted and no external commonmode voltage applied. A VID up to VCC – 0V may be applied to the RIN+ /RIN– inputs with the Common-Mode voltage set to VCC/2.
Propagation delay and Differential Pulse skew decrease when VID is increased from 200mV to 400mV.
Skew specifications apply for 200mV ≤VID ≤800mV over the common-mode range .
6.
tSKD1 is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the
same channel
7.
tSKD2, Channel-to-Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the
same chip with any event on the inputs.
8.
tSKD3, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification
applies to devices at the same VCC, and within 5°C of each other within the operating temperature range.
9.
tSKD4, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies
to devices over recommended operating temperature and voltage ranges, and across process distribution. tSKD4 is defined as |Max–Min|
differential propagation delay.
10. ESD Ratings: HBM (1.5 kohms, 100pF) ≥10kV
EIAJ (0 ohm, 200pF) ≥1200V
11. Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at
a time, do not exceed maximum junction temperature specification.
12. CL includes probe and jig capacitance.
13. VCC is always higher than RIN+ and RIN– voltage. RIN– and RIN+ are allowed to have a voltage range –0.2V to VCC – V ID/2. However, to be
compliant with AC specifications, the common voltage range is 0.1V to 2.3V
14 f MAX generator input conditions: t r = t f <1ns (0% to 100%), 50% duty cycle, differential (1.05V to 1.35V peak to peak).
Output criteria: 60/40% duty cycle, VOL (max 0.4V), VOH (min 2.7V), Load = 15pF (stray plus probes).
3
PS8608A
10/04/04
PI90LV048A/PI90LVT048A
3V LVDS Quad Flow-Through
Differential Line Receivers
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Parameter Measurement Information
RIN+
Generator
RIN–
ROUT
R
CL
50Ω
50Ω
Receiver Enabled
Figure 1. Receiver Propagation Delay and Transition Time Test Circuit
RIN–
+1.3V
0V Differential
VID = 200mV
1.2V
RIN+
+1.1V
tPLHD
tPHLD
80%
ROUT
VOH
80%
1.5V
1.5V
VDIFF = DOUT+ – DOUT–
20%
20%
VOL
tTLH
tTHL
Figure 2. DriverPropagation Delay & Transition Time Waveforms
S1
VCC
RL
RIN+
RIN–
EN
Generator
Device
Under
Test
CL
EN
50Ω
ROUT
1/4 PI90LV048A
CL includes load and test jig capacitance.
S1 = VCC for tPZL and tPLZ measurements.
S1 = GND for tPZH and tPHZ measurements.
Figure 3. Receiver 3-State Delay Test Circuit
4
PS8608A
10/04/04
PI90LV048A/PI90LVT048A
3V LVDS Quad Flow-Through
Differential Line Receivers
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Parameter Measurement Information (continued)
EN When EN = GND or OPEN
3V
1.5V
1.5V
0V
3V
1.5V
1.5V
0V
EN When EN = VCC
tPZL
tPLZ
VCC
50%
0.5V
Output When VID = –100mV
VOL
tPHZ
tPZH
Output When VID = +100mV
VOH
0.5V
50%
GND
Figure 4. Receiver 3-State Delay Waveforms
Typical Application
Enable
1/4 PI90LV048A
+
Data Input
RT
100Ω
–
Data
Output
1/4 PI90LV047A
Figure 5. Point-to-Point Application
5
PS8608A
10/04/04
PI90LV048A/PI90LVT048A
3V LVDS Quad Flow-Through
Differential Line Receivers
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Packaging Mechanical: 16-Pin SOIC (W)
16
.149
.157
3.78
3.99
.0099
.0196
0.25
x 45˚
0.50
1
.0075
.0098
0-8˚
.386
.393
9.80
10.00
0.41
1.27
.053
.068
.0155
.0260
0.393
0.660
REF
1.35
1.75
.016
.050
.2284
.2440
5.80
6.20
SEATING PLANE
.050
BSC
1.27
0.19
0.25
.0040 0.10
.0098 0.25
.013
.020
0.330
0.508
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
Packaging Mechanical: 16-Pin TSSOP (L)
16
.169
.177
4.3
4.5
1
.193
.201
4.9
5.1
.004
.008
.047
max.
1.20
0.45 .018
0.75 .030
SEATING
PLANE
.0256
BSC
0.65
.007
.012
.002
.006
0.09
0.20
.252
BSC
6.4
0.05
0.15
X.XX DENOTES CONTROLLING
X.XX DIMENSIONS IN MILLIMETERS
0.19
0.30
6
PS8608A
10/04/04
PI90LV048A/PI90LVT048A
3V LVDS Quad Flow-Through
Differential Line Receivers
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Ordering Information
Ordering Code
PI90LV048AW
PI90LV048AWE
PI90LV048AL
PI90LV048ALE
PI90LVT048AW
PI90LVT048AWE
PI90LVT048AL
PI90LVT048ALE
Package Code
W
W
L
L
W
W
L
L
Package Type
16-pin SOIC
Pb-free & Green, 16-pin SOIC
16-pin TSSOP
Pb-free & Green, 16-pin TSSOP
16-pin SOIC
Pb-free & Green, 16-pin SOIC
16-pin TSSOP
Pb-free & Green, 16-pin TSSOP
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. X = Tape and reel
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
7
PS8608A
10/04/04