Preliminary for proposal PLL502-01 Low Phase Noise VCXO (24MHz to 50MHz) FEATURES • • • • • Low phase noise VCXO output for the 24MHz to 50MHz range (-130 dBc at 10kHz offset). CMOS output. 12 to 25MHz crystal input. Integrated variable capacitors. Selectable High Drive (36mA drive capability at TTL level) or Standard Drive (12mA drive capability at TTL) output. Wide pull range (+/- 250 ppm). Low jitter (RMS): 10ps period. 3.3V operation. Available in 8-Pin TSSOP or SOIC. DESCRIPTIONS The PLL502-01 is a low cost, high performance and low phase noise VCXO, providing less than -130dBc at 10kHz offset in the 24MHz to 50MHz operating range. The very low jitter (10 ps RMS period jitter) makes this chip ideal for applications requiring voltage controlled frequency sources. Input crystal can range from 12 to 25MHz (fundamental resonant mode). XOUT 1 N/C 2 VIN 3 GND 4 PLL502-01 • • • • PIN CONFIGURATION 8 XIN 7 OE 6 VDD 5 CLK OUTPUT RANGE MULTIPLIER FREQUENCY RANGE OUTPUT BUFFER x2 24 - 50MHz CMOS BLOCK DIAGRAM VCO Divider Reference Divider XIN XOUT Phase Comparator Charge Pump Loop Filter VCO CLK OE XTAL OSC VARICAP VIN 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 4/01/02 Page 1 Preliminary for proposal PLL502-01 Low Phase Noise VCXO (24MHz to 50MHz) PIN DESCRIPTIONS Name Number Type Description XOUT 1 I Crystal output pin. N/C 2 - Not connected. VIN 3 I Frequency control voltage input pin. GND 4 P Ground pin. CLK 5 O Output clock pin. VDD 6 P +3.3V VDD power supply pin. OE 7 I Output enable input pin. Disables (tri-state) output when low. Internal pullup enables output by default if pin is not connected to low. XIN 8 I Crystal input pin. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS V CC - 0.5 7 V Input Voltage Range VI - 0.5 V CC + 0.5 V Output Voltage Range VO - 0.5 V CC + 0.5 V 260 °C -65 150 °C -40 85 °C Supply Voltage Range Soldering Temperature Storage Temperature TS Ambient Operating Temperature* Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 4/01/02 Page 2 Preliminary for proposal PLL502-01 Low Phase Noise VCXO (24MHz to 50MHz) 2. AC Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. Input Crystal Frequency TYP. 12 Output Clock Rise/Fall Time (Low Drive) 0.8V ~ 2.0V with 10 pF load 1.15 0.3V ~ 3.0V with 15 pF load 3.7 Output Clock Rise/Fall Time (High Drive) 0.8V ~ 2.0V with 10 pF load 0.5 0.3V ~ 3.0V with 15 pF load 1.5 Output Clock Duty Cycle Measured @ 1.4V 45 Short Circuit Current 50 MAX. UNITS 25 MHz ns 55 % mA ±50 3. Voltage Control Crystal Oscillator PARAMETERS VCXO Stabilization Time * VCXO Tuning Range CLK output pullability SYMBOL T VCXOSTB CONDITIONS MIN. From power valid TYP. 10 F XIN = 12 – 25MHz; XTAL C 0 /C 1 < 250 0V ≤ VIN ≤ 3.3V ms ppm ±250 ppm 165 Pull range linearity ppm/V 10 VCON pin input impedance UNITS 500 VCXO Tuning Characteristic VCON modulation BW MAX. % 2000 kΩ 25 kHz 0V ≤ VIN ≤ 3.3V, -3dB Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits. 4. Jitter and Phase Noise specification PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS 10 ps (1 sigma – 1000 samples) at 44MHz, with capacitive decoupling between VDD and GND. Phase Noise relative to carrier 44MHz @100Hz offset -80 dBc/Hz Phase Noise relative to carrier 44MHz @1kHz offset -110 dBc/Hz Phase Noise relative to carrier 44MHz @10kHz offset -130 dBc/Hz Phase Noise relative to carrier 44MHz @100kHz offset -123 dBc/Hz Phase Noise relative to carrier 44MHz @1MHz offset -124 dBc/Hz RMS Period Jitter 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 4/01/02 Page 3 Preliminary for proposal PLL502-01 Low Phase Noise VCXO (24MHz to 50MHz) 5. DC Specification PARAMETERS SYMBOL Supply Current, Dynamic, with Loaded Outputs I DD Operating Voltage V DD Output High Voltage V OH I OH = -12mA (low drive) Output Low Voltage V OL I LO = 12mA (low drive) Output High Voltage at CMOS level V OHC I OH = -4mA (low drive) Output drive current CONDITIONS MIN. F XIN = 12 - 25MHz Ouput load of 10pF UNITS 16 20 mA 3.47 V 2.4 V 0.4 V DD – 0.4 V V At TTL level (High drive) 36 51 mA At TTL level (Low drive) 12 17 mA ±50 mA VCON ESD Protection MAX. 3.13 Short Circuit Current VCXO Control Voltage TYP. 0 Human Body Model 3.3 V 3000 6. Crystal Specifications PARAMETERS Crystal Resonator Frequency Crystal Loading Capacitance Rating SYMBOL MIN. F XIN 12 C L (xtal) C0/C1 ESR TYP. MAX. UNITS 25 MHz 9.5 pF 250 - 30 Ω RS Note: Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal will be at nominal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This however may reduce the pull range. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 4/01/02 Page 4 Preliminary for proposal PLL502-01 Low Phase Noise VCXO (24MHz to 50MHz) PACKAGE INFORMATION 8 PIN ( dimensions in mm ) TSSOP Narrow SOIC Symbol Min. Max. Min. Max. A 1.47 1.73 - 1.20 A1 0.10 0.25 0.05 0.15 B 0.33 0.51 0.19 0.30 C 0.19 0.25 0.09 0.20 D 4.80 4.95 2.90 3.10 E 3.80 4.00 4.30 4.50 H 5.80 6.20 6.20 6.60 L 0.38 1.27 0.45 e H D A 0.75 0.65 BSC 1.27 BSC E A1 C L B e ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL502-01 X C PART NUMBER TEMPERATURATURE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE S=SOIC, O=TSSOP PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 4/01/02 Page 5