PTV05020W www.ti.com SLTS232 – JANUARY 2005 18-A, 5-V INPUT NONISOLATED WIDE-OUTPUT ADJUST SIP MODULE FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • • Up to 18-A Output Current 5-V Input Bus Wide-Output Voltage Adjust (0.8 V to 3.6 V) Efficiencies up to 96% On/Off Inhibit Output Voltage Sense Prebias Start-Up Undervoltage Lockout Auto-Track™ Sequencing Output Overcurrent Protection (Nonlatching, Auto-Reset) Overtemperature Protection Operating Temperature: –40°C to 85°C Safety Agency Approvals: UL/cUL 60950, EN60950 VDE (Pending) POLA™ Compatible Multivoltage Digital Systems High-Density Logic Circuits High-End Computers and Servers 5-V Intermediate Bus Architectures DESCRIPTION The PTV05020W is a ready-to-use nonisolated power module, and part of a new class of complete dc/dc switching regulators from Texas Instruments. These regulators combine high performance with double-sided, surface-mount construction, to give designers the flexibility to power the most complex multiprocessor digital systems using off-the-shelf catalog parts. The PTV05020W series is produced in a 12-pin, single in-line pin (SIP) package. The SIP footprint minimizes board space, and offers an alternate package option for space conscious applications. Operating from a 5-V input bus, the series provides step-down conversion to a wide range of output voltages, at up to 18 A of output current. The output voltage can be set to any value over the range, 0.8 V to 3.6 V. The output voltage is set using a single external resistor. This series includes Auto-Track™. Auto-Track™ simplifies the task of supply-voltage sequencing in a power system by enabling the output voltage of multiple modules to accurately track each other, or any external voltage, during power up and power down. Other operating features include an on/off inhibit, and the ability to start up into an existing output voltage or prebias. For improved load regulation, an output voltage sense is provided. A nonlatching overcurrent trip and overtemperature shutdown protects against load faults. Target applications include complex multivoltage, multiprocessor systems that incorporate the industry's high-speed DSPs, microprocessors, and bus drivers. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. POLA, Auto-Track are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005, Texas Instruments Incorporated PTV05020W www.ti.com SLTS232 – JANUARY 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. STANDARD APPLICATION VOSense Track 9 Track VI 5, 6 PTV05020W VI Inhibit GND 12 C1* 680 mF (Required) Inhibit 7 Sense GND 10, 11 VO VO 3, 4 VOAdj 1, 2 8 C2* 22 mF Ceramic (Required) RSET# 1% 0.05 W (Required) C3* 330 mF (Optional) L O A D GND GND * See the Application Information section for capacitor recommendations. #R SET ORDERING INFORMATION PTV05020 (Basic Model) (1) Output Voltage Part Number DESCRIPTION Package (1) 0.8 V – 3.6 V (Adjustable) PTV05020WAH Vertical T/H EVC See the applicable package drawing for dimensions and PC board layout. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) UNIT V(Track) Track input voltage –0.3 V to VI +0.3 V TA Operating temperature range Over VI range Lead temperature 5 seconds –40°C to 85°C 260°C (2) Tstg Storage temperature –40°C to 125°C V(INH) Inhibit input voltage –0.3 V to 7 V (1) (2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. This product is not compatible with surface-mount reflow solder processes. PACKAGE SPECIFICATIONS PTV05020W (Suffix AH) Weight 5.5 grams Flammability Meets UL 94 V-O Mechanical shock Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 sine, mounted 500 Gs Mechanical vibration Mil-STD-883D, Method 2007.2, 20 Hz - 2000 Hz 10 Gs (1) 2 Qualification limit. (1) (1) PTV05020W www.ti.com SLTS232 – JANUARY 2005 ELECTRICAL CHARACTERISTICS operating at 25°C free-air temperature, VI = 5 V, VO = 3.3 V, C1 = 680 µF, C2 = 22 µF, C3 = 0 µF, and I O = IO max (unless otherwise noted) PARAMETER TEST CONDITIONS IO Output current Natural convection airflow VI Input voltage range Over IO load range MIN TYP 0 η 4.5 IO (trip) A 5.5 V ±2% –40°C < TA < 85°C Line regulation Over VI range ±5 Load regulation Over IO range ±5 Total output variation Includes set-point, line, load, –40°C ≤ TA≤ 85°C Adjust range Over VI range IO = IO max (2) ±0.5% Temperature variation Efficiency UNIT (1) 18 Set-point voltage tolerance VO MAX mV mV ±3 0.8 (2) 3.6 RSET = 698 Ω, VO = 3.3 V 94% RSET = 2.21 kΩ, VO = 2.5 V 93% RSET = 5.49 kΩ, VO = 1.8 V 90% RSET = 8.87 kΩ, VO = 1.5 V 89% RSET = 17.4 kΩ, VO = 1.2 V 87% RSET = 36.5 kΩ, VO = 1 V 85% %Vo V Output voltage ripple (pk-pk) 20-MHz bandwidth 20 mVPP Overcurrent threshold Reset, followed by auto-recovery 35 A 1-A/µs load step, 50 to 100% IO max, C3 = 330 µF Transient response Track control (pin 9) UVLO Undervoltage lockout 70 µs 120 mV IIL Input low current Pin to GND Control slew-rate limit C3 ≤ C3 (max) –0.13 4.3 VI decreasing VIL Input low voltage IIL Input low current 3.1 Inhibit (pin 12) to GND, Track (pin 9) open ƒS Switching frequency Over VI and IO ranges Nonceramic (C1) Ceramic (C2) Capacitance value (1) (2) (3) (4) (5) (6) (7) Reliability 680 (4) 22 (4) Nonceramic 0 Ceramic 0 Per Telcordia SR-332, 50% stress, TA = 40°C, ground benign 4 300 V V mA 10 Equivalent series resistance (nonceramic) MTBF 0.6 250 mA V/ms (3) –0.24 Input standby current External input capacitance Open –0.2 Pin to GND 4.5 3.7 VI – 0.5 Referenced to GND II (stby) External output capacitance (C3) 1 VI increasing VIH Input high voltage Inhibit control (pin 12) Recovery time Vo over/undershoot mA 340 kHz µF 330 (5) 11,000 (6) 300 (7) µF mΩ 5 106 Hrs See thermal derating curves for safe operating area (SOA), or consult factory for appropriate derating. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1%, with 100 ppm/°C or better temperature stability. This control pin is pulled up to the input voltage, VI. If this input is left open circuit, the module will operate when input power is applied. A small low-leakage (< 100 nA) MOSFET is recommended for control. For further information, consult the related application note. A 22-µF high-frequency ceramic capacitor and 680-µF electrolytic input capacitor are required for proper operation. The electrolytic capacitor must be rated for 750 mArms minimum ripple current. Consult the Application Information for further guidance on capacitor selection. An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load improves the transient response. This is the calculated maximum. The minimum ESR limitation often results in a lower value. Consult the Application Information for further guidance. This is the typical ESR for all the electrolytic (nonceramic) output capacitance. Use 7 mΩ as the minimum when using max-ESR values to calculate. 3 PTV05020W www.ti.com SLTS232 – JANUARY 2005 TYPICAL CHARACTERISTICS; VI = 5 V EFFICIENCY vs OUTPUT CURRENT OUTPUT VOLTAGE RIPPLE vs OUTPUT CURRENT 100 V O − Output Voltage Ripple − mV PP 100 Efficiency − % 90 VO = 3.3 V 80 VO = 1.8 V VO = 1.2 V 70 VO = 0.8 V 60 50 80 VO = 1.8 V 60 VO = 3.3 V 40 20 VO = 0.8 V 0 0 2 4 6 8 10 12 14 16 18 0 2 4 6 8 10 12 14 IO − Output Current − A 16 18 Figure 1. Figure 2. POWER DISSIPATION vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 6 90 5 80 VO = 1.8 V 4 3 2 VO = 3.3 V 1 Temperature Derating - oC PD − Power Dissipation − W IO − Output Current − A Airflow 70 400 LFM 60 200 LFM 100 LFM 50 Nat Conv 40 30 0 0 2 4 6 8 10 12 14 IO − Output Current − A Figure 3. 4 VO = 1.2 V 16 18 Airflow is parallel to the long axis of the module 20 0 2 4 6 8 10 12 14 IO - Output Current - A Figure 4. 16 18 PTV05020W www.ti.com SLTS232 – JANUARY 2005 DEVICE INFORMATION TERMINAL FUNCTIONS TERMINAL DESCRIPTION NAME NO. VI 5, 6 The positive input voltage power node to the module, which is referenced to common GND. VO 3, 4 The regulated positive power output with respect to the GND node. GND 1, 2, 10, 11 This is the common ground connection for the VI and VO power connections. It is also the 0-Vdc reference for the control inputs. Inhibit 12 The Inhibit pin is an open-collector/drain, active-low input that is referenced to GND. Applying a low-level ground signal to this input disables the module's output and turns off the output voltage. When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the inhibit feature is not used, the control pin should be left open-circuit. The module then produces an output voltage whenever a valid input source is applied. Vo Adjust 8 A 1% resistor must be connected directly between this pin and GND (pin 1 or 2) to set the output voltage of the module higher than its lowest value. The temperature stability of the resistor should be 100 ppm/°C (or better). The set-point range is 0.8 V to 3.6 V. The resistor value can be calculated using a formula. If this input is left open-circuit, the output voltage defaults to its lowest value. For further information, consult the related application note. The specification table gives the standard resistor values for a number of common output voltages. Vo Sense Track 7 9 The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For optimal voltage accuracy Vo Sense should be connected to VO. It can also be left disconnected. This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from 0 V up to the nominal set-point voltage. Within this range, the output follows the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its set-point voltage. The feature allows the output voltage to rise simultaneously with other modules powered from the same input bus. If unused, this input should be connected to VI. NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage during power up. Consult the related Application Information for further guidance. Front View of Module PIN 1 PIN 5 PIN 12 Figure 5. Pin Terminal Locations 5 PTV05020W www.ti.com SLTS232 – JANUARY 2005 APPLICATION INFORMATION Capacitor Recommendations for the PTV05020W Power Module Input Capacitors The required input capacitors are a 22-µF ceramic and a minimum of 680-µF electrolytic type. For V O > 1 V and IO > 11 A , the 680-µF capacitance must be rated for 750 mArms ripple current capability. For other conditions, VO > 1 V at IO < 11 A load, the ripple current rating must be at least 500 mArms. Where applicable, Table 1 gives the maximum output voltage and current limits for a capacitor's rms ripple current rating. The above ripple current requirements are conditional that the 22-µF ceramic capacitor is present. The 22-µF X5R/X7R ceramic capacitor is necessary to reduce both the magnitude of ripple current through the electroytic capacitor and the amount of ripple current reflected back to the input source. Ceramic capacitors should be located within 0.5 inch. (1,3 cm) of the module's input pins. Additional ceramic capacitors can be added to reduce the RMS ripple current requirement for the electrolytic capacitor. Ripple current (Arms) rating, less than 100-mΩ equivalent series resistance (ESR), and temperature are the major considerations when selecting input capacitors. Unlike polymer-tantalum capacitors, regular tantalum capacitors have a recommended minimum voltage rating of 2 × (max. dc voltage + ac ripple). This is standard practice to ensure reliability. Only a few tantalum capacitors were found to have sufficient voltage rating to meet this requirement. At temperatures below 0°C, the ESR of aluminum electrolytic capacitors increases. For these applications, Os-Con, polymer-tantalum, and polymer-aluminum types should be considered. Output Capacitor (Optional) For applications with load transients (sudden changes in load current), regulator response benefits from external output capacitance. The recommended output capacitance of 330 µF allows the module to meet its transient response specification. For most applications, a high-quality computer-grade aluminum electrolytic capacitor is adequate. These capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable when ambient temperatures are above 0°C. For operation below 0°C, tantalum, ceramic, or Os-Con type capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than 4 mΩ (7 mΩ using the manufacturer's maximum ESR for a single capacitor). A list of preferred low-ESR type capacitors are identified in Table 1. Ceramic Capacitors Above 150 kHz, the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic capacitors have low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be used to reduce the reflected ripple current at the input as well as improve the transient response of the output. When used on the output, their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed approximately 300 µF. Also, to prevent the formation of local resonances, do not place more than five identical ceramic capacitors in parallel with values of 10 µF or greater. Tantalum Capacitors Tantalum-type capacitors can only be used on the output bus, and are recommended for applications where the ambient operating temperature can be less than 0°C. The AVX TPS, Sprague 593D/594/595 and Kemet T495/T510 capacitor series are suggested over many other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have considerably higher ESR, reduced power dissipation, and lower ripple current capability. These capacitors are also less reliable as they have reduced power dissipation and surge current ratings. Tantalum capacitors that have no stated ESR or surge current rating are not recommended for power applications. When specifying Os-con and polymer tantalum capacitors for the output, the minimum ESR limit is encountered before the maximum capacitance value is reached. Capacitor Table Table 1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type. 6 PTV05020W www.ti.com SLTS232 – JANUARY 2005 APPLICATION INFORMATION (continued) Note: This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical parameters necessary to ensure both optimum regulator performance and long capacitor life. Designing for Fast Load Transients The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 1 A/µs. The typical voltage deviation for this load transient is given in the data sheet specification table using the optional value of output capacitance. As the di/dt of a transient is increased, the response of a converter regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitor decoupling. In these cases special attention must be paid to the type, value and ESR of the capacitors selected. If the transient performance requirements exceed that specified in the data sheet, or the total amount of load capacitance is above 3000 µF, the selection of output capacitors becomes more important. Table 1. Input/Output Capacitors Capacitor Characteristics Quantity Max Ripple Current at 85°C (Irms) (mA) Physical Size (mm) Input Bus Optional Output Bus 0.090 775 10 × 12.5 1 1 EEUFC1E681 0.015 5100 10 × 10.2 1 1 EEFWA0J681P 680 0.080 850 10 × 10.2 1 1 EEVFK1C681P 6.3 680 0.007 5860 10 × 11.5 1 ≤1 10 680 0.09 760 10 × 12.5 1 1 PS, Poly-Aluminum (Radial) 6.3 680 0.010 5500 10 × 12.5 1 ≤2 6PS680MJ12 PXA, Poly-Aluminum (SMD) 6.3 680 0.010 5500 10 × 12.2 1 ≤2 PXA6.3VC681MJ12TP Nichicon, Aluminum 10 680 0.090 1060 12.5 × 15 1 1 UPM1A681MHH6 HD (Radial) 10 680 0.053 1030 10 × 12.5 1 1 UHD1A681MHR WA (SMD) 16 330 0.022 4100 10 × 10.2 2 ≤3 EEFWA1C331P S/SE (SMD)Poly-Tanalum 6.3 180 0.005 4000 7.3 × 154.3 × 4.2 N/R ≤1 EEFSE0J181R TP, Poscap 10 330 0.025 3000 7.3 L × 4.3 W 2 ≤4 10TPE330M SP, Os-Con 6.3 680 0.013 >4800 10 × 10.5 1 ≤2 6SP680M SVP, Os-Con (SMD) 6.3 820 0.012 5400 11 × 12.7 1 ≤2 6SVP820M AVX, Tantalum, Series III 10 330 0.060 >1723 2 ≤5 TPSV337M010R0060 TPS (SMD) 10 330 0.040 >2200 2 ≤5 TPSE337M010R0040 T520, Poly-Tant 10 330 0.040 1800 2 ≤5 T520X337M010AS T530, Poly-Tant/Organic 10 330 0.010 >3800 2 ≤1 T530X337M010ASE010 6.3 470 0.010 4200 2 ≤1 T530X477M006ASE010 6.3 820 0.014 5040 11 ×12 1 ≤2 94SVP827X06R3F12 595D, Tantalum (SMD) 10 680 0.090 1680 7.2 L × 6 W × 4.1 H 1 ≤5 595D687X0010R2T 94SA, Os-Con (Radial) 6.3 680 0.013 4840 10 × 10.5 1 ≤2 94SA687X06R3FBP Kemet, Ceramic X5R (SMD) 16 10 0.002 — 3225 ≥2 (3) ≤5 C1210C106M4PAC 6.3 22 0.002 3225 ≥1 (3) ≤5 C1210C226K9PAC Capacitor Vendor, Type/Series (Style) Working Voltage (V) Value (µF) Max ESR at 100 kHz (Ω) Panasonic, Aluminum 10 680 WA(SMD) 6.3 680 FK (SMD) 16 PSA,Poly- Aluminum (Radial) LXZ, Aluminum (Radial) Vendor Part Number United Chemi-Con PSA6.3VB680MJ11 LXZ10VB681M10X12LL Panasonic, Poly-Aluminum (1) (2) Sanyo 7.3L × 5.7 W × 4.1 H (1) Kemet (SMD) Vishay-Sprague 94SVP,(Oscon)(SMD) (1) (2) (3) 43 W × 7.3 L × 4 H Total capacitance of 660 µF is acceptable based on the combined ripple current rating. N/R – Not recommended. The voltage rating does not meet the minimum operating limits. Ceramic capacitors are required to complement electrolytic types at the input and to reduce high-frequency ripple current. 7 PTV05020W www.ti.com SLTS232 – JANUARY 2005 APPLICATION INFORMATION (continued) Table 1. Input/Output Capacitors (continued) Capacitor Characteristics Capacitor Vendor, Type/Series (Style) Murata, Ceramic X5R (SMD) TDK, Ceramic X5R (SMD) Working Voltage (V) Value (µF) Max ESR at 100 kHz (Ω) 6.3 47 0.002 6.3 100 0.002 6.3 Max Ripple Current at 85°C (Irms) (mA) Quantity Vendor Part Number Physical Size (mm) Input Bus Optional Output Bus 3225 ≥1 (3) ≤5 C1210C476K9PAC 3225 ≥1 (3) ≤3 GRM32ER60J107M 47 ≥1 (3) ≤5 GRM32ER60J476M 16 22 ≥1 (3) ≤5 GRM32ER61C226K 16 10 ≥2 (3) ≤5 GRM32DR61C106K 6.3 100 ≥1 (3) ≤3 C3225X5R0J107MT 6.3 47 ≥1 (3) ≤5 C3225X5R0J476MT 16 22 ≥1 (3) ≤5 C3225X5R1C226MT 16 10 ≥2 (3) ≤5 C3225X5R1C106MT 0.002 — — 3225 Adjusting the Output Voltage The VO Adjust control (pin 8) sets the output voltage of the PTV05020W product to a value over the range, 0.8 V to 3.6 V. The adjustment method requires the addition of a single external resistor, RSET, that must be connected directly between the VO Adjust and the regulator's output GND (pin 1 or 2). Without an adjust resistor, the output voltage is set to its lowest value. Table 2 gives the preferred value of the external resistor for a number of standard voltages, along with the actual output voltage that this resistance value provides. Figure 6 shows the placement of the required resistor. Table 2. Nearest Standard Values of RSET for Common Output Voltages VO (Required) RSET (Standard Value) VO (Actual) 3.3 V 698 Ω 3.309 V 2.5 V 2.21 kΩ 2.502 V 2V 4.12 kΩ 2.010 V 1.8 V 5.49 kΩ 1.803 V 1.5 V 8.87 kΩ 1.504 V 1.2 V 17.4 kΩ 1.202 V 1V 36.5 kΩ 1.005 V 0.8 V Open 0.800 V For other output voltages, the value of the required resistor can either be calculated or simply selected from the range of values given in Table 3. Equation 1 may be used for calculating the adjust resistor value. R set 10 k 8 0.8 V 2.49 k V out 0.8 V (1) PTV05020W www.ti.com SLTS232 – JANUARY 2005 VO Sense VO Sense VO Adj GND CO + GN D VO VO PTV05020W RSET, 1% GND Figure 6. VO Adjust Resistor Placement Table 3. Calculated Values of RSET for Other Output Voltages VO RSET VO RSET VO RSET 0.800 Open 1.450 9.82 kΩ 2.550 2.08 kΩ 0.825 318 kΩ 1.500 8.94 kΩ 2.600 1.95 kΩ 0.850 158 kΩ 1.550 8.18 kΩ 2.650 1.83 kΩ 0.875 104 kΩ 1.600 7.51 kΩ 2.700 1.72 kΩ 0.900 77.5 kΩ 1.650 6.92 kΩ 2.750 1.61 kΩ 0.925 61.5 kΩ 1.700 6.40 kΩ 2.800 1.51 kΩ 0.950 50.8 kΩ 1.750 5.93 kΩ 2.850 1.41 kΩ 0.975 43.2 kΩ 1.800 5.51 kΩ 2.900 1.32 kΩ 1.000 37.5 kΩ 1.850 5.13 kΩ 2.950 1.23 kΩ 1.025 33.1 kΩ 1.900 4.78 kΩ 3.000 1.15 kΩ 1.050 29.5 kΩ 1.950 4.47 kΩ 3.050 1.07 kΩ 1.075 26.6 kΩ 2.000 4.18 kΩ 3.100 998 Ω 1.100 24.2 kΩ 2.050 3.91 kΩ 3.150 914 Ω 1.125 22.1 kΩ 2.100 3.66 kΩ 3.200 843 Ω 1.150 20.4 kΩ 2.150 3.44 kΩ 3.250 775 Ω 1.175 18.8 kΩ 2.200 3.22 kΩ 3.300 710 Ω 1.200 17.5 kΩ 2.250 3.03 kΩ 3.350 647 Ω 1.225 16.3 kΩ 2.300 2.84 kΩ 3.400 587 Ω 1.250 15.3 kΩ 2.350 2.67 kΩ 3.450 529 Ω 1.300 13.5 kΩ 2.400 2.51 kΩ 3.500 473 Ω 1.350 12.1 kΩ 2.450 2.36 kΩ 3.550 419 Ω 1.400 10.8 kΩ 2.500 2.22 kΩ 3.600 367 Ω 9 PTV05020W www.ti.com SLTS232 – JANUARY 2005 Features of the PTH/PTV Family of Non-Isolated, Wide-Output Adjust Power Modules POLA™ Compatibility The PTH/PTV family of non-isolated, wide-output adjustable power modules from Texas Instruments are optimized for applications that require a flexible, high-performance module that is small in size. Each of these products are POLA™ compatible. POLA-compatible products are produced by a number of manufacturers, and offer customers advanced, non-isolated modules with the same footprint and form factor. POLA parts are also ensured to be interoperable, thereby providing customers with true second-source availability. Soft-Start Power Up The Auto-Track feature allows the power up of multiple PTH/PTV modules to be directly controlled from the Track pin. However, in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track pin should be directly connected to the input voltage, Vi (see Figure 7). Track Sense 5V 1.8 V GND Adjust RSET C2 22 mF 5.49 kW + GND C1 680 mF VO PTV05020W VI C3 330 mF + 1% 0.05 W GND GND Figure 7. Power-Up Application Circuit When the Track pin is connected to the input voltage, the Auto-Track function is permanently disengaged. This allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. VI (2 V/div) VO (1 V/div) II (2 A/div) t = 5 ms/div Figure 8. 10 www.ti.com PTV05020W SLTS232 – JANUARY 2005 From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically 8 ms to 15 ms) before allowing the output voltage to rise. The output then progressively rises to the module set-point voltage. Figure 8 shows the soft-start power-up characteristic of the PTV05020W, operating from a 5-V input bus and configured for a 3.3-V output. The waveforms were measured with a 10-A resistive load and the Auto-Track feature disabled. The initial rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors. Power up is complete within 25 ms. Overcurrent Protection (OCP) For protection against load faults, the modules incorporate output overcurrent protection. Applying a load that exceeds the overcurrent threshold causes the regulated output to shut down. Following shutdown, a module periodically attempts to recover by initiating a soft-start power up. This is described as a hiccup mode of operation, whereby the module continues in the cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the module automatically recovers and returns to normal operation. Overtemperature Protection (OTP) An onboard temperature sensor protects the module internal circuitry against excessively high temperatures. A rise in the internal temperature may be the result of a drop in airflow or a high ambient temperature. If the internal temperature exceeds the OTP threshold, the module Inhibit control is internally pulled low. This turns the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases by about 10°C below the trip point. Note: The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator. Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term reliability of the module. Always operate the regulator within the specified Safe Operating Area (SOA) limits for the worst-case conditions of ambient temperature and airflow. Output On/Off Inhibit For applications requiring output voltage on/off control, the modules incorporate an output Inhibit control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. The power modules function normally when the Inhibit input is left open-circuit, providing a regulated output whenever a valid source voltage is connected to VI with respect to GND. Figure 9 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input has its own internal pull up (see footnotes to electrical characteristics table). The input is not compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for control. 11 PTV05020W www.ti.com SLTS232 – JANUARY 2005 VOSense Track VI VI PTV05020W Inhibit GND C1 Sense GND VO VO VOAdj C2 RSET 698 W Q1 BSS138 C3 L O A D 1 = Inhibit GND GND Figure 9. On/Off Inhibit Application Circuit Turning Q1 on applies a low voltage to the Inhibit control and disables the output of the module. If Q1 is then turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 25 ms. Figure 10 shows the typical rise in both the output voltage and input current, following the turnoff of Q1. The turnoff of Q1 corresponds to the rise in the waveform, Q1 VDS. The waveforms were measured with a 10-A constant current load. VO (1 V/div) II (2 A/div) Q1 VDS (2 V/div) t = 5 ms/div Figure 10. Auto-Track™ Function The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. The sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal applications, that use dual-voltage VLSI ICs such as DSPs, microprocessors, and ASICs. 12 www.ti.com PTV05020W SLTS232 – JANUARY 2005 How Auto-Track™ Works Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1). This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is raised above the set-point voltage, the module's output remains at its set-point (2). As an example, if the Track pin of a 2.5-V regulator is at 1 V, the regulated output is 1 V. But if the voltage at the Track pin rises to 3 V, the regulated output does not go higher than 2.5 V. When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow a common signal during power up and power down. The control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising waveform at power up. Typical Application The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track compliant modules. Connecting the Track control pins of two or more modules forces the Track control of all modules to follow the same collective RC-ramp waveform, and allows them to be controlled through a single transistor or switch; see Q1 in Figure 11. To initiate a power-up sequence, it is recommended that the Track control first be pulled to ground potential. This is done at or before input power is applied to the modules, and then held for at least 10 ms thereafter. This brief period gives the modules time to complete their internal soft-start initialization. Applying a logic level high signal to the circuit On/Off Control turns Q1 on and applies a ground signal to the Track input of the modules. After completing their internal soft-start intialization, the output of all modules remains at zero volts while Q1 is on. Q1 may be turned off 10 ms after a valid input voltage has been applied to the modules. This allows the track control voltage to automatically rise to the module input voltage. During this period, the output voltage of each module rises in unison with other modules to its respective set-point voltage. Figure 12 shows the output voltage waveforms from the circuit of Figure 11 after the On/Off Control is set from a high-level to a low-level voltage. The waveforms, VO1 and VO2 represent the output voltages from the two power modules, U1 (3.3 V) and U2 (2 V), respectively. VO1 and VO2 are shown rising together to produce the desired simultaneous power-up characteristic. The same circuit also provides a power-down sequence. Power down is the reverse of power up, and is accomplished by lowering the track control voltage back to zero volts. The important constraint is that a valid input voltage must be maintained until the power down is complete. It also requires that Q1 be turned off relatively slowly. This is so that the Track control voltage does not fall faster than Auto-Track slew rate capability, which is 1 V/ms. The components R1 and C1 in Figure 11 limit the rate at which Q1 pulls down the Track control voltage. The values of 100 kΩ and 0.1 µF correlate to a decay rate of about 0.17 V/ms. The power-down sequence is initiated with a low-to-high transition at the On/Off Control input to the circuit. Figure 13 shows the power-down waveforms. As the Track control voltage falls below the nominal set-point voltage of each power module, then its output voltage decays with all the other modules under Auto-Track control. Notes on Use of Auto-Track™ 1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module can regulate at its adjusted set-point voltage. 2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp speeds of up to 1 V/ms. 3. The absloute maximum voltage that may be applied to the Track pin is the input voltage VI. 4. The module cannot follow a voltage at its Track control input until it has completed its soft-start initialization. This takes about 10 ms from the time that a valid voltage has been applied to its input. During this period, it is recommended that the Track pin be held at ground potential. 5. The module is capable of both sinking and sourcing current when following a voltage at its Track input. Therefore start up into an output prebias cannot be supported when a module is under Auto-Track control. Note: A prebias holdoff is not necessary when all supply voltages rise simultaneously under the control of Auto-Track. 13 PTV05020W www.ti.com SLTS232 – JANUARY 2005 6. The Auto-Track function can be disabled by connecting the Track pin to the input voltage (VI). When Auto-Track is disabled the output voltage rises at a quicker and more linear rate after input power has been applied. U1 Track PTV05020W VI 5 V Sense GND GND VO1 = 3.3 V VO Adjust + + CI CO R2 698 W C1 0 .1 µF U2 On/Off Control 1 = Power Down 0 = Power Up R1 100 kW Track Q1 BSS138 VO 2 = 1.8 V VI PTV05010W Inhibit GND 7 VO VO Adj + + CI 0 V CO R3 5.49 kW Figure 11. Sequenced Power Up and Power Down Using Auto-Track VO1 (1 V/Div) VO1 (1 V/Div) VO2 (1 V/Div) VO2 (1 V/Div) On/Off Input (5 V/Div) On/Off Input (5 V/Div) t = 10 ms/Div Figure 12. Simultaneous Power Up With Auto-Track Control t = 10 ms/Div Figure 13. Simultaneous Power Down With Auto-Track Control Prebias Start-Up Capability A prebias start-up condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. This often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another path might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. A 14 PTV05020W www.ti.com SLTS232 – JANUARY 2005 prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under most operating conditions, such modules can sink as well as source output current. The PTH/PTV modules incorporate synchronous rectifiers but do not sink current during start-up, or whenever the Inhibit pin is held low. Start-up includes an initial delay (approximately 8–15 ms), followed by the rise of the output voltage under the control of the module internal soft-start mechanism; see Figure 14. Conditions for Prebias Holdoff In order for the module to allow an output prebias voltage to exist (and not sink current), certain conditions must be maintained. The module holds off a prebias voltage when the Inhibit pin is held low, and whenever the output is allowed to rise under soft-start control. Power up under soft-start control occurs on the removal of the ground signal to the Inhibit pin (with input voltage applied), or when input power is applied with Auto-Track disabled(1). To further ensure that the regulator does not sink output current (even with a ground signal applied to its Inhibit), the input voltage must also be greater than the applied prebias source, throughout the power-up sequence(2). The soft-start period is complete when the output begins rising above the prebias voltage. The module then functions as normal, and sinks current if a voltage higher than its set-point value is applied to its output. Note: If a prebias condition is not present, the soft-start period is complete when the output voltage has risen to either the set-point voltage, or the voltage applied at the module Track control pin, whichever is lowest, to its output. Demonstration Circuit Figure 15 shows the start-up waveforms for the demonstration circuit shown in Figure 16. The initial rise in VO2 is the prebias voltage, which is passed from the VCCIO to the VCORE voltage rail through the ASIC. Note that the output current from the module (IO2) is negligible until its output voltage rises above the applied prebias. VI (2 V/div) VI (2 V/div) VO1 (1 V/div) VO 2 (1 V/div) IO 2 (5 A/div) VO (1 V/div) Start-up period t = 10 ms/div Figure 14. PTV05020W Start-Up t = 10 ms/div Figure 15. Prebias Start-Up Waveforms NOTES: 1. The prebias start-up feature is not compatible with Auto-Track. If the rise in the output is limited by the voltage applied to the Track control pin, the output sinks current during the period that the track control voltage is below that of the back-feeding source. For this reason, Auto-Track should be disabled when not being used. This is accomplished by connecting the Track pin to the input voltage, VI. This raises the Track pin well above the set-point voltage prior to start-up, thereby defeating the Auto-Track feature. 2. To further ensure that the regulator output does not sink current when power is first applied (even with a ground signal applied to the Inhibit control input), the input voltage must always be greater than the applied prebias source. This condition must exist throughout the power-up sequence of the power system. 15 PTV05020W www.ti.com SLTS232 – JANUARY 2005 U1 VI = 5 V VI Track PTV05010W Inhibit GND + C1 VO1 = 3.3 V V7O VO Adj R1 698 W C2 C3 U2 Track VI Inhibit GND U3 TPS3808G33 + 6 5 3 4 VCC SENSE MR RESET C4 C5 Sense PTV05020W VO VO2 = 1.8 V + GND VOAdj IO2 R2 5.49 kW + 1 VCORE VCCIO C6 ASIC CT GND 2 C7 0.1µF Figure 16. Application Circuit Demonstrating Prebias Start-Up Output Remote Sense Products with this feature incorporate an output voltage sense input, VO Sense. A remote sense improves the load regulation performance of the module by allowing it to compensate for any remote IR voltage drop between its output and the load. An IR drop is caused by the output current flowing through the small amount of pin and trace resistance. To use this feature, simply connect VO Sense to the VO node, close to the load circuit (see the data sheet standard application). If the VO Sense input is left open-circuit, an internal low-value resistor (15 Ω or less) connected between the pin and the output node, ensures that the output remains in regulation. With the sense input connected, the difference between the voltage measured directly between the VO and GND pins, and that measured from VO Sense to GND, is the amount of IR drop being compensated by the regulator. This should be limited to a maximum of 0.3 V. Note: The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency dependent components that may be placed in series with the output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connection, they are effectively placed inside the regulation control loop, which can adversely affect the stability of the module. 16 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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