RENESAS RNA51953APT0

Preliminary Datasheet
RNA51953A, B
Voltage Detecting, System Resetting IC Series
REJ03D0911-0402
Rev.4.02
Apr 01, 2010
Description
RNA51953A,B are semiconductor integrated circuits designed for detecting supply voltage and resetting all types of
logic circuits such as CPUs.
They include a built-in delay circuit to provide the desired retardation time simply by adding an external capacitor.
They fined extensive applications, including battery checking circuit, level detecting circuit and waveform shaping
circuit.
Features
 Few external parts
 Large delay time with a capacitor of small capacitance (td  100 ms, at 0.33 F)
 Low threshold operating voltage (Supply voltage to keep low-state at low supply voltage):
0.6 V (Typ) at RL = 22 k
 Wide supply voltage range: 2 V to 17 V
 Wide application range
 Ordering Information
Part Name
RNA51953AFPH0
Taping Abbreviation
(Quantity)
Package Type
Package Code
Package
Abbreviation
Surface
Treatment
SOP-8 pin
PRSP0008DE-C
FP
H (2,500 pcs / Reel)
0 (Ni/Pd/Au)
0 (Ni/Pd/Au)
RNA51953APT0
DIP-8 pin
PRDP0008AF-B
P
T (1,000 pcs / Reel)
RNA51953BFPH0
SOP-8 pin
PRSP0008DE-C
FP
H (2,500 pcs / Reel)
0 (Ni/Pd/Au)
RNA51953BPT0
DIP-8 pin
PRDP0008AF-B
P
T (1,000 pcs / Reel)
0 (Ni/Pd/Au)
Application
 Reset circuit of Pch, Nch, CMOS, microcomputer, CPU and MCU, Reset of logic circuit, Battery check circuit,
switching circuit back-up voltage, level detecting circuit, waveform shaping circuit, delay waveform generating
circuit, DC/DC converter, over voltage protection circuit
Recommended Operating Condition
 Supply voltage range: 2 V to 17 V
REJ03D0911-0402 Rev.4.02
Apr 01, 2010
Page 1 of 10
RNA51953A, B
Preliminary
Outline and Article Indication
• RNA51953A, B
Part No.
R953A
YMWC
CCC
R953B
YMWC
CCC
SOP-8
Lot No.
Y: Year Code
(the last digit of year)
M: Month Code
W: Week Code
C: Control Code
Trace Code
Pin No.1
Part No.
R5 1 9 5 3A
R5 1 9 5 3B
Y MW
Y MW
DIP-8
W: Week Code
M: Month Code
Y: Year Code
Pin Arrangement
RNA51953A, B
NC 1
8 NC
NC 2
7 Power-supply
NC 3
6 Output
5 Delay capacitor
GND 4
(Top view)
NC: No Connection
Outline: PRSP0008DE-C (SOP-8)
PRDP0008AF-B (DIP-8)
REJ03D0911-0402 Rev.4.02
Apr 01, 2010
Page 2 of 10
RNA51953A, B
Preliminary
Block Diagram
RNA51953A, B
Powersupply
A: Built-in Load
B: Open Collector
5 μA
Typ
R1
25 μA
Typ
Output
–
–
+
R2
1.25 V
GND
Delay capacitor
Operating Waveform
Output state
Supply voltage
RNA51953A, B
4.25 V
0.65 V
t
H
td
L
Output
undefined
REJ03D0911-0402 Rev.4.02
Apr 01, 2010
td
td ≈ 0.34 × Cd(pF) μs
t
Page 3 of 10
RNA51953A, B
Preliminary
Absolute Maximum Ratings
(Ta = 25°C, unless otherwise noted)
Item
Supply voltage
Output sink current
Symbol
VCC
Isink
Output voltage
VO
Power dissipation
Pd
Thermal derating
K
Operating temperature
Storage temperature
Topr
Tstg
Ratings
18
6
VCC
18
400
570
4.4
8.3
–40 to +85
–55 to +125
Unit
V
mA
V
mW
mW/°C
Conditions
Type A (output with constant current load)
Type B (open collector output)
8-pin SOP (PRSP0008DE-C)
8-pin DIP (PRDP0008AF-B)
8-pin SOP (PRSP0008DE-C)
Refer to the thermal
derating curve.
8-pin DIP (PRDP0008AF-B)
°C
°C
Electrical Characteristics
(Ta = 25°C, unless otherwise noted)
 “L” reset type
Item
Symbol
Min
Typ
Max
Unit
Detecting voltage
VS
4.05
4.25
4.45
V
Hysteresis voltage
VS
30
50
80
mV
Detecting voltage
temperature coefficient
VS/T
—
0.01
—
%/°C
Circuit current
ICC
Delay time
Test Conditions
Type A, VCC = 5V
—
450
680
—
420
630
tpd
1.6
3.4
7.0
ms
Cd = 0.01F *
Constant current
Ipd
–8
–5
–3
A
VCC = 5V
Output saturation
voltage
Vsat
—
0.2
0.4
V
VCC = 4V, Isink = 4mA
Threshold operating
voltage
VOPL
Output leakage
current
IOH
A
Type B, VCC = 5V
RL = 2.2k, Vsat  0.4V
—
0.67
0.8
—
0.55
0.7
—
—
30
nA
Type B
V
RL = 100k, Vsat  0.4V
Output load current
IOC
–40
–25
–17
A
Type A, VCC = 5V, VO = 1/2  VCC
Output high voltage
VOH
VCC–0.2
VCC–0.06
—
V
Type A
Note:
Please set the desired delay time by attaching capacitor of the range between 4700 pF and 10 F.
REJ03D0911-0402 Rev.4.02
Apr 01, 2010
Page 4 of 10
RNA51953A, B
Preliminary
Typical Characteristics
Thermal Derating
Detection Voltage vs. Ambient Temperature
4.34
8-pin DIP
(PRDP0008AF-B)
400
300
8-pin SOP
(PRSP0008DE-C)
200
100
0
0
Delay Capacitance Cd (μF)
Detection Voltage VS (V)
500
25
50
75 85 100
4.32
4.30
4.28
4.26
VSL
4.24
0
20
40
60
80 100
Ambient Temperature Ta (°C)
Ambient Temperature Ta (°C)
Delay Capacitance vs. Delay Time
Delay Time vs. Ambient Temperature
6
10
7 V
CC = 5 V
5
3
CD = 0.01 μF
1
7
5
3
0.1
7
5
3
0.01
7
5
3
0.001
0.1
3 57 1
5
4
VCC = 5 V
3
1
0
–40 –20
3 5 7 10 3 5 7 100 3 5 7 1000
–8
–6
–4
–2
0
20
40
60
80 100
Ambient Temperature Ta (°C)
REJ03D0911-0402 Rev.4.02
Apr 01, 2010
20
40
60
80 100
Threshold Operating Voltage
1.0
Output Voltage VOUT (V)
VCC = 5 V
VCC = 15 V
0
–40 –20
0
Ambient Temperature Ta (°C)
Canstant Current at Cd pin vs. Ambient Temperature
–12
–10
10 V
VCC = 15 V
2
Delay Time tpd (ms)
Canstant Current at Cd pin Ipd (μA)
VSH
4.22
–40 –20
125
Delay Time tpd (ms)
Power Dissipation Pd (mW)
600
Ta = 25°C
0.8
0.6
RL = 2.2 kΩ
0.4
RL = 22 kΩ
RL = 100 kΩ
0.2
0
0
0.2
0.4
0.6
0.8
1.0
Supply Voltage VCC (V)
Page 5 of 10
RNA51953A, B
Preliminary
Output Load Current vs. Output Voltage
(RNA51953A)
0.3
Output Load Current ICC (μA)
Output Saturation Voltage Vsat (V)
Output Saturation Voltage vs. Output Sink Current
VCC = 4 V
0.2
0.1
0
0
1
2
3
4
5
6
Output Sink Current Isink (mA)
–40
–30
–20
VCC = 5 V
VCC = 10 V VCC = 15 V
–10
0
0
4
8
12
16
Output Voltage VO (V)
Circuit Current ICC (μA)
Circuit Current vs. Ambient Temperature
(RNA51953B)
700
600
500
VCC = 5 V
400
300
200
100
0
–40 –20
0
20
40
60
80 100
Ambient Temperature Ta (°C)
REJ03D0911-0402 Rev.4.02
Apr 01, 2010
Page 6 of 10
RNA51953A, B
Preliminary
Example of Application Circuit
Reset Circuit of RNA51953
Powersupply
Powersupply
RL
Output
RESET
Logic circuit
RNA51953x
GND
VCC
Delay capacitor
GND
Cd
Figure 1 Reset Circuit of RNA51953
Notes: 1. When the voltage is anything except 4.25 V, RNA51957 and RNA51958 are used. In this case, the detecting
supply voltage is 1.25  (R1 +R2)/R2 (V) approximately.
The detecting supply voltage can be set between 2 V and 15 V.
2. The delay time is about 0.34  Cd (pF) s.
3. If the RNA51953 and the logic circuit share a common power source, type A (built-in load type) can be used
whether a pull-up resistor is included in the logic circuit or not.
4. The logic circuit preferably should not have a pull-down resistor, but if one is present, add load resistor RL to
overcome the pull-down resistor.
5. When the reset terminal in the logic circuit is of the low reset type, RNA51953 and RNA51957 are used and
when the terminal is of the high reset type, RNA51958 are used.
6. When a negative supply voltage is used, the supply voltage side of RNA51953 and the GND side are
connected to negative supply voltage respectively.
Case of Using Reset Signal except Supply Voltage in the RNA51953
(a) Reset at ON
Powersupply
(b) Reset at transistor ON
Out
put
RL
RNA51953x
GND
Delay capacitor
Powersupply
VCC
Powersupply
RESET
Logic circuit
Out
put
RL
RNA51953x
GND
GND
Cd
Delay capacitor
Powersupply
VCC
RESET
Logic circuit
GND
Cd
Control
signal
Figure 2 Case of Using Reset Signal except Supply Voltage in the RNA51953
REJ03D0911-0402 Rev.4.02
Apr 01, 2010
Page 7 of 10
RNA51953A, B
Preliminary
Notice for use
About the Power Supply Line
1. About bypass capacitor
Because the ripple and the spike of the high frequency noise and the low frequency are superimposed to the power
supply line, it is necessary to remove these.
Therefore, please install C1 and C2 for the low frequency and for the high frequency between the power supply line
and the GND line as shown in following figure 3.
VCC
+
C1
C2
Power-supply
Output
Example of ripple
noise measures
RNA51953
GND
Delay capacitor
Cd
Figure 3 Example of Ripple Noise Measures
Setting of Delay Capacity
Please use capacitor Cd for the delay within the range of 10 F or less.
When a value that is bigger than this is set, the problem such as following (1), (2), and (3) becomes remarkable.
t
VCC
tpd
Output
tPHL
Figure 4 Time Chart at Momentary Voltage-Decrease
(1) The difference at delay time becomes remarkable.
A long delay setting of tens of seconds is fundamentally possible. However, when set delay time is lengthened, the
range of the difference relatively grows, too. When a set value is assumed to be ‘tpd’, the difference occurs in the
range from 0.47  tpd to 2.05  tpd. For instance, 34 seconds can be calculated at 100 F. However, it is likely to
vary within the ranges of 16-70 seconds.
(2) Difficulty to react to a momentary voltage decrease.
For example, the reaction time tPHL is 10 s when delay capacitor Cd = 0.1 F.
The momentary voltage-decrease that is longer than such tPHL are occurs, the detection becomes possible. When the
delay capacitance is enlarged, tPHL also becomes long. For instance, it becomes about 100 to 200 s in case of
circuit constant C1 = 100 F.
(Characteristic graph 1 is used and extrapolation in case of Cd = 100 F.)
Therefore, it doesn't react to momentary voltage-decrease that is shorter than this.
(3) Original delay time is not obtained.
When the momentary voltage-decrease time ‘t’ is equivalent to tPHL, the discharge becomes insufficient and the
charge starts at that state. This phenomenon occurs at large capacitance. And, original delay time tpd is not
obtained.
Please refer to characteristic graph 2. (Delay time versus input pulse width)
REJ03D0911-0402 Rev.4.02
Apr 01, 2010
Page 8 of 10
RNA51953A, B
Preliminary
Characteristic Graph 1
Reaction Time vs. Delay Capacitance
(Example data)
Characteristic Graph 2
Delay Time vs. Momentary Voltage Decrease Pulse Width
(Example data)
10000
Delay Time tpd (ms)
Reaction Time tPHL (μs)
1000
200
100
10
1
0.01
0.1
1
10
Delay Capacitance Cd (μF)
1000
100
Delay Capacitance
0.01 μF
0.033 μF
0.1 μF
0.33 μF
1 μF
2.2 μF
3.3 μF
10
1
1
100
10
100
1000
Pulse Width (μs)
10000
Figure 5 Characteristic Graph
Setting of Output Load Resistance (RNA51953B)
High level output voltage can be set without depending on the power-supply voltage because the output terminal is an
open collector type. However, please guard the following notes.
1. Please set it in value (2 V to 17 V) within the range of the power-supply voltage recommendation.
Moreover, please never impress the voltage of maximum ratings 18 V or more even momentarily either.
2. Please set output load resistance (pull-up resistance) RL so that the output current (output inflow current IL) at L
level may become 4 mA or less. Moreover, please never exceed absolute maximum rating (6 mA).
VCC (2 V to 17 V)
RL
6
IL ≤ 4 mA
Figure 6 Output Load Resistance RL
Others
1. Notes when IC is handled are published in our reliability handbook, and please refer it.
The reliability handbook can be downloaded from our homepage (following URL).
http://www.renesas.com/products/common_info/reliability/reliability_root.jsp
2. Additionally, please inquire of our company when there is an uncertain point on use.
REJ03D0911-0402 Rev.4.02
Apr 01, 2010
Page 9 of 10
RNA51953A, B
Preliminary
Package Dimensions
JEITA Package Code
P-SOP8-4.4x4.85-1.27
RENESAS Code
PRSP0008DE-C
*1
Previous Code
—
MASS[Typ.]
0.1g
F
D
8
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
5
c
*2
E
HE
bp
Index mark
Terminal cross section
( Ni/Pd/Au plating )
Reference Dimension in Millimeters
Symbol
4
1
*3
e
Z
bp
x
M
A
A2
L1
A1
θ
L
y
Detail F
JEITA Package Code
P-DIP8-6.3x9.6-2.54
RENESAS Code
PRDP0008AF-B
Previous Code
DP-8FV
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Min Nom Max
4.65 4.85 5.05
4.2
4.4 4.6
1.85
0.00 0.1 0.20
2.03
0.34 0.4 0.46
0.15 0.20 0.25
0°
8°
5.7 6.2 6.5
1.12 1.27 1.42
0.12
0.10
0.75
0.25 0.45 0.65
0.90
MASS[Typ.]
0.54g
D
5
E
8
1
4
b3
0.89
A
Z
A1
Reference Dimension in Millimeters
Symbol
L
Min
e
bp
θ
c
e1
( Ni/Pd/Au plating )
REJ03D0911-0402 Rev.4.02
Apr 01, 2010
e1
D
E
A
A1
bp
b3
c
θ
e
Z
L
Nom Max
7.62
9.60 10.6
6.30 7.4
5.06
0.5
0.40 0.48 0.56
1.30
0.19 0.25 0.31
15°
0°
2.29 2.54 2.79
1.27
2.54
Page 10 of 10
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