16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A2068 INTRODUCTION The S6A2068 is a dot matrix LCD driver & controller LSl which is fabricated by low power CMOS technology. FUNCTION — Character type dot matrix LCD driver & controller — Internal driver: 16 common and 60 segment signal output — Display character format: 5 × 7 dots + cursor, 5 × 10 dots + cursor — Easy interface with a 4-bit or 8-bit MPU — Display character pattern: 5×7 dots format: 192 kinds, 5×10 dots format: 32 kinds — The special character pattern is directly programmable by the Character Generator RAM. — A customer character pattern programmable by mask option — Automatic power on reset function — It can drive a maximum of 80 characters by using the S6A0065 or S6A2067 externally. — It is possible to read both Character Generator and Display Data RAM from MPU. FEATURES — Internal Memory – Character Generator ROM: 8,320bits – Character Generator RAM: 512 bits – Display Data RAM: 80 × 8bits (80 characters max.) — Power Supply Voltage; 2.7 to 5.5V — Supply voltage for display: 0 to -5 V (V5) — CMOS process — 1/8 duty, 1/11 duty or 1/16 duty: programmable (1/8 duty; 5 × 7 dots format 1-line, 1/11 duly; 5 × 10 dots format 1-line, 1/16 duty: 5 × 7 dots format 2-line) — 100 QFP or bare chip available Precautions for Light Light has characteristics to move electrons in the integrated circuitry of semiconductors, therefore may change the characteristics of semiconductor devices when irradiated with light. Consequently, the users of the packages which may expose chips to external light such as COB, COG, TCP and COF must consider effective methods to block out light from reaching the IC on all parts of the surface area, the top, bottom and the sides of the chip. Follow the precautions below when using the products. 1. Consider and verify the protection of penetrating light to the IC at substrate (board or glass) or product design stage. 2. Always test and inspect products under the environment with no penetration of light. 1 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD BLOCK DIAGRAM Power Supply for LCD Drive V1 V2 V3 V4 V5 Parallel/Serial Data Conversion Circuit 5 Busy Flag DB4-DB7 4 8 DB0-DB3 4 R/W RS E 5 Character Generator ROM (CGROM) 8320 bits Character Generator RAM (CGRAM) 512 bits 8 8 Data Register (DR) Cursor & Blink Controller Circuit 8 Input/ Output Buffer 7 8 Instruction 8 Register (IR) Instruction Decoder (ID) Display 7 Data RAM (DDRAM) 7 80x8 bits 60-bit 60 60-bit 60 SegShift Latch ment Register Circuit Driver 60 S1-S60 D 7 Address Counter (AC) 7 7 OSC1 OSC2 Timing Generator Circuit CLK1 CLK2 M VDD GND Figure 1. S6A2068 Block Diagram 2 16-bit 16 Common 16 Shift Driver Common Register C1-C16 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A2068 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 S47 S48 S49 S50 S51 S52 S53 S54 S55 S56 S57 S58 S59 S60 C16 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 PIN CONFIGURATION S6A2068 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 VDD E R/W RS D M CLK2 CLK1 V5 V4 V3 V2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 S26 S25 S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 VSS OSC2 OSC1 V1 S46 S45 S44 S43 S42 S41 S40 S39 S38 S37 S36 S35 S34 S33 S32 S31 S30 S29 S28 S27 Figure 2. S6A2068 Pin Configuration 3 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD X Y (0, 0) Chip size: 3700 × 5050 Pad size: 100 × 100 Unit: µm 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 S6A2068 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 PAD DIAGRAM Figure 3. S6A2068 Pad Diagram * S6A2068 Marking: easy to find the PAD No. 77, 82 4 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A2068 PAD LOCATION [Unit: µm] Table 1. S6A2068 Pad Location PAD PAD PAD PAD PAD PAD NUM. NAME X 1 S26 -1684 Y NUM. NAME X 1686 35 CLK1 -453 Y NUM. NAME X Y -2358 69 S58 1684 436 2 S25 -1684 1560 36 CLK2 -328 -2358 70 S57 1684 560 3 S24 -1684 1436 37 M -203 -2358 71 S56 1684 686 4 S23 -1684 1310 38 D -78 -2358 72 S55 1684 810 5 S22 -1684 1186 39 RS 47 -2358 73 S54 1684 936 6 S21 -1684 1060 40 R/W 172 -2358 74 S53 1684 1060 7 S20 -1684 936 41 E 297 -2358 75 S52 1684 1186 8 S19 -1684 810 42 VDD 422 -2358 76 S51 1684 1310 9 S18 -1684 686 43 DB0 547 -2358 77 S50 1684 1436 10 S17 -1684 560 44 DB1 672 -2358 78 S49 1684 1560 11 S16 -1684 436 45 DB2 797 -2358 79 S48 1684 1686 12 S15 -1684 310 46 DB3 922 -2358 80 S47 1249 2358 13 S14 -1684 186 47 DB4 1047 -2358 81 S46 1124 2358 14 S13 -1684 60 48 DB5 1172 -2358 82 S45 999 2358 15 S12 -1684 -64 49 DB6 1297 -2358 83 S44 874 2358 16 S11 -1684 -190 50 DB7 1422 -2358 84 S43 749 2358 17 S10 -1684 -314 51 C1 1684 -1814 85 S42 624 2358 18 S9 -1684 -440 52 C2 1684 -1690 86 S41 499 2358 19 S8 -1684 -564 53 C3 1684 -1564 87 S40 374 2358 20 S7 -1684 -690 54 C4 1684 -1440 88 S39 249 2358 21 S6 -1684 -814 55 C5 1684 -1314 89 S38 124 2358 22 S5 -1684 -940 56 C6 1684 -1190 90 S37 -1 2358 23 S4 -1684 -1064 57 C7 1684 -1064 91 S36 -126 2358 24 S3 -1684 -1190 58 C8 1684 -940 92 S35 -251 2358 25 S2 -1684 -1314 59 C9 1684 -814 93 S34 -376 2358 26 S1 -1684 -1440 60 C10 1684 -690 94 S33 -501 2358 27 VSS -1684 -1702 61 C11 1684 -564 95 S32 -626 2358 28 OSC2 -1684 -1868 62 C12 1684 -440 96 S31 -751 2358 29 OSC1 -1684 -1994 63 C13 1684 -314 97 S30 -876 2358 30 V1 -1078 -2358 64 C14 1684 -190 98 S29 -1001 2358 31 V2 -953 -2358 65 C15 1684 -64 99 S28 -1126 2358 32 V3 -828 -2358 66 C16 1684 60 100 S27 -1251 2358 33 V4 -703 -2358 67 S60 1684 186 34 V5 -578 -2358 68 S59 1684 310 NOTE: COORDINATE COORDINATE COORDINATE "S6A2068" Marking: easy to find the PAD No. 77, 82. 5 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD PIN DESCRIPTION Table 2. S6A2068 Pin Description PIN (No). VDD(42) I/O Power Name Power supply Description Interface for logical circuit (2.7V to 5.5V) Power VSS(GND) (27) 0V (GND) Supply V1-V5(30-34) Bias voltage level for LCD driving S1-S60 (1-26, 67-100) Output Segment output Segment signal output for LCD driving LCD C1-C16 (51-66) Output Common output Common signal output for LCD driving LCD OSC1, OSC2 (29) (28) Input (OSC1) Output (OSC2) Oscillator Both pin connected to Rf resistor for internal oscillator circuit. In case of external frequency use only, the frequency is input to OSC1 terminal. Resistor CLK1 (35) Output Data latch clock Clock output terminal for the serially transferred data to be latched to the driver. S6A0065 or CLK2 (36) Data shift clock Clock output terminal used when D terminal data output shifts the inside of the driver. M (37) Alternated signal for LCD driver output The alternating signal to convert LCD drive waveform to AC. D (38) Display data interface Character pattern data, which is corresponding to each common signal, is supplied to driver serially. Read/Write Enable Start enable signal to read or write the data R/W (40) Read/Write R/W signal input is used to select the read/write mode RS (39) Register select register selection input Data interface Used for data transfer between the MPU and S6A2068. These terminals are for data bus with bi-directional three-state. First 4-bit (DB0-DB3) are not used during 4-bit operation (DB7 can be used as a busy flag). E (41) DB0-DB7 (43-50) 6 Input Input/ Output S6A2067 MPU 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A2068 Internal logic of input/output terminal Input/Output Input Logic Diagram No Pull up Applicable pin E VDD with pull up RS, R/W VDD Output VDD CLK1, CLK2 VDD M, D Input/Output VDD DB0-DB7 VDD VDD Enable Data 7 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD MAXIMUM ABSOLUTE LIMIT (TA = 25°C) Characteristic Symbol Value Unit Operating Voltage VDD -0.3 to +7.0 V Driver Supply Voltage VLCD VDD - 11.5 to VDD + 0.3 V Input Voltage VIN -0.3 to VDD + 0.3 V Power Dissipation PD 500 MW Operating Temperature TOPR -30 to +85 °C Storage Temperature TSTG -55 to + 125 °C NOTE: 8 Voltage greater than above may damage the circuit (VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5) 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A2068 ELECTRICAL CHARACTERISTICS DC Characteristics (V DD = 4.5V to 5.5V, VSS = 0V, TA = -30 to +85°C) Characteristic Symbol Test condition Min Typ Max Unit Operating Voltage VDD – 4.5 – 5.5 V mA Operating Current Input Voltage 1 Input Voltage 2 Output Voltage 1 Output Voltage 2 Voltage Drop (*2) IDD1 Ceramic resonator fOSC = 250kHz – 0.65 0.9 IDD2 Resistor oscillation external clock operation fOSC = 270kHz – 0.45 0.7 High VIH1 – 2.2 – VDD Low VIL1 – -0.3 – 0.6 R/W, RS High VIH2 – VDD-1.0 – VDD OSC1 Low VIL2 – -0.2 – 1.0 High VOH1 IOH = -0.205mA 2.4 – – Low VOL1 IOL = 1.2mA – – 0.4 High VOH2 IO = -40µA 0.9VDD – – Low VOL2 IO = 40µA – – 0.1VDD COM VdCOM IO = ± 0.1mA – – 1 C1-C16 SEG VdSEG – – 1 S1-S60 -1 – 1 (*1) ILKG Input Leakage Current VIN = 0 V or VDD V E, DB0DB7, DB0-DB7 CLK1, LK2, M, D µA E IIN VDD = 5V(test pull up R) -50 -125 -250 Frequency (*3) fEC – 125 250 350 kHz Duty duty 45 50 55 % Rise time tR – – 0.2 µs Fall time tF – – 0.2 µs 190 270 360 kHz OSC1, OSC2 1/5 bias 4.6 – 10.0 V V1-V5 1/4 bias 3.0 – 10.0 Input Low Current External Clock Applicable Pin Internal Clock Frequency (*3) fOSC1 LCD Driving VLCD1 Voltage (*4) VLCD2 Rf = 91kΩ ±2% RS, R/W VDD = 5V VDD-V5 OSC1 9 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD DC Characteristics (V DD = 2.7V to 4.5V, VSS = 0V, TA = -30 to +85°C) Characteristic Symbol Test condition Min Typ Max Unit Operating Voltage VDD – 2.7 3.0 4.5 V Operating Current (*1) IDD1 Ceramic resonator fOSC = 250kHz – 0.3 0.5 mA IDD2 Resistor oscillation external clock operation fOSC = 270kHz – 0.17 0.3 High VIH1 – 1.9 – VDD Low VIL1 – -0.3 – 0.4 R/W, RS High VIH2 – 0.7VDD – VDD OSC1 Low VIL2 – – – 0.2VDD High VOH1 IOH = -0.205mA 2.0 – – Low VOL1 IOL = 1.2mA – – 0.4 High VOH2 IO = -40µA 0.8VDD – – CLK1, CLK2, Low VOL2 IO = 40µA – – 0.2VDD M, D COM VdCOM IO = ± 0.1mA – – 1 C1-C16 SEG VdSEG – – 1.5 S1-S60 VIN = 0 V or VDD -1 – 1 VDD = 5V (test pull -10 -50 -120 125 250 350 kHz Input Voltage 1 Input Voltage 2 Output Voltage 1 Output Voltage 2 Voltage Drop (*2) ILKG Input Leakage Current IIN Input Low Current V Applicable Pin E, DB0DB7, DB0-DB7 µA E RS, R/W up R) External Clock Freq. (*3) fEC Duty duty 45 50 55 % Rise time tR – – 0.2 µs Fall time tF – – 0.2 µs 190 270 350 kHz OSC1, OSC2 V V1-V5 – Internal Clock Frequency (*3) fOSC1 LCD Driving VLCD1 VDD-V5 1/5 bias 3.0 – 10.0 Voltage VLCD2 1/4 bias 3.0 - 10.0 10 Rf = 75kΩ ± 2% VDD = 3V OSC1 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A2068 NOTES: *1) The supply current value from VDD when condition is as follows VDD = 5V, VSS = 0V, V5 = -2V VDD = 3V, VSS = 0V, V5 = -2V *2) Applied to the voltage drop occurring from terminals VDD, V1, V4 and V5 to each common terminal (C1-C16) when 0.1mA is flown in or out to and from all COM and SEG terminals, and also to voltage drop occurring from terminals VDD, V2, V3 and V5 to each SEG terminal (S1-S60). When the output level is at VDD, V1 or V2 level, 0.1mA is flown out, while 0.1mA flow in when the output level is at V3, V4 or V5 level. This occurs when 5 V or -5 V is input to VDD, V1 and V3 or to V2, V4, and V5 respectively. *3) and *4): Refer to oscillator circuit and input the voltage listed in the table bellow to V1-V5 *3) Oscillator circuit Resistor Circuit OSC1 External Circuit OSC2 OSC1 Rf Rf: 91kΩ +2% OSC2 open Frequency input *4) Input the voltage listed in the table below to V1-V5 Duty 1/8, 1/11 Duty 1/16 Bias 1/4 Bias 1/5 V1 VDD - VLCD/4 VDD - VLCD/5 V2 VDD - VLCD/2 VDD - 2V LCD/5 V3 VDD - VLCD/2 VDD - 3V LCD/5 V4 VDD - 3V LCD/4 VDD - 4V LCD/5 V5 VDD - VLCD VDD - VLCD Power supply NOTE: VLCD is the LCD driving voltage, refer to the initial set of the instruction code. 11 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD AC Characteristics (1) Write Mode (Writing data from MICOM to S6A2068) ( VDD = 4.5V to 5.5V, TA = -30 to +85°C) Characteristic Symbol Min Typ Max Unit Test pin E Cycle Time tC 500 – – ns E E Rise Time tR – – 25 ns E E Fall Time tF – – 25 ns E E Pulse Width (High, Low) tW 220 – – ns E R/W and RS Set-Up Time tSU1 40 – – ns R/W, RS tH1 10 – – ns R/W, RS tSU2 60 – – ns DB0 - DB7 tH2 10 – – ns DB0 - DB7 Symbol Min Typ Max Unit Test pin E Cycle Time tC 1400 – – ns E E Rise / Fall Time tR – – 25 ns E E Pulse Width (High, Low) tW 400 – – ns E R/W and RS Set-Up Time tSU1 60 – – ns R/W, RS tH1 20 – – ns R/W, RS tSU2 140 – – ns DB0 - DB7 tH2 10 – – ns DB0 - DB7 R/W and RS Hold Time Data Set-Up Time Data Hold Time ( VDD = 2.7V to 4.5V, TA = -30 to +85°C) Characteristic R/W and RS Hold Time Data Set-Up Time Data Hold Time 12 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD RS VIH1 VIL1 tsu1 R/W VIL1 S6A2068 VIH1 VIL1 th1 VIL1 th1 tw tf VIH1 VIL1 E tr DB0 - DB7 VIH1 VIL1 VIH1 VIL1 tsu2 Valid Data tc VIL1 th2 VIH1 VIL1 13 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD (2) Read Mode (Reading data from S6A2068 to MCU) (V DD = 4.5V to 5.5V, TA = -30 to +85°C) Characteristic Symbol Min Typ Max Unit Test pin E Cycle Time tC 500 – – ns E E Rise Time tR – – 25 ns E E Fall Time tF – – 25 ns E E Pulse Width (High, Low) tW 220 – – ns E R/W and RS Set-Up Time tSU 40 – – ns R/W, RS R/W and RS Hold Time tH 10 – – ns R/W, RS Data Output Delay Time tD – – 120 ns DB0 to DB7 tDH 20 – – ns DB0 to DB7 Symbol Min Typ Max Unit Test pin E Cycle Time tC 1400 – – ns E E Rise / Fall Time tR – – 25 ns E E Pulse Width (High, Low) tW 400 – – ns E R/W and RS Set-Up Time tSU 60 – – ns R/W, RS R/W and RS Hold Time tH 20 – – ns R/W, RS Data Output Delay Time tD – – 360 ns DB0 - DB7 tDH 5 – – ns DB0 - DB7 Data Hold Time (V DD = 2.7V to 4.5V, TA = -30 to +85°C) Characteristic Data Hold Time 14 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD RS S6A2068 VIH1 VIL1 t su VIH1 VIL1 th R/W tw VIL1 th tf E tr DB0 DB7 VIH1 VIL1 tD VIH1 VIL1 VIL1 tD Valid Data tc VIL1 VOH1 VOL1 15 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD (3) Interface Mode (with S6A0065, S6A2067) (V DD = 2.7V to 5.5V, TA = -30 to +85°C) Characteristic Symbol Min Typ Max Unit Test pin Clock Pulse Width High tWCKH 800 – – ns CLK Clock Pulse Width Low tWCKL 800 – – ns CLK Data Set-Up Time tSU 300 – – ns D Data Hold Time tDH 300 – – ns D Clock Set-Up Time tCSU 500 – – ns CLK M Delay Time tDM -1000 – 1000 ns M CLK1 0.9VDD 0.9VDD tWCKH tWCKH tCSU CLK2 0.1VDD 0.9VDD 0.9VDD t CSU D tWCKL 0.9VDD 0.1VDD tSU M 0.9VDD t DM 16 0.1VDD 0.1VDD tDH 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A2068 CONTROL AND DISPLAY COMMAND Command RS R/W DB7 DB6 DB5 DB4 DB3 DB4 DB1 DB0 Clear Display 0 0 0 0 0 0 0 0 0 1 1.64ms Return Home 0 0 0 0 0 0 0 0 1 X 1.64ms cursor move to first digit Entry Mode Set 0 0 0 0 0 0 0 1 I/D SH 40µs • I/D; set cursor move direction H: Increase L: Decrease Execution Time (f OSC=250kHz) Remark • SH: Specifies shift of display H: Display is shifted L: Display is not shifted Display On/Off 0 0 0 0 0 0 1 D C B 40µs • Display: D H: Display ON L: Display OFF • Cursor: C H: Cursor ON L: Cursor OFF • Blinking: B H: Blinking ON L: Blinking OFF Shift 0 0 0 0 0 1 S/C R/L X X 40µs • SC H: Display shift L: Cursor move • R/L H: Right shift L: Left shift Set Function 0 0 0 0 1 DL N F X X 40µs • DL H: 8-bit interface L: 4-bit interface •N H: 2 line display L: 1 line display • F H: 5 x 10 dots L: 5 x 7 dots . 17 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD CONTROL AND DISPLAY COMMAND (CONTINUED) Command RS R/W DB7 DB6 Set CG RAM Address 0 0 0 1 Set DD RAM Address 0 0 1 Read Busy Flag & Address 0 1 BF DB5 DB4 DB3 DB2 DB1 CG RAM address (corresponds to cursor address) DB0 Remark Execution Time (f OSC=250kHz) 40µs CG RAM Data is sent and received after this setting DD RAM address 40µs DD RAM Data is sent and received after this setting Address Counter used for Both DD & CD RAM address 0µs BF H: Busy L: Ready - Reads BF indication internal operating is being performed. - Reads address counter contents Write Data 1 0 Write Data 46µs Write data into DD or CGRAM Read Data 1 1 Read Data 46µs Read data from DD or CGRAM NOTES: 1. When a MPU program with Busy Flag (DB7) checking is made, 1/2 fOSC (is necessary) for executing 2. 18 the next instruction by the "E" signal after the Busy Flag (DB7) goes to "Low". "x" is don't care. 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A2068 APPLICATION INFORMATION ACCORDING TO LCD PANEL 1) LCD Panel: 12 character × 1-line, Character Format; 5 × 7 dots + 1-cursor line (1/4 bias, 1/8 duty) C1 C8 S1 S6A2068 S60 2) LCD Panel: 12 character × 1-line, Character Format; 5 × 10 dots + 1-cursor line (1/4 bias, 1/11 duty) C1 C11 S6A2068 S1 S60 19 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 3) LCD Panel : 12 character × 2-line Character Format; 5 × 7 dots + 1-cursor line (1/5 bias, 1/16 duty) C1 C8 C9 S6A2068 C16 S1 S60 4) LCD Panel: 24 character× 1-line, Character Format; 5× 7 dots + 1 dot + 1-cursor line (1/5 bias, 1/16 duty) C1 C8 S6A2068 S1 S60 C9 C16 20 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A2068 5) LCD Panel: 6 character x 2-line Character Format; 5 x 7 dots + 1-cursor line (1/4 bias, 1/8 duty) S1 S30 C1 C8 S6A2068 S31 S60 BIAS VOLTAGE DIVIDE CIRCUIT S6A2068 VDD V1 V2 V3 V4 S6A2068 V5 VDD V1 V2 V3 V4 V5 VDD VDD R R R R GND or other voltage (1/4 bias, 1/8 or 1/11 duty) R R R R R GND or other voltage (1/5 bias, 1/16 duty) 21 S6A2068 16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S1 - S60 LCD Panel DL2 SC1 - SC40 DL2 SC1 - SC40 DL2 SC1 - SC40 D OSC1 VEE V1 V2 V3 V4 V5 V6 VDD VSS M SHL2 CL2 SHL1 CL1 FCS DR2 DL1 DR1 VEE V1 V2 V3 V4 V5 V6 VDD VSS M SHL2 CL2 SHL1 CL1 FCS DR2 DL1 DR1 VEE V1 V2 V3 V4 V5 V6 VDD VSS M SHL2 CL2 SHL1 CL1 FCS DR2 DL1 DR1 OSC2 VDD CLK2 CLK1 M VSS V1 V2 V3 C1 - C16 V4 to MPU V5 DB0-DB7 APPLICATION CIRCUIT GND or Other voltage V5 V4 V3 V2 V1 VLCD (1/5 bias) When S6A0065 is externally connected to the S6A2068, you can increase the number of display digits up to 80 characters. 22