SEMTECH SC122EVB

SC122
Low Voltage Synchronous
Boost Converter
POWER MANAGEMENT
Features
Description
„
The SC122 is a high efficiency, low noise, synchronous
step-up DC-DC converter. It produces a fixed 3.3V output
from a single cell alkaline or NiMH battery. It features an
internal 1.2A switch and synchronous rectifier to achieve
high efficiency and to eliminate the need for an external
Schottky diode.
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Input voltage — 0.7V to 1.6V
Minimum start-up voltage — 0.85V
Output voltage fixed at 3.3V
Peak input current limit — 350mA typically
Output current 95mA at VIN = 1.6V, 50mA at VIN = 0.9V
Efficiency up to 80%
Internal synchronous rectifier
Switching frequency — 1.2MHz
Power save (voltage hysteretic) control
Anti-ringing circuit
Operating supply current (measured at OUT) — 40μA
No forward conduction path during shutdown
MLPD-UT-6 1.5 × 2.0 × 0.6 (mm) package
Lead-free and halogen-free
WEEE and RoHS compliant
The SC122 operates exclusively in voltage-hysteretic
power save mode (PSAVE) for high efficiency under light
load conditions. It features anti-ringing circuitry for
reduced EMI in noise sensitive applications. While disabled, the output remains in a high impedance state to
preserve the charge on the output capacitor. This permits
ultra-low idle quiescent currents in applications in which
the SC122 can be periodically enabled by an external controller to recharge the output capacitor.
Applications
Low quiescent current is obtained despite a high 1.2MHz
operating frequency. Small external components and the
space saving MLPD-UT-6, 1.5×2.0×0.6 (mm) package,
make this device an excellent choice for small handheld
applications that require the longest possible battery life.
„
Electric toothbrushes
„ Personal medical products
„ Single-cell alkaline, NiCd, or NiMH applications
Typical Application Circuit
L1
IN
Single
Cell
(1.2V)
CIN
LX
EN
OUT
GND
GND
3.3V
COUT
SC122
February 1, 2010
© 2010 Semtech Corporation
1
SC122
Pin Configuration
LX
1
GND
2
IN
3
Ordering Information
TOP VIEW
T
6
Device
Package
SC122ULTRT(1)(2)
MLPD-UT-6 1.5×2
SC122EVB
Evaluation Board
OUT
5
GND
4
EN
Notes:
(1) Available in tape and reel only. A reel contains 3,000 devices.
(2) Lead-free packaging only. Device is WEEE and compliant and
halogen-free.
MLPD-UT; 1.5×2, 6 LEAD
θJA = 84°C/W
Marking Information
122
yw
MLPD-UT; 1.5×2, 6 LEAD
yw = date code
2
SC122
Absolute Maximum Ratings
Recommended Operating Conditions
IN, OUT, LX (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0
Ambient Temperature Range (°C) . . . . . . . . . . . . . . 0 to +70
EN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)
VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7 to 1.6
(1)
ESD Protection Level (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
VOUT (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3
Thermal Information
Thermal Resistance Junction-Ambient(2) (°C/W) . . . . . . . 84
Maximum Junction Temperature (°C) . . . . . . . . . . . . . . . 150
Storage Temperature Range (°C) . . . . . . . . . . . -65 to +150
Peak IR Reflow Temperature (10s to 30s) (°C) . . . . . . +260
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not recommended.
NOTES:
(1) Tested according to JEDEC standard JESD22-A114.
(2) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Electrical Characteristics
Unless otherwise noted VIN = 1.2V, CIN = COUT = 22μF, L1 = 4.7μH, TA = 0 to +70°C. Typical values are at TA = 25°C.
Parameter
Symbol
Input Voltage Range
VIN
Output Voltage
VOUT
Conditions
Min
Typ
0.7
Max
Units
1.6
V
3.3
Output Accuracy
VOUT-tol
VEN = VIN
Minimum Startup Voltage
VIN-SU
IOUT < 1mA
0.85
V
Operating Supply Current (1)
IOUT-Q
VEN = VIN, IOUT = 0mA, VOUT = 3.3V
40
μA
Disabled OUT Leakage Current
IOUT-DIS
VEN = 0, VOUT = 3.3V (externally forced)
2
μA
Disabled IN Quiescent Current
IIN-DIS
VEN = 0, VIN = 1.6, VOUT = 3.3V (externally forced)
4
μA
IIN-SHDN
VEN = 0V, VIN = 1.6V, VOUT = 0V
8.5
μA
Internal Oscillator Frequency
fOSC
while bursting
1.2
MHz
Startup Time
tSU
From VEN low-to-high transition
1
ms
Minimum VIN for Restart (2)
VIN-Restart
Lowest VIN to ensure re-enable within 300μs,
VOUT = 3.1V (externally forced)
P-Channel ON Resistance
RDS(ON)P
ILX = 50mA
0.6
Ω
N-Channel ON Resistance
RDS(ON)N
ILX = 50mA, VIN=1.6V
0.5
Ω
P-Channel Startup Current Limit
ILIM(P)-SU
VIN = 1.2V, VEN > VIH
100
mA
Shutdown Current
-3
V
3
1.0
%
V
3
SC122
Electrical Characteristics (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
N-Channel Current Limit
ILIM(N)
VIN = 1.2V
LX Leakage Current PMOS
ILXPLK
TA = 25°C, VLX = 0V, VOUT = 3.3V
1
μA
LX Leakage Current NMOS
ILXNLK
TA = 25°C, VLX = 3.3V, VOUT = 3.3V
1
μA
Logic Input High
VIH
VIN = 1.2V
Logic Input Low
VIL
VIN = 1.2V
0.1
V
Logic Input Current High
IIH
VEN = VIN = 1.2V
1
μA
Logic Input Current Low
IIL
VEN = 0V
350
mA
0.4
-0.2
Units
V
μA
NOTES:
(1) Quiescent operating current is drawn from the OUT pin while in regulation. The quiescent operating current projected to the IN pin is
approximately IQ × (VOUT/VIN).
(2) Restart occurs when the EN pin transitions from low to high while the output voltage is at or near the regulation value (3.3V). See the
application section “The Enable Pin” for details.
4
SC122
Typical Characteristics — VOUT = 3.3V
Efficiency vs. IOUT
Efficiency vs. IOUT
ο
100
L = 4.7μH, TA = 25 C
100
90
90
VIN = 1.6V
80
TA = 0°C
70
Efficiency (%)
Efficiency (%)
TA = 25°C
80
70
60
VIN = 0.9V
50
VIN = 1.2V
40
60
40
30
20
20
10
10
0.1
0.2
0.5
1
2
5
10
20
50
0
100
TA = 70°C
50
30
0
L = 4.7μH, VIN = 1.2V
0.1
0.2
0.5
1
2
Load Regulation
L = 4.7μH, TA = 25 C
3.31
3.3
20
50
100
L = 4.7μH, VIN = 1.2V
3.3
3.29
3.29
VIN = 1.6V
VOUT (V)
VOUT (V)
10
Load Regulation
ο
3.31
5
IOUT (mA)
IOUT (mA)
3.28
VIN = 0.9V
3.27
TA = 70°C
3.28
3.27
TA = 0°C
3.26
3.26
VIN = 1.2V
TA = 25°C
3.25
0
10
20
30
40
50
60
70
80
90
3.25
0
100
10
20
30
IOUT (mA)
3.31
3.3
70
80
90
100
L = 4.7μH, IOUT = 45mA
3.3
3.29
3.29
TA = 0°C, 25°C, 70°C
VOUT (V)
VOUT (V)
60
Line Regulation — High Load
L = 4.7μH, IOUT = 1mA
3.28
TA = 0°C, 25°C, 70°C
3.28
3.27
3.27
3.26
3.26
3.25
0.7
50
IOUT (mA)
Line Regulation — Low Load
3.31
40
1
1.3
VIN (V)
1.6
3.25
0.7
1
1.3
1.6
VIN (V)
5
SC122
Typical Characteristics — VOUT = 3.3V (continued)
Temperature Regulation — Low Load
3.31
Temperature Regulation — High Load
L = 4.7μH, IOUT = 1mA
3.31
L = 4.7μH, IOUT = 45mA
VIN = 1.6V
3.3
3.3
3.29
3.29
VIN = 0.9V
VOUT (V)
VOUT (V)
VIN = 1.2V
3.28
VIN = 1.2V
VIN = 1.6V
3.28
3.27
3.27
3.26
3.26
3.25
0
10
20
30
40
50
60
VIN = 0.9V
3.25
0
70
10
o
20
30
40
50
60
70
o
Junction Temperature ( C)
Junction Temperature ( C)
Startup Min. Load Resistance vs. VIN
Startup Max. Load Current vs. VIN
L = 4.7μH
L = 4.7μH
160
50
140
TA = 25°C
30
Equivalent RLOAD (Ω)
IOUT (mA)
40
TA = 70°C
TA = 25°C
20
TA = 0°C
120
100
TA = 0°C
80
60
TA = 70°C
40
10
20
0
0.7
1
1.3
0
1.6
0.7
1
VIN (V)
Maximum IOUT vs. VIN
120
L = 4.7μH
0.9
VOUT = 3.3V, IOUT = 1mA
0.85
Startup Voltage (V)
80
IOUT (mA)
1.6
Minimum Start-up Voltage vs. Temperature
100
TA = 70°C
60
TA = 0°C
TA = 25°C
40
0.8
0.75
0.7
0.65
20
0
1.3
VIN (V)
0.6
0.7
1
1.3
VIN (V)
1.6
0
10
20
30
40
Temperature (°C)
50
60
70
6
SC122
Pin Descriptions
MLPD Pin #
Pin Name
Pin Function
1
LX
2, 5
GND
3
IN
Battery input and damping switch connection.
4
EN
Enable digital control input — active high.
6
OUT
T
Thermal
Pad
Switching node — connect an inductor from the input supply to this pin.
Signal and power ground connections.
Output voltage supply pin — requires an external 10μF bypass capacitance (effective under VOUT bias) for
normal operation.
Thermal Pad is for heat sinking purposes — connect to ground using multiple vias, not connected internally.
7
SC122
Block Diagram
IN
VOUT
Comp.
3
+
6
OUT
1
LX
2
GND
+ 1.7 V
+
EN
Start-up
Oscillator
4
PLIM
Amp.
Gate Drive
and
Logic
Control
Oscillator
Bulk
Bias
+
GND
5
-
Error
Amp.
NLIM
Amplifier
-
+
+ VREF
- 1.2 V
8
SC122
Applications Information
Detailed Description
The SC122 is a synchronous step-up hysteretic DC-DC
converter utilizing a 1.2MHz fixed frequency switching
architecture. It provides a fixed 3.3V output from an input
voltage as low as 0.7V, with an unloaded startup input
voltage of 0.85V.
The SC122 operates exclusively in PSAVE regulation mode
(bursts of switching boost cycles, alternating with periods
of an output-high-impedance state). It has quiescent
current consumption as little as 40μA into the OUT pin. It
features anti-ringing circuitry for reduced EMI in noise
sensitive applications. The boost cycles can be disabled
with an active-high enable input. While disabled, the
output remains in a high impedance state to preserve the
charge on the output capacitor. This permits ultra-low
idle quiescent currents in applications in which the SC122
can be periodically enabled by an external controller to
recharge the output capacitor.
This begins the high-impedance phase. The output
capacitor then discharges into the load until VOUT reaches
a lower voltage threshold, which initiates a new burst
phase. The upper and lower voltage thresholds differ by
approximately 50mV, and were chosen to provide an
average output voltage of 3.3V. The time between bursts
is determined by the discharge rate of the output capacitor, which depends on the value of output capacitance
and the magnitude of the applied load. Figure 1 illustrates PSAVE regulation.
VIN = 1.5V, IOUT = 20mA
VOUT ripple
(50mV/div)
IL
(100mA/div)
VLX
(5V/div)
The regulator control circuitry is shown in the Block
Diagram. It is comprised of a feedback controller, an internal 1.2MHz oscillator, an n-channel Field Effect Transistor
(FET) between the LX and GND pins, and a p-channel FET
between the LX and OUT pins. The current flowing through
both FETs is monitored and limited as required for startup
and PSAVE regulator operation. An external inductor must
be connected between the IN pin and the LX pin.
During the burst phase of PSAVE operation, the controller
alternates between the on-state and the off-state. During
the on-state the n-channel FET is turned on, grounding the
inductor at the LX pin. This causes the current flowing from
the input supply through the inductor to ground to ramp
up. The on-state continues until the first of two limits is
reached, either the n-channel current limit ILIM(N), or the ontime limit TON-MAX = 0.9 × 1/fOSC. Then during the off-state,
the n-channel FET is turned off and the p-channel FET is
turned on, connecting the inductor between IN and OUT.
The (now decreasing) inductor current flows from the input
to the output, transferring the inductor energy to the
output and boosting the output voltage above the input
voltage for the remainder of the cycle period T = 1/fOSC. The
cycle then repeats to re-energize the inductor.
The burst phase continues until VOUT reaches an upper
voltage threshold, at which point both FETs are turned off.
Time = (10μs/div)
Figure 1 — PSAVE Regulation Waveforms
The Enable Pin
The EN pin is a high impedance logical input that can be
used to enable or disable the SC122 under processor
control. VEN > 0.4V will enable the output. The startup
sequence from the EN pin is identical to the startup
sequence from the application of input power.
VEN < 0.1V will disable regulation and set the LX pin in a
high-impedance state (turn off both FET switches). The
OUT pin is also left in a high-impedance state when disabled. The SC122 can be disabled while maintaining the
output voltage on the output capacitor, for the lowest
possible quiescent current, while supporting a low application idle state load. The SC122 can then be periodically
re-enabled for a brief time to refresh the charge held on
the output capacitor, then disabled for an extended time
as determined by the discharge rate of the output capacitor while supplying the idle-state load current. For
VIN > VIN-Restart, and over the full specified temperature
range, regulation will be fully enabled within 300μs of a
high voltage on the EN pin with VOUT discharged to as low
as 2.5V.
9
SC122
Applications Information (continued)
A suggested very low duty cycle refresh oscillator circuit
is included on the SC122 EVB-RM, the SC122 Evaluation
Board with Refresh Modulation.
Regulator Startup, Short Circuit Protection,
and Current Limits
The SC122 permits power up at input voltages from 0.85V
to 1.6V. Startup current limiting of the internal switching
n-channel and p-channel FET power devices protects
them from damage in the event of a short between OUT
and GND. This protection prevents startup into an excessive load.
At the beginning of the cycle, the p-channel FET between
the LX and OUT pins turns on with its current limited to
approximately 100mA, the short-circuit output current.
When VOUT approaches VIN (still below 1.7V), the n-channel
current limit is set to 350mA (the p-channel limit is disabled), an internal oscillator turns on (approximately
200kHz), and a fixed 75% duty cycle PWM-type operation
begins. When the output voltage exceeds 1.7V, fixed frequency PSAVE operation begins, with the duty cycle determined by an n-channel FET peak current limit of 350mA.
Note that startup with a regulated active load is not the
same as startup with a resistive load. The resistive load
output current increases proportionately as the output
voltage rises until it reaches VOUT/RLOAD, while a regulated
active load presents a constant load as the output voltage
rises from 0V to VOUT. Note also that if the load applied to
the output exceeds the startup current limit, the criterion
to advance to the next startup stage may not be achieved.
In this situation startup may pause at a reduced output
voltage until the load is reduced further.
Output Overload and Recovery
As the output load increases, the duration of each burst
increases, and the time between bursts decreases. The
output load reaches its maximum when the burst duration becomes indefinite (and the time between bursts
becomes zero). At this time, all the energy stored in the
inductor during the on-time portion of each burst cycle is
discharged into the output during off-time. The inductor
current reduces to zero just as the next on-time begins.
Above this critical maximum load, the output voltage will
decrease rapidly, and the startup current and switching
limits will be invoked in reverse order as the output
voltage falls through its various startup voltage thresholds. How far the output voltage drops depends on the
load voltage vs. current characteristic.
A reduction in input voltage, such as a discharging
battery, will lower the load current at which overload
occurs. At the overload threshold, the energy stored in
the inductor at the end of each on-time is the same for all
VIN. But since the voltage increase above the input voltage
is greater, the available output current, IOUT = P/(VOUT - VIN),
must decrease.
When an overload has occurred, the load must be
decreased to permit recovery. The conditions required
for overload recovery are identical to those required for
successful initial startup.
Anti-ringing Circuitry
When both FET switches are simultaneously turned off,
an internal switch between the IN and LX pins is closed.
This provides a moderate resistance path across the
inductor to dampen the oscillations at the LX pin. This
effectively reduces EMI that can develop from the resonant circuit formed by the inductor and the drain capacitance at LX. The anti-ringing circuitry is disabled between
PSAVE bursts.
Inductor Selection
The inductance value primarily affects the amplitude of
inductor current ripple (ΔIL). The inductor peak current
IL-max = IL-avg + ΔIL/2, where IL-avg is the inductor current averaged over a full on/off cycle, is subject to the n-channel
FET peak current limit ILIM(N). The inductor average current
is equal to the output load current. Increasing inductance
reduces ΔIL and therefore increases the maximum supportable output current.
The performance plots of this datasheet were obtained
with L = 4.7μH. Larger values of inductance can provide
higher maximum output currents.
Any chosen inductor should have low DCR, compared to
the RDS-ON of the FET switches, to maintain efficiency. For
DCR << RDS-ON, further reduction in DCR will provide
diminishing benefit. The inductor ISAT value must exceed
ILIM(N). The inductor self-resonant frequency should exceed
10
SC122
Applications Information (continued)
5×fosc. Any inductor with these properties should provide
satisfactory performance.
The following table lists the manufacturers of recommended inductor options.
Manufacturer/
Part #
Value
(μH)
DCR
(mΩ)
Rated
Current
(mA)
Tolerance
(%)
Dimensions
L×W×H
(mm)
Sumida 5508472xxxx
4.7
3800
90
2/5/10/20
2.2 × 1.4 × 1.6
Murata
LQM31PN4R7M00L
4.7
300
700
20
3.2 × 1.6 × 0.85
PCB Layout Considerations
Good layout can enhance the performance of the DC-DC
converter and can avoid EMI problems, ground bounce,
and resistive voltage losses. The recommended layout is
shown in Figure 2.
The following simple design rules can be implemented to
ensure good layout:
•
•
Capacitor Selection
Low ESR capacitors such as X5R or X7R type ceramic
capacitors are recommended for input bypassing and
output filtering. Low-ESR tantalum capacitors are not recommended due to possible reduction in capacitance seen
at the switching frequency of the SC122. Ceramic capacitors of type Y5V are not recommended as their temperature coefficients make them unsuitable for this
application.
•
Place the inductor and filter capacitors as close
to the device as possible and use short wide
traces between the power components.
Maximize ground metal on the component side
to improve the return connection and thermal
dissipation. Separation between the LX node
and GND should be maintained to avoid coupling capacitance between the LX node and the
ground plane.
Use a ground plane with several vias connecting
to the component side ground to further reduce
noise interference on sensitive circuit nodes.
6.7mm
The input and output each require a minimum capacitance value of 10μF at the programmed output voltage.
This must be considered when choosing small package
size capacitors as the DC bias must be included in their
derating to ensure this required value. For example, a
10μF 0805 capacitor may provide sufficient capacitance at
low output voltages but may be too low at higher output
voltages. Therefore, a higher nominal capacitance value
may be required to provide the minimum of 10μF at these
higher output voltages. Additional output capacitance
can be used extend the time between bursts, or to improve
load transient response. The following table lists recommended capacitors.
Manufacturer/
Part Number
Value
(μF)
Rated Voltage
(VDC)
Type
Case
Size
Murata
GRM21BR60J226ME39B
22
6.3
X5R
0805
Murata
GRM31CR71A226KE15L
22
10
X7R
1206
COUT
LX
GND
LX
VOUT
OUT
SC122
IN
5.2mm
GND
EN
CIN
GND
Figure 2 — Recommended Layout
11
SC122
Outline Drawing — MLPD-UT-6 1.5x2
A
DIMENSIONS
B
D
DIM
A
A1
A2
b
D
D1
E
E1
e
E
PIN 1
INDICATOR
(LASER MARK)
A2
A
SEATING
PLANE
aaa C
C
L
N
aaa
bbb
INCHES
MIN
.020
.000
.007
.055
.035
.075
.026
NOM
(.006)
.010
.059
-
MILLIMETERS
MAX
MIN
.024
.002
0.50
0.00
.012
.063
.055
.083
.035
0.18
1.40
0.90
1.90
0.65
.079
.031
.020 BSC
.012
.014
.016
6
.003
.004
NOM
(.152)
0.25
1.50
-
MAX
0.60
0.05
0.30
1.60
1.40
2.10
0.90
2.00
0.80
0.50 BSC
0.30
0.35
0.40
6
0.08
0.10
A1
D1
2
1
LxN
E1
N
bxN
e
bbb
C A B
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS TERMINALS.
12
SC122
Land Pattern — MLPD-UT-6 1.5x2
H
R
DIMENSIONS
DIM
INCHES
Z
(C)
G
K
Y
P
MILLIMETERS
C
(.077)
(1.95)
G
.047
1.20
H
.051
1.30
K
.031
0.80
P
.020
0.50
R
.006
0.15
X
.012
0.30
Y
.030
0.75
Z
.106
2.70
X
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.
FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111 Fax: (805) 498-3804
www.semtech.com
13