Si8407DB Vishay Siliconix P-Channel 20-V (D-S) MOSFET FEATURES PRODUCT SUMMARY VDS (V) −20 rDS(on) (W) ID (A) 0.027 @ VGS = −4.5 V −8.2 0.032 @ VGS = −2.5 V −7.5 0.045 @ VGS = −1.8 V −6.6 D TrenchFETr Power MOSFET D New MICRO FOOTr Chipscale Packaging Provides Ultra-Low Footprint Area Profile (0.62 mm) and On-Resistance APPLICATIONS D Portable Devices − PA Switch − Battery Switch − Load Switch MICRO FOOT Bump Side View 5 S S S Backside View 4 G 6 G S 3 1 D D 2 Device Marking: 8407 xxx = Date/Lot Traceability Code Ordering Information: Si8407DB-T2 Si8407DB-T2—E1 (Lead (Pb)-Free) D P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED) Parameter Symbol 5 secs Steady State Drain-Source Voltage VDS −20 Gate-Source Voltage VGS "8 Continuous Drain Current (TJ = 150_C)a TA = 25_C TA = 70_C Pulsed Drain Current ID continuous Source Current (Diode Conduction)a IS TA = 25_C Maximum Power Dissipationa TA = 70_C Operating Junction and Storage Temperature Range Package Reflow Conditionsb PD V −8.2 −5.8 −6.5 −4.6 IDM −15 −2.6 −1.34 2.9 1.47 1.86 0.94 TJ, Tstg −55 to 150 VPR 215 IR/Convection 220 Unit A W _C _C THERMAL RESISTANCE RATINGS Parameter M i Maximum JJunction-to-Ambient ti t A bi ta Maximum Junction-to-Foot (drain) Symbol t v 5 sec Steady State Steady State RthJA RthJF Typical Maximum 33 43 72 85 15 19 Unit _C/W C/W Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Refer to IPC/JEDEC (J-STD-020A), no manual or hand soldering. Document Number: 72254 S-50066—Rev. B, 17-Jan-05 www.vishay.com 1 Si8407DB Vishay Siliconix SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED) Parameter Symbol Test Condition Min VGS(th) VDS = VGS, ID = −350 mA −0.4 Typ Max Unit −0.9 V "100 nA Static Gate Threshold Voltage Gate-Body Leakage IGSS Zero Gate Voltage Drain Current IDSS On-State Drain Currenta ID(on) Drain-Source On-State Resistancea VDS = 0 V, VGS = "8 V Diode Forward Voltagea −1 −5 VDS v −5 V, VGS = −4.5 V rDS(on) Forward Transconductancea VDS = −20 V, VGS = 0 V VDS = −20 V, VGS = 0 V, TJ = 70_C −5 mA A VGS = −4.5 V, ID = −1 A 0.022 0.027 VGS = −2.5 V, ID = −1 A 0.026 0.032 VGS = −1.8 V, ID = −1 A 0.033 0.045 gfs VDS = −10 V, ID = −1 A 10 VSD IS = −1 A, VGS = 0 V −0.6 −1.1 32 50 VDS = −10 V,, VGS = −4.5 V,, ID = −1 A 3.6 W S V Dynamicb Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd 8.5 Turn-On Delay Time td(on) 30 Rise Time tr Turn-Off Delay Time VDD = −10 V, RL = 10 W ID ^ −1 A, VGEN = −4.5 V, Rg = 6 W td(off) Fall Time tf Source-Drain Reverse Recovery Time trr IF = −1 A, di/dt = 100 A/ms nC 45 45 70 550 825 220 330 265 500 ns Notes a. Pulse test; pulse width v 300 ms, duty cycle v 2%. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Output Characteristics Transfer Characteristics 15 15 VGS = 4.5 thru 2 V 12 12 I D − Drain Current (A) I D − Drain Current (A) 1.5 V 9 6 3 9 6 TC = 125_C 3 25_C 1V 0 0.0 0.5 1.0 1.5 2.0 2.5 VDS − Drain-to-Source Voltage (V) www.vishay.com 2 −55_C 3.0 0 0.0 0.5 1.0 1.5 2.0 VGS − Gate-to-Source Voltage (V) Document Number: 72254 S-50066—Rev. B, 17-Jan-05 Si8407DB Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) On-Resistance vs. Drain Current Capacitance 2500 0.05 Ciss 2000 0.04 C − Capacitance (pF) r DS(on) − On-Resistance ( W ) 0.06 VGS = 1.8 V VGS = 2.5 V 0.03 0.02 VGS = 4.5 V 1500 1000 Coss 500 0.01 Crss 0.00 0 0 4 8 12 16 20 0 4 Gate Charge rDS(on) − On-Resiistance (Normalized) V GS − Gate-to-Source Voltage (V) 20 VGS = 4.5 V ID = 1 A 1.4 3 2 1 1.2 1.0 0.8 0 0 5 10 15 20 25 30 0.6 −50 35 −25 0 Qg − Total Gate Charge (nC) Source-Drain Diode Forward Voltage 50 75 100 125 150 On-Resistance vs. Gate-to-Source Voltage 0.10 r DS(on) − On-Resistance ( W ) 10 TJ = 150_C TJ = 25_C 1 0.0 25 TJ − Junction Temperature (_C) 20 I S − Source Current (A) 16 On-Resistance vs. Junction Temperature 1.6 VDS = 10 V ID = 1 A 4 12 VDS − Drain-to-Source Voltage (V) ID − Drain Current (A) 5 8 0.08 ID = 1 A 0.06 0.04 0.02 0.00 0.3 0.6 0.9 1.2 VSD − Source-to-Drain Voltage (V) Document Number: 72254 S-50066—Rev. B, 17-Jan-05 1.5 0 1 2 3 4 5 VGS − Gate-to-Source Voltage (V) www.vishay.com 3 Si8407DB Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Threshold Voltage Single Pulse Power, Juncion-To-Ambient 0.6 60 ID = 350 mA 50 Power (W) V GS(th) Variance (V) 0.4 0.2 0.0 40 30 20 −0.2 10 −0.4 −50 −25 0 25 50 75 100 125 0 150 0.001 0.01 TJ − Temperature (_C) 0.1 1 10 Time (sec) 100 Safe Operating Area * rDS(on) Limited 10 ms, 100 ms I D − Drain Current (A) 10 1 ms 1 0.1 10 ms TA = 25_C Single Pulse 100 ms 1s 10 s 100 s, dc 0.01 0.1 Normalized Thermal Transient Impedance, Junction-to-Ambient 2 Normalized Effective Transient Thermal Impedance 1 10 100 VDS − Drain-to-Source Voltage (V) *VGS u minimum VGS at which rDS(on) is specified 1 Duty Cycle = 0.5 0.2 Notes: 0.1 PDM 0.1 0.05 t1 t2 1. Duty Cycle, D = 0.02 t1 t2 2. Per Unit Base = RthJA = 72_C/W 3. TJM − TA = PDMZthJA(t) Single Pulse 4. Surface Mounted 0.01 10−4 www.vishay.com 4 10−3 10−2 10−1 1 Square Wave Pulse Duration (sec) 10 100 600 Document Number: 72254 S-50066—Rev. B, 17-Jan-05 Si8407DB Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Normalized Thermal Transient Impedance, Junction-to-Foot Normalized Effective Transient Thermal Impedance 2 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10−4 Document Number: 72254 S-50066—Rev. B, 17-Jan-05 10−3 10−2 10−1 Square Wave Pulse Duration (sec) 1 10 www.vishay.com 5 Si8407DB Vishay Siliconix PACKAGE OUTLINE MICRO FOOT: 6-BUMP (2.4 X 2.0, 8-mm PITCH) e e e Recommended Land Backside Labels D S1 e s R e Q 6 Bumps (Note 2) Bump Diameter: f0.38 − 0.40 mm Note 3 A2 NOTES (Unless Otherwise Specified): E e P A1 1 A 2 PAD DISTRIBUTION TABLE 1. All dimensions are in millimeters. 2. Six (6) solder bumps are Eutectic solder 63/37Pb with diameter f0.38 − 0.40 mm. 3. Backside surface is coated with a Ti/Nl/Ag layer. 4. Non-solder mask defined copper landing pad. 5. The flat side of wafers is oriented at the bottom. 6. D is location of Pin 1P. P MILLIMETERS* Q R 1 Drain Gate Source 2 Drain Source Source INCHES Dim Min Max Min Max 0.0256 A 0.600 0.650 0.0236 A1 0.260 0.290 0.0102 0.0114 A2 0.340 0.360 0.0134 0.0142 b 0.370 0.410 0.0146 0.0161 D 1.920 2.000 0.0756 0.0787 E 2.320 2.400 0.0913 0.0945 e 0.750 0.850 0.0295 0.0335 S 0.370 0.400 0.0150 0.0157 S1 0.580 0.600 0.0228 0.0236 * Use millimeters as the primary measurement. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?72254. www.vishay.com 6 Document Number: 72254 S-50066—Rev. B, 17-Jan-05