SN10KHT5541 OCTAL ECL-TO-TTL TRANSLATOR WITH 3-STATE OUTPUTS SDZS003A – OCTOBER 1989 – REVISED OCTOBER 1990 • • • • • • DW OR NT PACKAGE 10KH Compatible (T0P VIEW) ECL and TTL Control Inputs Y1 Y2 Y3 Y4 1 24 2 23 3 22 4 21 VCC GND GND GND Y5 Y6 Y7 Y8 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 Noninverting Outputs Flow-Through Architecture Optimizes PCB Layout Center Pin VCC, VEE, and GND Configurations Minimize High-Speed Switching Noise Package Options Include “Small Outline” Packages and Standard Plastic 300-mil DIPs A1 A2 A3 A4 OE2 (TTL) VEE GND OE1 (ECL) A5 A6 A7 A8 description This octal ECL-to-TTL translator is designed to provide a efficient translation between a 10KH ECL signal environment and a TTL signal environment. This device is designed specifically to improve the performance and density of ECL-to-TTL CPU/bus-oriented functions such as memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. Two output-enable pins, OE1 and OE2, are provided. These control inputs are ANDed together with OE1 being ECL compatible and OE2 being TTL compatible. This offers the choice of controlling the outputs of the device from either a TTL or ECL signal environment. The SN10KHT5541 is characterized for operation from 0°C to 75°C. logic symbol† OE1 OE2 17 ECL/TTL & EN 20 A1 24 23 A2 22 A3 21 A4 16 A5 15 A6 14 A7 13 A8 ECL/TTL 1 Y1 2 Y2 3 Y3 4 Y4 9 Y5 10 Y6 11 Y7 12 Y8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. FUNCTION TABLE OUTPUT DATA OUTPUT ENABLE INPUT (TTL) OE1 OE2 A Y X H X Z H X X Z L L L L L L H H Copyright 1990, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN10KHT5541 OCTAL ECL-TO-TTL TRANSLATOR WITH 3-STATE OUTPUTS SDZS003A – OCTOBER 1989 – REVISED OCTOBER 1990 logic diagram (positive logic) A1 24 23 A2 A3 A4 OE1 (ECL) 22 21 17 ECL/TTL ECL/TTL ECL/TTL ECL/TTL 1 Y1 2 3 4 Y2 Y3 Y4 ECL/TTL 20 OE2 (TTL) A5 16 15 A6 A7 A8 2 14 13 ECL/TTL ECL/TTL ECL/TTL ECL/TTL POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 10 11 12 Y5 Y6 Y7 Y8 SN10KHT5541 OCTAL ECL-TO-TTL TRANSLATOR WITH 3-STATE OUTPUTS SDZS003A – OCTOBER 1989 – REVISED OCTOBER 1990 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Supply voltage, VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 8 V to 0 V Input voltage (TTL) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V Input voltage (ECL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VEE to 0 V Voltage applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 5.5 V Voltage applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC Input current (TTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 75°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The TTL input voltage ratings may be exceeded provided the input current ratings are observed. recommended operating conditions MIN NOM MAX VCC VEE TTL supply voltage 4.5 5 5.5 V ECL supply voltage – 4.94 – 5.2 – 5.46 V VIH VIL TTL high-level input voltage VIH‡ VIL‡ IIK IOH 2 TTL low-level input voltage V 0.8 ECL high-level input voltage ECL low-level input voltage UNIT TA = 0°C TA = 25°C – 1170 – 840 – 1130 – 810 TA = 75°C TA = 0°C – 1070 – 735 – 1950 – 1480 TA = 25°C TA = 75°C – 1950 – 1480 – 1950 – 1450 V mV mV TTL input clamp current – 18 mA High-level output current – 15 mA IOL Low-level output current 48 mA TA Operating free-air temperature 0 75 °C ‡ The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic levels only. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN10KHT5541 OCTAL ECL-TO-TTL TRANSLATOR WITH 3-STATE OUTPUTS SDZS003A – OCTOBER 1989 – REVISED OCTOBER 1990 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK II OE2 only IIH IIL OE2 only IIH IIL TEST CONDITIONS MIN TYP† MAX UNIT – 1.2 V VCC = 4.5 V, VCC = 5.5 V, VEE = – 4.94 V, VEE = – 5.46 V, II = – 18 mA VI = 7 V OE2 only VCC = 5.5 V, VCC = 5.5 V, VEE = – 5.46 V, VEE = – 5.46 V, VI = 2.7 V VI = 0.5 V VCC = 5.5 V, VCC = 5.5 V, VEE = – 5.46 V, VEE = – 5.46 V, VI = – 840 mV VI = – 810 mV TA = 0°C TA = 25°C 350 Data inputs and OE1 VCC = 5.5 V, VEE = – 5.46 V, VI = – 735 mV TA = 75°C TA = 0°C 350 VCC = 5.5 V, VEE = – 5.46 V, VI = – 1950 mV TA = 25°C TA = 75°C OE2 only Data inputs and OE1 0.1 VOH VCC = 4.5 V, VCC = 4.5 V, VEE = – 5.2 V ± 5%, VEE = – 5.2 V ± 5%, IOH = – 3 mA IOH = – 15 mA VOL IOZH VCC = 4.5 V, VCC = 5.5 V, VEE = – 5.2 V ± 5%, VEE = – 5.46 V, IOL = 48 mA VO = 2.7 V IOZL IOS‡ VCC = 5.5 V, VCC = 5.5 V, VEE = – 5.46 V, VEE = – 5.46 V, VO = 0.5 V VO = 0 ICCH ICCL VCC = 5.5 V, VCC = 5.5 V, VEE = – 5.46 V VEE = – 5.46 V ICCZ IEE VCC = 5.5 V, VCC = 5.5 V, VEE = – 5.46 V VEE = – 5.46 V Ci VCC = 5 V, VCC = 5 V, VEE = – 5.2 V VEE = – 5.2 V mA 20 µA – 0.5 mA 350 µA 0.5 µA 0.5 0.5 2.4 3.3 2 3.1 0.38 0.55 V 50 µA – 50 µA – 225 mA 64 97 mA 80 120 mA 77 116 mA – 22 – 33 mA – 100 Co † All typical values are at VCC = 5 V, VEE = – 5.2 V, TA = 25°C. ‡ Not more than one output should be tested at a time and the duration of the test should not exceed 10 ms. V 5 pF 7 pF switching characteristics over recommended ranges of operating free-air temperature and supply voltage (see Figure 1) FROM TO (INPUT) (OUTPUT) tPLH tPHL A Y tPZH tPZL OE1 Y tPHZ tPLZ OE1 Y tPZH tPZL OE2 Y tPHZ tPLZ OE2 Y PARAMETER § All typical values are at VCC = 5 V, VEE = – 5.2 V, TA = 25°C. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω MIN TYP§ MAX 1.7 4 6.2 1.6 4 6.2 2.6 4.7 6.7 3.2 5.9 8.5 2.9 5.4 7.8 1.9 4.9 7.8 1.7 4 6.2 2.5 5.1 7.7 2.1 4.3 6.4 1.1 3.7 6.3 UNIT ns ns ns ns ns SN10KHT5541 OCTAL ECL-TO-TTL TRANSLATOR WITH 3-STATE OUTPUTS SDZS003A – OCTOBER 1989 – REVISED OCTOBER 1990 PARAMETER MEASUREMENT INFORMATION 7V Open S1 SWITCH POSITION TABLE R1 From Output Under Test CL (See Note A) S1 Open Open Open Closed Open Closed TEST tPLH tPHL tPZH tPZL tPHZ tPLZ Test Point R2 LOAD CIRCUIT tr ECL Input (See Note B) tf 80% 50% – 890 mV 80% 50% 20% 20% – 1690 mV tPHL tPLH VOH In-Phase TTL Output 1.5 V 1.5 V VOL ECL- INPUT PROPAGATION DELAY TIMES – 890 mV ECL Output Control (Low-level enabling (See Note B) 50% 50% –1690 mV tPZL Output Waveform 1 (See Note D) tPLZ Output Waveform 2 (See Note D) 1.5 V 1.5 V 0 tPLZ 3.5 V 50% VOL +0.3VV OL 3.5 V Output Waveform 1 (See Note D) 50% VOL +0.3 V VOL tPZH tPHZ tPZH 3V Output Control (Low-level enabling) (See Note B) tPZL VOH VOH –0.3 V 50% Output Waveform 2 (See Note D) tPHZ 50% VOH VOH –0.3 V 0 0 TTL ENABLE AND DISABLE TIMES ECL ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. For TTL inputs, input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. C. For ECL inputs, input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 0.7 ns, tf ≤ 0.7 ns. D. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. E. The outputs are measured one at a time with one transition per measurement. FIGURE 1. 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