SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 3.3-V CAN TRANSCEIVER Check for Samples: SN65HVD233-HT FEATURES 1 • • 2 • • • • • (1) The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). APPLICATIONS • • • • • • • • • • • Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Extreme (–55°C/210°C) Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability Texas Instruments high temperature products utilize highly optimized silicon (die) solutions with design and process enhancements to maximize performance over extended temperatures. 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 • • • • • • Bus-Pin Fault Protection Exceeds ±36 V Bus-Pin ESD Protection Exceeds 16-kV Human Body Model (HBM) Compatible With ISO 11898 Signaling Rates(1) up to 1 Mbps Extended –7-V to 12-V Common-Mode Range High-Input Impedance Allows for 120 Nodes LVTTL I/Os Are 5-V Tolerant Adjustable Driver Transition Times for Improved Signal Quality Unpowered Node Does Not Disturb the Bus Low-Current Standby Mode . . . 200 μA Typical Power-Up/Down Glitch-Free Bus Inputs and Outputs – High Input Impedance With Low VCC – Monolithic Output During Power Cycling Loopback for Diagnostic Functions Available DeviceNet™ Vendor ID #806 SUPPORTS EXTREME TEMPERATURE APPLICATIONS Down-Hole Drilling High Temperature Environments Industrial Automation – DeviceNet™ Data Buses – Smart Distributed Systems (SDS™) SAE J1939 Data Bus Interface NMEA 2000 Data Bus Interface ISO 11783 Data Bus Interface CAN Data Bus Interface XXX • • • • DESCRIPTION/ORDERING INFORMATION The SN65HVD233 is used in applications employing the controller area network (CAN) serial communication physical layer in accordance with the ISO 11898 standard, with the exception that the thermal shutdown is removed. As a CAN transceiver, the device provides transmit and receive capability between the differential CAN bus and a CAN controller, with signaling rates up to 1 Mbps. Designed for operation in especially harsh environments, the device features cross wire, overvoltage, and loss-of-ground protection to ±36 V, with common-mode transient protection of ±100 V. This device operates over a –7-V to 12-V commonmode range with a maximum of 60 nodes on a bus. If the common-mode range is restricted to the ISO 11898 standard range of –2 V to 7 V, up to 120 nodes may be connected on a bus. This transceiver interfaces the single-ended CAN controller with the differential CAN bus found in industrial, building automation, and automotive applications. (1) Custom temperature ranges available 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DeviceNet is a trademark of Open DeviceNet Vendor Association. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008–2012, Texas Instruments Incorporated SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DESCRIPTION/ORDERING INFORMATION (CONTINUED) 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 RS (pin 8) provides for three modes of operation: high-speed, slope control, or low-power standby mode. The high-speed mode of operation is selected by connecting RS directly to ground, allowing the driver output transistors to switch on and off as fast as possible with no limitation on the rise and fall slope. The rise and fall slope can be adjusted by connecting a resistor to ground at RS, since the slope is proportional to the pin's output current. Slope control is implemented with a resistor value of 10 kΩ to achieve a slew rate of ≉ 15 V/μs, and a value of 100 kΩ to achieve ≉ 2.0 V/μs slew rate. For more information about slope control, refer to the application information section. The SN65HVD233 enters a low-current standby mode, during which the driver is switched off and the receiver remains active if a high logic level is applied to RS. The local protocol controller reverses this low-current standby mode when it needs to transmit to the bus. A logic high on the loopback (LBK, pin 5) of the SN65HVD233 places the bus output and bus input in a highimpedance state. The remaining circuit remains active and available for the driver to receiver loopback, selfdiagnostic node functions without disturbing the bus. AVAILABLE OPTIONS PART NUMBER LOW-POWER MODE SLOPE CONTROL DIAGNOSTIC LOOPBACK AUTOBAUD LOOPBACK SN65HVD233HD 200-μA standby mode Adjustable Yes No SN65HVD233SJD 200-μA standby mode Adjustable Yes No SN65HVD233SKGDA 200-μA standby mode Adjustable Yes No SN65HVD233SHKJ 200-μA standby mode Adjustable Yes No SN65HVD233SHKQ 200-μA standby mode Adjustable Yes No ORDERING INFORMATION (1) TA –55°C to 175°C –55°C to 210°C (1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING D SN65HVD233HD 233S KGD SN65HVD233SKGDA N/A PACKAGE (2) HKJ SN65HVD233SHKJ SN65HVD233SHKJ HKQ SN65HVD233SHKQ SN65HVD233SHKQ JD SN65HVD233SJD SN65HVD233SJD For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. FUNCTIONAL BLOCK DIAGRAM RS 8 D R 7 1 6 CANH CANL 4 5 LBK 2 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 BARE DIE INFORMATION DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION COMPOSITION 15 mils. Silicon with backgrind GND Al-Si-Cu (0.5%) Origin a c 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 b d Table 1. Bond Pad Coordinates in Microns - Rev A DISCRIPTION PAD NUMBER a b c d D 1 86.40 157.85 203.40 274.85 GND 2 1035.05 69.75 1150.05 184.75 GND 3 1168.15 69.75 1283.15 184.75 VCC 4 1572.05 51.85 1687.05 166.85 VCC 5 1711.95 51.85 1826.95 166.85 R 6 2758.85 237.65 2873.85 352.65 LBK 7 2774.25 1429.985 2889.25 1544.95 CANL 8 1549.90 1544.95 1664.90 1659.95 CANH 9 1351.45 1544.95 1466.45 1659.95 RS 10 83.50 1429.95 198.50 1544.95 Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 3 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 4 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 DEVICE INFORMATION HKQ PACKAGE (TOP VIEW) D, JD OR HKJ PACKAGE (TOP VIEW) D GND VCC R 1 8 2 7 3 6 4 5 1 8 RS RS CANH CANL LBK D CANH GND CANL VCC LBK 5 R 4 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 HKQ as formed or HKJ mounted dead bug EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS RS INPUT D INPUT CANH INPUT VCC VCC 110 kΩ 100 kΩ 1 kΩ INPUT 45 kΩ 9 kΩ INPUT CANH and CANL OUTPUTS VCC VCC 110 kΩ 40 V + _ CANL INPUT R OUTPUT VCC 9 kΩ 45 kΩ 40 V 9 kΩ INPUT 9V INPUT VCC 5Ω OUTPUT OUTPUT 9 kΩ 40 V 9V LBK INPUT VCC 1 kΩ INPUT 9V 100 kΩ Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 5 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com FUNCTION TABLES (1) (1) H = high level, L = low level, Z = high impedance, X = irrelevant, ? = indeterminate DRIVER INPUTS OUTPUTS D LBK Rs CANH CANL BUS STATE X X >0.75 VCC Z Z Recessive L L or open H L Dominant H or open X Z Z Recessive X H Z Z Recessive ≤0.33 VCC 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 ≤0.33 VCC RECEIVER INPUTS OUTPUT BUS STATE VID = V(CANH) – V(CANL) LBK D Dominant VID ≥ 0.9 V L or open X L Recessive VID ≤ 0.5 V or open L or open H or open H L or open H or open ? ? 0.5 V < VID < 0.9 V X X X X ABSOLUTE MAXIMUM RATINGS (1) H R L L H H (2) over operating free-air temperature range (unless otherwise noted) VCC VALUE UNIT Supply voltage range –0.3 to 7 V Voltage range at any bus terminal (CANH or CANL) –36 to 36 V –100 to 100 V –0.5 to 7 V –10 to 10 mA Voltage input range, transient pulse (CANH and CANL) through 100 Ω (see Figure 8) VI Input voltage range (D, R, RS, LBK) IO Receiver output current Electrostatic discharge Human-Body Model (HBM) (3) Charged-Device Mode (CDM) (1) (2) (3) (4) 6 (4) CANH, CANL, and GND 16 All pins 3 All pins 1 kV Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. Tested in accordance with JEDEC Standard 22, Test Method A114-A. Tested in accordance with JEDEC Standard 22, Test Method C101. Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 THERMAL CHARACTERISTICS FOR D PACKAGE over operating free-air temperature range (unless otherwise noted) PARAMETER θJC MIN TYP Junction-to-case thermal resistance (to bottom of case) MAX 49 UNIT °C/W THERMAL CHARACTERISTICS FOR JD PACKAGE over operating free-air temperature range unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT θJA Junction-to-ambient thermal resistance (1) Low-K (2) board, no air flow High-K (3) board, no air flow 64.9 θJB Junction-to-board thermal resistance High-K (3) board, no air flow 27.9 °C/W θJC Junction-to-case thermal resistance 6.49 °C/W 114 mW 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 RL = 60 Ω, RS = 0 V, input to D a 1-MHz 50% duty cycle square wave, VCC = 3.3 V, TA = 25°C P(AVG) Average power dissipation (1) (2) (3) 83.4 °C/W See TI literature number SZZA003 for an explanation of this parameter. JESD51-3 low effective thermal conductivity test board for leaded surface-mount packages. JESD51-7 high effective thermal conductivity test board for leaded surface-mount packages. THERMAL CHARACTERISTICS FOR HKJ OR HKQ PACKAGE over operating free-air temperature range (unless otherwise noted) PARAMETER θJC MIN TYP MAX to ceramic side of case Junction-to-case thermal resistance to top of case lid (metal side of case) 5.7 13.7 UNIT °C/W RECOMMENDED OPERATING CONDITIONS TA = –55°C to 210°C VCC MIN MAX UNIT Supply voltage 3 3.6 Voltage at any bus terminal (separately or common mode) –7 12 V VIH High-level input voltage D, LBK 2 5.5 V VIL Low-level input voltage D, LBK 0 0.8 V VID Differential input voltage –6 6 V Resistance from RS to ground 0 100 kΩ VI(Rs) Input voltage at RS for standby 0.75 VCC 5.5 V IOH High-level output current IOL Low-level output current TJ Operating junction temperature TA Operating free-air temperature (1) (1) Driver –50 Receiver –10 mA Driver 50 Receiver 10 -55 V mA 212 °C 210 °C Maximum free-air temperature operation is allowed as long as the device maximum junction temperature is not exceeded. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 7 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com DRIVER ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS Bus output voltage (dominant) CANH VO(D) Bus output voltage (recessive) CANH VO VOD(D) Differential output voltage (Dominant) CANL CANL MIN MAX MIN 2.45 VCC 0.5 1.25 D = 3 V, RS = 0 V, See Figure 2 and Figure 3 TYP TYP TA = 210°C (2) MAX MIN TYP 2.45 VCC 2.45 VCC 0.5 1.25 0.5 1.25 2.3 2.3 2.3 2.3 2.3 2.3 MAX UNIT V V D = 0 V, RS = 0 V, See Figure 2 and Figure 3 1.5 2 3 1.4 1.75 3 1.4 1.75 3 D = 0 V, RS = 0 V, See Figure 3 and Figure 4 1.1 2 3 1.1 1.47 3 1.1 1.47 3 D = 3 V, RS = 0 V, See Figure 2 and Figure 3 –120 12 –120 12 –120 12 mV D = 3 V, RS = 0 V, No load –0.5 0.05 –0.5 0.8 –0.5 1.2 V 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Differential output voltage (Recessive) VOD D = 0 V, RS = 0 V, See Figure 2 and Figure 3 TA = 175°C (1) TA = –55°C to 125°C V VOC(pp) Peak-to-peak common-mode output voltage See Figure 10 IIH High-level D, LBK input current D=2V –30 30 –30 30 –30 30 μA IIL Low-level D, LBK input current D = 0.8 V –30 30 –30 30 –30 30 μA VCANH = –7 V, CANL open, See Figure 13 –250 Short-circuit output current IOS 1 –250 VCANH = 12 V, CANL open, See Figure 13 VCANL = –7 V, CANH open, See Figure 13 –1 Output capacitance See receiver input capacitance IIRs(s) RS input current for standby RS = 0.75 VCC (1) (2) 8 Supply current 1 –1 –10 V 1 mA –1 250 CO 1 –250 1 VCANL = 12 V, CANH open, See Figure 13 ICC 1 250 –10 250 μA –10 Standby RS = VCC, D = VCC, LBK = 0 V Dominant D = 0 V, No load, LBK = 0 V, RS = 0 V 6 6 6 Recessive D =t VCC, No load, LBK = 0 V, RS = 0 V 6 6 6 200 600 400 600 400 600 μA mA Minimum and maximum parameters are characterized for operation at TA = 175°C and production tested at TA = 125°C. Minimum and maximum parameters are characterized for operation at TA = 210°C but may not be production tested at that temperature. Production test limits with statistical guardbands are used to ensure high temperature performance. Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 DRIVER SWITCHING CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER Propagation delay time, low-to-high-level output tPLH tsk(p) Pulse skew (|tPHL – tPLH|) Differential output signal rise time tr tf Differential output signal fall time tr Differential output signal rise time tf Differential output signal fall time tr Differential output signal rise time tf Differential output signal fall time ten(s) Enable time from standby to dominant (1) (2) TA = 175°C (1) TA = –55°C to 125°C MIN MIN TYP MAX TA = 210°C (2) TYP MAX MIN TYP RS = 0 V, See Figure 5 35 85 50 50 RS with 10 kΩ to ground, See Figure 5 70 125 75 75 RS with 100 kΩ to ground, See Figure 5 500 870 500 500 RS = 0 V, See Figure 5 70 120 70 70 RS with 10 kΩ to ground, See Figure 5 130 180 130 130 RS with 100 kΩ to ground, See Figure 5 870 1200 870 870 RS = 0 V, See Figure 5 35 9 9 RS with 10 kΩ to ground, See Figure 5 60 35 35 RS with 100 kΩ to ground, See Figure 5 370 475 475 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Propagation delay time, high-to-low-level output tPHL TEST CONDITIONS MAX ns ns ns 20 70 20 75 20 75 18 70 20 75 20 75 30 135 30 140 30 140 30 135 30 140 30 140 250 1400 250 1400 250 1400 350 1400 350 1400 350 1400 RS = 0 V, See Figure 5 RS with 10 kΩ to ground, See Figure 5 RS with 100 kΩ to ground, See Figure 5 See Figure 9 0.6 1.5 0.6 1.5 UNIT ns ns ns 0.6 1.5 μs Minimum and maximum parameters are characterized for operation at TA = 210°C but not production tested at TA = 175°C or 210°C. Minimum and maximum parameters are characterized for operation at TA = 210°C but may not be production tested at that temperature. Production test limits with statistical guardbands are used to ensure high temperature performance. RECEIVER ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER VIT+ Positive-going input threshold voltage VIT– Negative-going input threshold voltage Vhys Hysteresis voltage (VIT+ – VIT–) VOH High-level output voltage (1) (2) TEST CONDITIONS LBK = 0 V, See Table 2 TA = 175°C (1) TA = –55°C to 125°C MIN 500 TYP MAX 620 900 715 MIN 500 100 IO = –4 mA, See Figure 7 2.4 TYP MAX 600 900 725 TA = 210°C (2) MIN 500 140 2.4 TYP MAX 600 900 UNIT mV 725 mV 140 mV 2.4 V Minimum and maximum parameters are characterized for operation at TA = 210°C and are not chacterized or production tested at TA = 175°C. Minimum and maximum parameters are characterized for operation at TA = 210°C but may not be production tested at that temperature. Production test limits with statistical guardbands are used to ensure high temperature performance. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 9 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com RECEIVER ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER VOL Low-level output voltage TEST CONDITIONS TYP CANH or CANL = 12 V, VCC = 0 V Other bus pin = 0 V, D = 3 V, LBK = 0 V, RS = 0 V, MAX MIN TYP 0.4 MAX TA = 210°C (2) MIN TYP 0.4 Bus input current CANH or CANL = –7 V CANH or CANL = –7 V, VCC = 0 V MAX 0.4 140 500 140 500 140 500 200 600 200 700 200 800 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 II MIN IO = 4 mA, See Figure 7 CANH or CANL = 12 V TA = 175°C (1) TA = –55°C to 125°C UNIT V μA –610 –150 –610 –150 –610 –150 –450 –130 –450 –130 –450 –130 CI Input capacitance (CANH or CANL) Pin to ground, VI = 0.4 sin (4E6πt) + 0.5 V, D = 3 V, LBK = 0 V 45 55 55 pF CID Differential input capacitance Pin to pin, VI = 0.4 sin (4E6πt) + 0.5 V, D = 3 V, LBK = 0 V 15 15 15 pF RID Differential input resistance RIN ICC 10 Input resistance (CANH or CANL) Supply current 40 110 40 110 40 110 kΩ 20 51 19 51 18 51 kΩ 600 μA D = 3 V, LBK = 0 V Standby RS = VCC, D = VCC, LBK = 0 V Dominant D = 0 V, No load, RS = 0 V, LBK = 0 V 200 600 6 6 6 Recessive D = VCC, No load, RS = 0 V, LBK = 0 V 6 6 6 Submit Documentation Feedback 400 600 400 mA Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 RECEIVER SWITCHING CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS tPLH Propagation delay time, low-tohigh-level output tPHL Propagation delay time, highto-low-level output MIN TYP MAX 35 35 MIN TYP MAX 60 50 60 45 6.5 6.5 TA = 210°C (2) MIN UNIT TYP MAX 60 50 60 ns 60 45 60 ns 8 6.5 8 ns 9 ns See Figure 7 Pulse skew (|tPHL – tPLH|) 7 tr Output signal rise time 2 tf Output signal fall time 5 5 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 tsk(p) (1) (2) TA = 175°C (1) TA = –55°C to 125°C 2 6.5 6.5 9 ns 6.5 Minimum and maximum parameters are characterized for operation at TA = 210°C but not production tested at TA = 175°C or 210°C. Minimum and maximum parameters are characterized for operation at TA = 210°C but may not be production tested at that temperature. Production test limits with statistical guardbands are used to ensure high temperature performance. DEVICE SWITCHING CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER t(LBK) Loopback delay, driver input to receiver output t(loop1) Total loop delay, driver input to receiver output, recessive to dominant t(loop2) (1) (2) Total loop delay, driver input to receiver output, dominant to recessive TEST CONDITIONS TA = –55°C to 125°C MIN TYP MAX See Figure 12 7.5 TA = 175°C (1) MIN TYP MAX 15 12 TA = 210°C (2) MIN TYP MAX 15 12 15 RS = 0 V, See Figure 11 70 135 90 135 90 135 RS with 10 kΩ to ground, See Figure 11 105 190 115 190 115 190 RS with 100 kΩ to ground, See Figure 11 535 1000 430 1000 430 1000 RS = 0 V, See Figure 11 70 135 98 135 98 135 RS with 10 kΩ to ground, See Figure 11 105 190 150 190 150 190 RS with 100 kΩ to ground, See Figure 11 535 1100 880 1200 880 1200 UNIT ns ns ns Minimum and maximum parameters are characterized for operation at TA = 210°C but not production tested at TA = 175°C or 210°C. Minimum and maximum parameters are characterized for operation at TA = 210°C but may not be production tested at that temperature. Production test limits with statistical guardbands are used to ensure high temperature performance. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 11 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com 1000 Estimated Life (Years) 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 100 Electromigration Fail Mode 10 1 110 130 150 170 190 210 230 Continuous TJ (C) A. See data sheet for absolute maximum and minimum recommended operating conditions. B. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). Figure 1. SN65HVD233HD/SN65HVD233SJD/SN65HVD233SKGDA/SN65HVD233SHKJ/SN65HVD233SHKQ Operating Life Derating Chart 12 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 PARAMETER MEASUREMENT INFORMATION IO(CANH) II D 60 Ω ±1% VO(CANH) VOD VI VO(CANH) + VO(CANL) IIRs RS 2 VOC IO(CANL) + VO(CANL) 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 VI(Rs) - Figure 2. Driver Voltage, Current, and Test Definition Dominant Recessive ≈3V VO(CANH) ≈ 2.3 V ≈1V VO(CANL) Figure 3. Bus Logic State Voltage Definitions VI D CANH 330 Ω ±1% VOD 60 Ω ±1% + _ RS CANL -7 V ≤ VTEST ≤ 12 V 330 Ω ±1% Figure 4. Driver VOD CANH CL = 50 pF ±20% (see Note B) D VI RL = 60 Ω ±1% VCC/2 VI VO tPLH (see Note A) - VO 0V tPHL RS + VI(Rs) VCC VCC/2 VO(D) 90% 0.9 V 10% CANL tr 0.5 V VO(R) tf A. The input pulse is supplied by a generator having the following characteristics: Pulse repetition rate (PRR) ≤ 125 kHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes fixture and instrumentation capacitance. Figure 5. Driver Test Circuit and Voltage Waveforms Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 13 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) CANH R VIC = VI(CANH) VI(CANH + VI(CANL) IO VID 2 VO CANL VI(CANL) 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Figure 6. Receiver Voltage and Current Definitions CANH 2.2 V VI R 1.5 V tPLH CL = 15 pF ±20% (see Note B) CANL 1.5 V IO VI (see Note A) 2.9 V 2.2 V tPHL VO 50% 10% VO 90% 90% tr VOH 50% 10% VOL tf A. The input pulse is supplied by a generator having the following characteristics: Pulse repetition rate (PRR) ≤ 125 kHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes fixture and instrumentation capacitance. Figure 7. Receiver Test Circuit and Voltage Waveforms Table 2. Differential Input Voltage Threshold Test INPUT OUTPUT VCANH VCANL –6.1 V –7 V 12 V 11.1 V L –1 V –7 V L MEASURED R |VID| L 900 mV 900 mV VOL 6V 12 V 6V L 6V –6.5 V –7 V H 500 mV 12 V 11.5 V H 500 mV –7 V –1 V H 6V 12 V H 6V Open Open H X VOH 6V CANH R 100 Ω Pulse Generator 15 µs Duration 1% Duty Cycle tr, tf ≤ 100 ns CANL D at 0 V or V CC Rs, LBK, at 0 V or V CC NOTE: This test is conducted to test survivability only. Data stability at the R output is not specified. Figure 8. Test Circuit, Transient Over Voltage Test 14 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 VI 0V RS VCC CANH D 60 Ω ±1% 50% VI 0V LBK VOH CANL VO R 15 pF ±20% 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 - VOL t en(s) VO + 50% NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 9. ten(s) Test Circuit and Voltage Waveforms 27 Ω ±1% CANH VOC(PP) D VI VOC RS CANL VOC 27 Ω ±1% 50 pF ±20% NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 10. VOC(pp) Test Circuit and Voltage Waveforms 0Ω, 10 kΩ, or 100 kΩ ±5% RS DUT CANH D VI 60 Ω ±1% VI VO VCC 50% LBK t(loop2) CANL VCC 50% VO + - t(loop1) 50% 0V VOH 50% VOL 15 pF ±20% NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 11. t(loop) Test Circuit and Voltage Waveforms Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 15 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 RS + VOD - LBK VCC VCC CANH D VI www.ti.com 50% VI 50% 0V 60 Ω ±1% t(LBK1) CANL t(LBK2) 50% VO R VO + VOL t(LBK) = t(LBK1) = t(LBK2) VOD ≈ 2.3 V 15 pF ±20% 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 - VOH 50% NOTE: All VI input pulses are supplied by agenerator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 12. t(LBK) Test Circuit and Voltage Waveforms IOS IOS D 0 V or VCC 15 s CANH IOS + _ 0V VI 12 V CANL 0V 0V VI 10 µs and VI -7 V Figure 13. IOS Test Circuit and Waveforms 16 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 3.3 V R2 ± 1% R1 ± 1% TA = 25°C VCC = 3.3 V CANH + VID CANL - R R2 ± 1% Vac R1 ± 1% VI 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 The R Output State Does Not Change During Application of the Input Waveform. VID 500 mV 900 mV R1 50 Ω 50 Ω R2 280 Ω 130 Ω 12 V VI -7 V NOTE: All input pulses are supplied by a generator with f ≤ 1.5 MHz. Figure 14. Common-Mode Voltage Rejection Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 17 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS RECESSIVE-TO-DOMINANT LOOP TIME vs FREE-AIR TEMPERATURE 18 17 16 Figure 15. Figure 16. SUPPLY CURRENT vs FREQUENCY DRIVER LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE 160 VCC = 3.3 V, Rs, LBK = 0 V, TA = 25°C, 60- Load VCC = 3.3 V, Rs, LBK = 0 V, TA = 25°C 140 I OL - Driver Output Current - mA I CC - Suppl y Current - mA 19 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 20 DOMINANT-TO-RECESSIVE LOOP TIME vs FREE-AIR TEMPERATURE 120 100 80 60 40 20 15 200 300 500 700 1000 0 0 f - Frequenc y - kbps Figure 17. 18 1 2 3 VOL - Lo w-Level Output Voltage - V 4 Figure 18. Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 TYPICAL CHARACTERISTICS (continued) DRIVER HIGH-LEVEL OUTPUT CURRENT vs HIGH-LEVEL OUTPUT VOLTAGE VCC = 3.3 V, Rs, LBK = 0 V, TA = 25°C 0.1 0.08 0.06 0.04 0.02 0 0 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 I OH - Driver High-Le vel Output Current - mA 0.12 DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 0.5 1 1.5 2 2.5 3 VOH - High-Le vel Output Voltage - V 3.5 Figure 19. Figure 20. RECEIVER LOW-TO-HIGH PROPAGATION DELAY vs FREE-AIR TEMPERATURE RECEIVER HIGH-TO-LOW PROPAGATION DELAY vs FREE-AIR TEMPERATURE Figure 21. Figure 22. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 19 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) DRIVER LOW-TO-HIGH PROPAGATION DELAY vs FREE-AIR TEMPERATURE DRIVER HIGH-TO-LOW PROPAGATION DELAY vs FREE-AIR TEMPERATURE 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Figure 23. Figure 24. DRIVER OUTPUT CURRENT vs SUPPLY VOLTAGE 35 Rs, LBK = 0 V, TA = 25°C, RL = 60 Ω I O - Driver Output Current - mA 30 25 20 15 10 5 0 -5 0 20 0.6 1.2 1.8 2.4 VCC - Supply Voltage - V Figure 25. 3 Submit Documentation Feedback 3.6 Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 APPLICATION INFORMATION Diagnostic Loopback The loopback (LBK) function of the SN65HVD233 is enabled with a high-level input to pin 5. This forces the driver into a recessive state and redirects the data (D) input at pin 1 to the received-data (R) output at pin 4. This allows the host controller to input and read back a bit sequence to perform diagnostic routines without disturbing the CAN bus. A typical CAN bus application is displayed in Figure 26. If the LBK pin is not used, it may be tied to ground (GND). However, it is pulled low internally (defaults to a lowlevel input) and may be left open if not in use. 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 CANH Bus Lines -- 40 m max 120 Ω Stub Lines -- 0.3 m max 120 Ω CANL 5V Vref Vcc 0.1µ F SN65HVD251 Rs 3.3 V Vcc Rs D CANTX 0.1µ F SN65HVD233 GND 3.3 V Vref GND R D LBK CANRX GPIO CANTX Vcc SN65HVD230 Rs 0.1µ F GND R D CANTX CANRX R CANRX TMS320LF243 TMS320F2812 TMS320LF2407A Sensor, Actuator, or Control Equipment Sensor, Actuator, or Control Equipment Sensor, Actuator, or Control Equipment Figure 26. Typical SN65HVD233 Application ISO 11898 Compliance of SN65HVD230 Family of 3.3-V CAN Transceivers Introduction Many users value the low power consumption of operating CAN transceivers from a 3.3-V supply. However, some are concerned about the interoperability with 5-V supplied transceivers on the same bus. This section analyzes this situation to address those concerns. Differential Signal CAN is a differential bus where complementary signals are sent over two wires, and the voltage difference between the two wires defines the logical state of the bus. The differential CAN receiver monitors this voltage difference and outputs the bus state with a single-ended output signal. Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 21 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com NOISE MARGIN 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 900 mV Threshold RECEIVER DETECTION WINDOW 75% SAMPLE POINT 500 mV Threshold NOISE MARGIN Figure 27. Typical SN65HVD230 Differential Output Voltage Waveform The CAN driver creates the difference voltage between CANH and CANL in the dominant state. The dominant differential output of the SN65HVD230 is greater than 1.5 V and less than 3 V across a 60-Ω load. The minimum required by ISO 11898 is 1.5 V and the maximum is 3 V. These are the same limiting values for 5-V supplied CAN transceivers. The bus termination resistors drive the recessive bus state and not the CAN driver. A CAN receiver is required to output a recessive state with less than 500 mV and a dominant state with more than 900-mV difference voltage on its bus inputs. The CAN receiver must do this with common-mode input voltages from –2 V to 7 V. The SN65HVD230 family receivers meet these same input specifications as 5-V supplied receivers. Common-Mode Signal A common-mode signal is an average voltage of the two signal wires that the differential receiver rejects. The common-mode signal comes from the CAN driver, ground noise, and coupled bus noise. Obviously, the supply voltage of the CAN transceiver has nothing to do with noise. The SN65HVD230 family driver lowers the commonmode output in a dominant bit by a couple hundred millivolts from that of most 5-V drivers. While this does not fully comply with ISO 11898, this small variation in the driver common-mode output is rejected by differential receivers and does not affect data, signal noise margins, or error rates. Interoperability of 3.3-V CAN in 5-V CAN Systems The 3.3-V–supplied SN65HVD23x family of CAN transceivers are electrically interchangeable with 5-V CAN transceivers. The differential output is the same. The recessive common-mode output is the same. The dominant common-mode output voltage is a couple hundred millivolts lower than 5-V–supplied drivers, while the receivers exhibit identical specifications as 5-V devices. Electrical interoperability does not assure interchangeability however. Most implementers of CAN buses recognize that ISO 11898 does not sufficiently specify the electrical layer and that strict standard compliance alone does not ensure interchangeability. This comes only with thorough equipment testing. Bus Cable ISO 11898 specifies a maximum bus length of 40 m and maximum stub length of 0.3 m with a maximum of 30 nodes. However, with careful design, users can have longer cables, longer stub lengths, and many more nodes to a bus. A large number of nodes requires a transceiver with high input impedance, such as the SN65HVD233. 22 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT SN65HVD233-HT www.ti.com SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 The standard specifies the interconnect to be a single twisted-pair cable (shielded or unshielded) with 120-Ω characteristic impedance (ZO). Resistors equal to the characteristic impedance of the line terminate both ends of the cable to prevent signal reflections. Unterminated drop lines (stubs) connecting nodes to the bus should be kept as short as possible to minimize signal reflections. Slope Control The rise and fall slope of the SN65HVD233 driver output can be adjusted by connecting a resistor from Rs (pin 8) to ground (GND), or to a low-level input voltage (see Figure 28). 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 The slope of the driver output signal is proportional to the pin's output current. This slope control is implemented with an external resistor value of 10 kΩ to achieve a ≉15-V/μs slew rate, and up to 100 kΩ to achieve a ≉2.0V/μs slew rate (see Figure 29). Typical driver output waveforms with slope control are displayed in Figure 30. Figure 28. Slope Control/Standby Connection to DSP 25 Slope (V/us) 20 15 10 5 0 0 4.7 6.8 10 15 22 33 47 68 100 Slope Control Resistance - kΩ Figure 29. SN65HVD233 Driver Output Signal Slope vs Slope Control Resistance Value Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT Submit Documentation Feedback 23 SN65HVD233-HT SLLS933E – NOVEMBER 2008 – REVISED APRIL 2012 www.ti.com Rs = 0 Ω Rs = 10 k Ω 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 Rs = 100 k Ω Figure 30. Typical SN65HVD233 250-kbps Output Pulse Waveforms With Slope Control STANDBY If a high-level input (>0.75 VCC) is applied to Rs, the circuit enters a low-current, listen-only standby mode, during which the driver is switched off and the receiver remains active. The local controller can reverse this low-power standby mode when the rising edge of a dominant state (bus differential voltage >900 mV typical) occurs on the bus. 24 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233-HT PACKAGE OPTION ADDENDUM www.ti.com 30-Apr-2012 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 PACKAGING INFORMATION Orderable Device SN65HVD233HD (1) Status (1) Package Type Package Drawing ACTIVE SOIC (2) Pins Package Qty D 8 75 Green (RoHS & no Sb/Br) Eco Plan Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) CU NIPDAU Level-1-260C-UNLIM SN65HVD233SHKJ ACTIVE CFP HKJ 8 1 TBD Call TI N / A for Pkg Type SN65HVD233SHKQ PREVIEW CFP HKQ 8 25 TBD Call TI Call TI SN65HVD233SJD ACTIVE CDIP SB JDJ 8 1 TBD SN65HVD233SKGDA ACTIVE XCEPT KGD 0 130 TBD POST-PLATE N / A for Pkg Type Call TI N / A for Pkg Type The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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OTHER QUALIFIED VERSIONS OF SN65HVD233-HT : Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 • Catalog: SN65HVD233 30-Apr-2012 • Enhanced Product: SN65HVD233-EP NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 司 公 限 有 2 件 技 83 器 科 16 元 子 29 子 电 -8 电 创 55 温 德 07 高 鸿 话 油 圳 电 石 深 系 理 联 代 业 专 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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