TI ISO1050

ISO1050
www.ti.com
SLLS983C – JUNE 2009 – REVISED JULY 2010
ISOLATED CAN TRANSCEIVER
Check for Samples: ISO1050
FEATURES
•
1
•
•
•
•
•
•
•
•
•
2
•
•
5000-VRMS Isolation (DW Package)
2500-VRMS Isolation (DUB Package)
Failsafe Outputs
Low Loop Delay: 150 ns Typical
50 kV/ms Typical Transient Immunity
Meets or Exceeds ISO 11898 requirements
Bus-Fault Protection of –27 V to 40 V
Dominant Time-Out Function
IEC 60747-5-2 (VDE 0884, Rev. 2) & IEC
61010-1 Approved
UL 1577, IEC 60950-1 and CSA Approvals
Pending
3.3-V Inputs are 5-V Tolerant
Typical 25-Year Life at Rated Working Voltage
(see Application Report SLLA197 and
Figure 15)
APPLICATIONS
•
•
•
•
•
•
•
CAN Data Buses
Industrial Automation
– DeviceNet Data Buses
– CANopen Data Buses
– CANKingdom Data Buses
Medical Scanning and Imaging
Security Systems
Telecom Base Station Status and Control
HVAC
Building Automation
DESCRIPTION
The ISO1050 is a galvanically isolated CAN transceiver that meets or exceeds the specifications of the ISO
11898 standard. The device has the logic input and output buffers separated by a silicon oxide (SiO2) insulation
barrier that provides galvanic isolation of up to 5000 VRMS for DW Package and 2500 VRMS for DUB package.
Used in conjunction with isolated power supplies, the device prevents noise currents on a data bus or other
circuits from entering the local ground and interfering with or damaging sensitive circuitry.
As a CAN transceiver, the device provides differential transmit capability to the bus and differential receive
capability to a CAN controller at signaling rates up to 1 megabit per second (Mbps). Designed for operation in
especially harsh environments, the device features cross-wire, overvoltage and loss of ground protection from
–27 V to 40 V and over-temperature shut-down, as well as –12 V to 12 V common-mode range.
The ISO1050 is characterized for operation over the ambient temperature range of –55°C to 105°C.
DW PACKAGE
GND1
GND1
1
2
16
15
Vcc2
GND2
3
4
5
6
7
8
14
13
12
nc
CANH
CANL
nc
11
10
9
RXD
TXD
GALVANIC ISOLATION
Vcc1
GND1
RXD
nc
nc
TXD
DUB PACKAGE
FUNCTION DIAGRAM
CANH
Vcc1
RXD
1
2
TXD
GND1
3
4
8
7
6
5
Vcc2
CANH
CANL
GND2
CANL
GND2
GND2
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DeviceNet is a trademark of others.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2010, Texas Instruments Incorporated
ISO1050
SLLS983C – JUNE 2009 – REVISED JULY 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS (1)
(2)
VALUE / UNIT
(3)
VCC1, VCC2
Supply voltage
VI
Voltage input (TXD)
–0.5 V to 6 V
–0.5 V to 6 V
VCANH or VCANH
Voltage range at any bus terminal (CANH, CANL)
–27 V to 40 V
IO
Receiver output current
±15 mA
Bus pins and
GND2 (4)
±4 kV
Human Body Model
JEDEC Standard 22, Method A114-C.01
All pins
±4 kV
Charged Device Model
JEDEC Standard 22, Test Method C101
All pins
±1.5 kV
Machine Model
ANSI/ESDS5.2-1996
All pins
±200 V
ESD
Tstg
Storage temperature
–65°C to 150°C
TJ
Junction temperature
–55°C to 150°C
(1)
(2)
(3)
(4)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
This isolator is suitable for basic isolation within the safety limiting data. Maintenance of the safety data must be ensured by means of
protective circuitry.
All input and output logic voltage values are measured with respect to the GND1 logic side ground. Differential bus-side voltages are
measured to the respective bus-side GND2 ground terminal.
Tested while connected between Vcc2 and GND2.
RECOMMENDED OPERATING CONDITIONS
MIN
VCC1
Supply voltage, controller side
VCC2
Supply voltage, bus side
VI or VIC
Voltage at bus pins (separately or common mode)
VIH
High-level input voltage
TXD
VIL
Low-level input voltage
TXD
VID
Differential input voltage
NOM
MAX
3
4.75
Driver
5
UNIT
5.5
V
5.25
V
–12 (1)
12
V
2
5.25
V
0
0.8
V
–7
7
V
–70
IOH
High-level output current
IOL
Low-level output current
TA
Ambient Temperature
-55
105
°C
TJ
Junction temperature (see THERMAL CHARACTERISTICS)
-55
125
°C
(1)
Receiver
mA
–4
Driver
70
Receiver
mA
4
The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
SUPPLY CURRENT
over recommended operating conditions (unless otherwise noted)
PARAMETER
ICC1
VCC1 Supply current
ICC2
VCC2 Supply current
(1)
2
TEST CONDITIONS
MIN TYP (1) MAX
VI = 0 V or VCC1 , VCC1 = 3.3V
1
2
VI = 0 V or VCC1 , VCC1 = 5V
2
3
52
73
8
12
Dominant
VI = 0 V, 60-Ω Load
Recessive
VI = VCC1
UNIT
mA
mA
All typical values are at 25°C with VCC1 = VCC2 = 5V.
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ISO1050
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DEVICE SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tloop1
Total loop delay, driver input to receiver output, Recessive to
Dominant
See Figure 9
112
150
210
ns
tloop2
Total loop delay, driver input to receiver output, Dominant to
Recessive
See Figure 9
112
150
210
ns
DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
VO(D)
Bus output voltage (Dominant)
VO(R)
Bus output voltage (Recessive)
VOD(D)
TEST CONDITIONS
CANH
CANL
Differential output voltage (Dominant)
MIN
TYP
MAX
2.9
3.5
4.5
0.8
1.2
1.5
See Figure 1 and Figure 2, VI = 2 V, RL= 60Ω
2
2.3
3
See Figure 1, Figure 2 and Figure 3, VI = 0 V,
RL = 60Ω
1.5
3
See Figure 1, Figure 2, and Figure 3 VI = 0 V,
RL = 45Ω, Vcc > 4.8V
1.4
3
See Figure 1 and Figure 2, VI = 3 V, RL = 60Ω
–0.12
0.012
–0.5
0.05
See Figure 1 and Figure 2, VI = 0 V, RL = 60Ω
VOD(R)
Differential output voltage (Recessive)
VOC(D)
Common-mode output voltage (Dominant)
VOC(pp)
Peak-to-peak common-mode output voltage
IIH
High-level input current, TXD input
VI at 2 V
IIL
Low-level input current, TXD input
VI at 0.8 V
IO(off)
Power-off TXD leakage current
VCC1, VCC2 at 0 V, TXD at 5 V
VI = 3 V, No Load
2.3
3
0.3
5
–5
–105
See Figure 11, VCANH = 12 V, CANL Open
IOS(ss)
Short-circuit steady-state output current
CO
Output capacitance
See receiver input capacitance
CMTI
Common-mode transient immunity
See Figure 13, VI = VCC or 0 V
See Figure 11, VCANL =–12 V, CANH Open
V
See Figure 11, VCANL = 12 V, CANH Open
1
–0.5
71
25
V
mA
mA
–72
0.36
–1
V
mA
10
See Figure 11, VCANH = –12 V, CANL Open
V
V
2
See Figure 8
UNIT
mA
105
50
kV/ms
DRIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tPLH
Propagation delay time, recessive-to-dominant output
tPHL
Propagation delay time, dominant-to-recessive output
tr
Differential output signal rise time
tf
Differential output signal fall time
tdom
Dominant time-out
See Figure 4
↓ CL=100 pF, See Figure 10
MIN
TYP
MAX
31
74
110
25
44
75
20
50
300
20
50
450
700
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UNIT
ns
ms
3
ISO1050
SLLS983C – JUNE 2009 – REVISED JULY 2010
www.ti.com
RECEIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
VIT+
Positive-going bus input threshold voltage
VIT–
Negative-going bus input threshold voltage
Vhys
Hysteresis voltage (VIT+ – VIT–)
VOH
High-level output voltage with Vcc = 5V
VOH
High-level output voltage with Vcc1 = 3.3V
VOL
Low-level output voltage
CI
TEST CONDITIONS
See Table 1
MIN
500
TYP (1)
MAX
UNIT
750
900
mV
650
mV
150
mV
IOH = –4 mA, See Figure 6
VCC – 0.8
4.6
IOH = –20 mA, See Figure 6
VCC – 0.1
5
IOL = 4 mA, See Figure 6
VCC – 0.8
3.1
IOL = 20 mA, See Figure 6
VCC – 0.1
3.3
V
V
IOL = 4 mA, See Figure 6
0.2
0.4
IOL = 20 mA, See Figure 6
0
0.1
Input capacitance to ground, (CANH or CANL)
TXD at 3 V, VI = 0.4 sin (4E6pt) + 2.5V
6
CID
Differential input capacitance
TXD at 3 V, VI = 0.4 sin (4E6pt)
RID
Differential input resistance
TXD at 3 V
30
RIN
Input resistance (CANH or CANL)
TXD at 3 V
15
RI(m)
Input resistance matching
(1 – [RIN (CANH) / RIN (CANL)]) × 100%
VCANH = VCANL
CMTI
Common-mode transient immunity
VI = VCC or 0 V, See Figure 13
(1)
V
pF
3
pF
80
kΩ
30
40
kΩ
–3%
0%
3%
25
50
kV/ms
All typical values are at 25°C with VCC1 = VCC2 = 5V.
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tPLH
Propagation delay time, low-to-high-level output
tPHL
Propagation delay time, high-to-low-level output
tr
Output signal rise time
tf
Output signal fall time
tfs
Failsafe output delay time from bus-side power loss
4
TXD at 3 V, See Figure 6
VCC1 at 5 V, See Figure 12
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MIN
TYP
MAX
66
90
130
51
80
105
3
6
3
6
6
UNIT
ns
ms
Copyright © 2009–2010, Texas Instruments Incorporated
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PARAMETER MEASUREMENT INFORMATION
Dominant
» 3.5 V
IO(CANH)
VO (CANH)
CANH
II
0 or
Vcc1
Recessive
TXD
GND1
VOD
CANL
RL
IO(CANL)
GND2
» 2.5 V
VO(CANH) + VO(CANL)
2
» 1.5 V
VOC
VO (CANL)
VI
VO(CANH)
VO(CANL )
GND1
GND2
Figure 1. Driver Voltage, Current and Test
Definitions
Figure 2. Bus Logic State Voltage Definitions
330 W ±1%
CANH
0V
TXD
VOD
60 W ±1%
+
_
CANL
-2 V < V test < 7 V
GND2
330 W ±1%
Figure 3. Driver VOD with Common-mode Loading Test Circuit
Vcc
VI
CANH
TXD
60 W ±1% VO
VI
t PLH
VO
(SEE NOTE A)
Vcc/2
0V
CL = 100 pF
± 20%
(SEE NOTE B)
CANL
Vcc/2
t PHL
VO(D)
90%
0.9V
0.5V
10%
tr
tf
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50Ω.
B.
CL includes instrumentation and fixture capacitance within ±20%.
VO(R)
Figure 4. Driver Test Circuit and Voltage Waveforms
CANH
VIC
=
VI(CANH) + VI(CANL)
2
IO
RXD
VID
CANL
VI(CANH)
VO
VI(CANL)
GND2
GND1
Figure 5. Receiver Voltage and Current Definitions
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PARAMETER MEASUREMENT INFORMATION (continued)
CANH
IO
3.5 V
RXD
V
I
2.4 V
2 V
CANL
1.5 V
t pHL
t pLH
VI
CL = 15 pF
± 20 %
(SEE NOTE B)
VO
(SEE NOTE A) 1 .5 V
V OH
90 %
0.7 Vcc 1
0.3 Vcc 1
V
O
10 %
tf
tr
V OL
GND 1
GND 2
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50Ω.
B.
CL includes instrumentation and fixture capacitance within ±20%.
Figure 6. Receiver Test Circuit and Voltage Waveforms
Table 1. Differential Input Voltage Threshold Test
INPUT
OUTPUT
VCANH
VCANL
|VID|
–11.1 V
–12 V
900 mV
L
R
12 V
11.1 V
900 mV
L
–6 V
–12 V
6V
L
12 V
6V
6V
L
–11.5 V
–12 V
500 mV
H
12 V
11.5 V
500 mV
H
–12 V
–6 V
–6 V
H
6V
12 V
–6 V
H
Open
Open
X
H
1 nF
VOL
VOH
CANH
RXD
CANL
15 pF
1 nF
TXD
+
VI
_
GND2
GND1
The waveforms of the applied transients are in accordance
with ISO 7637 part 1, test pulses 1, 2, 3a, and 3b.
Figure 7. Transient Over-Voltage Test Circuit
6
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SLLS983C – JUNE 2009 – REVISED JULY 2010
27 W ±1 %
CANH
TXD
CANL
47 nF
VI
27 W ±1 %
V OC
± 20%
GND 1
=
V (CANH) + V (CANL)
O
O
2
GND 2
V
OC(pp)
V
OC
Figure 8. Peak-to-Peak Output Voltage Test Circuit and Waveform
CANH
VI
TXD
60 W ±1%
Vcc
TXD Input
CANL
50%
0V
tloop
2
RXD
RXD Output
+
VO
_
t loop1
VOH
50%
50%
VOL
15 pF ± 20%
GND1
Figure 9. tLOOP Test Circuit and Voltage Waveforms
Vcc
VI
CANH
TXD
RL= 60 W ± 1 %
CL
0V
VOD
V OD (D)
(see Note B )
(see Note A )
CANH
VOD
VI
900 mV
500 mV
t dom
GND 1
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle, tr ≤ 6
ns, tf ≤ 6 ns, ZO = 50Ω.
B.
CL includes instrumentation and fixture capacitance within ±20%.
0V
Figure 10. Dominant Timeout Test Circuit and Voltage Waveforms
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IOS (SS)
I OS (P)
I OS
15 s
CANH
TXD
0V
0 V or VCC 1
12 V
CANL
VI
-12 V or 12 V
VI
0V
GND2
or
10 ms
0V
VI
-12 V
Figure 11. Driver Short-Circuit Current Test Circuit and Waveforms
VI
VCC 2
CANH
0V
TXD
VCC2
CL
60 W ±1%
VI
VO
RXD
0V
t fs
CANL
+
VO
2.7 V
VOH
50%
VOL
15pF ± 20%
GND 1
NOTE: CL = 100pF
includes instrumentation
and fixture capacitance
within ± 20%.
Figure 12. Failsafe Delay Time Test Circuit and Voltage Waveforms
8
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C = 0.1 mF
± 1%
2.0 V
VCC 1
VCC2
CANH
C = 0.1 mF ±1%
GND2
GND1
TXD
60 W
S1
VOH or VOL
CANL
0.8 V
RXD
VOH or VOL
1 kW
GND 1
GND 2
CL = 15 pF
(includes probe and
jig capacitance)
V TEST
Figure 13. Common-Mode Transient Immunity Test Circuit
CANH
ISO1050
47nF
30 W
Spectrum Analyzer
6.2 kW
10 nF
30 W
TXD
500kbps
CANL
6.2 kW
Figure 14. Electromagnetic Emissions Measurement Setup
DEVICE INFORMATION
FUNCTION TABLE (1)
DRIVER
INPUTS
(1)
(2)
OUTPUTS
RECEIVER
BUS STATE
DIFFERENTIAL INPUTS
VID = CANH–CANL
OUTPUT
RXD
BUS STATE
L
DOMINANT
VID ≥ 0.9 V
L
DOMINANT
TXD
CANH
CANL
L (2)
H
H
Z
Z
RECESSIVE
0.5 V < VID < 0.9 V
?
?
Open
Z
Z
RECESSIVE
VID ≤ 0.5 V
H
RECESSIVE
X
Z
Z
RECESSIVE
Open
H
RECESSIVE
H = high level; L = low level; X = irrelevant; ? = indeterminate; Z = high impedance
Logic low pulses to prevent dominant time-out.
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ISOLATOR CHARACTERISTICS
(1) (2)
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
L(I01)
Minimum air gap (Clearance)
Shortest terminal to terminal distance through air
L(I02)
Minimum external tracking
(Creepage)
Shortest terminal to terminal distance across the
package surface
L(I01)
Minimum air gap (Clearance)
Shortest terminal to terminal distance through air
L(I02)
RIO
Minimum external tracking
(Creepage)
Shortest terminal to terminal distance across the
package surface
Minimum Internal Gap (Internal
Clearance)
Distance through the insulation
Isolation resistance
DUB-8
DW-16
TYP MAX
UNIT
6.1
mm
6.8
mm
8.34
mm
8.10
mm
0.014
mm
Input to output, VIO = 500 V, all pins on each side of the
barrier tied together creating a two-terminal device, Tamb <
100°C
>1012
Input to output VIO = 500 V, 100°C ≤Tamb <≤Tamb max
>1011
Ω
Ω
CIO
Barrier capacitance
VI = 0.4 sin (4E6pt)
1.9
pF
CI
Input capacitance to ground
VI = 0.4 sin (4E6pt)
1.3
pF
(1)
(2)
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care
should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on
the printed circuit board do not reduce this distance.
Creepage and clearance on a printed circuit board become equal according to the measurement techniques shown in the Isolation
Glossary. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications.
INSULATION CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
VIORM
Maximum working insulation
voltage per IEC
VPR
Input to output test voltage per IEC
VIOTM
Transient overvoltage per IEC
TEST CONDITIONS
560
16-DW Package
1200
8-DUB Package
VPR = 1.875 x VIORM, t = 1
sec (100% production)
Partial discharge < 5 pC
16-DW Package
t = 60 sec (qualification)
t = 1 sec (100% production)
8-DUB Package
VISO
Isolation voltage per UL
16-DW Package
RS
SPECIFICATION
8-DUB Package
Isolation voltage per UL
Vpeak
1050
Vpeak
2250
4000
t = 60 sec (qualification)
2500
t = 1 sec (100% production)
3000
t = 60 sec (qualification)
5000
t = 1 sec (100% production)
6000
VIO = 500 V at TS
> 109
Pollution Degree
UNIT
Vpeak
Vrms
Vrms
Ω
2
IEC 60664-1 RATINGS
PARAMETER
Basic isolation group
Installation classification
10
TEST CONDITIONS
SPECIFICATION
Material group
III-a
Rated mains voltage ≤ 150 Vrms
I–IV
Rated mains voltage ≤ 300 Vrms
I–III
Rated mains voltage ≤ 400 Vrms
I–II
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IEC SAFETY LIMITING VALUES
safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry. A failure of
the IO can allow low resistance to ground or the supply and, without current limiting dissipate sufficient power to overheat the
die and damage the isolation barrier potentially leading to secondary system failures.
PARAMETER
TEST CONDITIONS
DUB-8
IS
Safety input, output, or supply current
DW-16
TS
MIN
TYP
MAX UNIT
qJA = 73.3 °C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C
310
qJA = 73.3 °C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C
474
qJA = 76 °C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C
299
qJA = 76 °C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C
457
Maximum case temperature
mA
mA
150
°C
The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum
ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the
application hardware determines the junction temperature. The assured junction-to-air thermal resistance in the
Thermal Characteristics table is that of a device installed on a High-K Test Board for Leaded Surface Mount
Packages. The power is the recommended maximum input voltage times the current. The junction temperature is
then the ambient temperature plus the power times the junction-to-air thermal resistance.
REGULATORY INFORMATION
VDE
CSA
UL
Certified according to IEC
60747-5-2
Approved under CSA Component Acceptance Recognized under 1577 Component Recognition
Notice
Program (1)
File Number: 40016131
File Number: pending
(1)
File Number: pending
Production tested ≥ 3000 VRMS for 1 second in accordance with UL 1577.
THERMAL INFORMATION (DUB-8 PACKAGE)
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Low-K Thermal Resistance
TYP
MAX
UNIT
120
°C/W
High-K Thermal Resistance
73.3
°C/W
Low-K Thermal Resistance
10.2
°C/W
Junction-to-case thermal resistance Low-K Thermal Resistance
14.5
°C/W
qJA
Junction-to-air
qJB
Junction-to-board thermal
resistance
qJC
VCC1=5.5V, VCC2=5.25V, TA=105°C, RL= 60Ω,
TXD input is a 500kHz 50% duty-cycle square
wave
PD
Device power dissipation
Tj shutdown
Thermal shutdown temperature (2)
(1)
(2)
MIN
(1)
200
mW
190
°C
Tested in accordance with the Low-K or High-K thermal metric definitions of EIA/JESD51-3 for leaded surface mount packages.
Extended operation in thermal shutdown may affect device reliability.
THERMAL INFORMATION (DW-16 PACKAGE)
ISO1050
THERMAL METRIC (1)
DW
UNITS
16
qJA
Junction-to-ambient thermal resistance
qJCtop
Junction-to-case (top) thermal resistance
qJB
Junction-to-board thermal resistance
47.7
yJT
Junction-to-top characterization parameter
14.4
yJB
Junction-to-board characterization parameter
38.2
qJCbot
Junction-to-case (bottom) thermal resistance
n/a
(1)
76.0
41
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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11
ISO1050
SLLS983C – JUNE 2009 – REVISED JULY 2010
www.ti.com
LIFE EXPECTANCY vs WORKING VOLTAGE (8-DUB PACKAGE)
Life Expectancy – Years
100
VIORM at 560 V
28 Years
10
0
120
250
500
750
880
1000
VIORM – Working Voltage – V
G001
Figure 15. Life Expectancy vs Working Voltage
12
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Product Folder Link(s): ISO1050
ISO1050
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SLLS983C – JUNE 2009 – REVISED JULY 2010
EQUIVALENT I/O SCHEMATICS
TXD Input
VCC1
RXD Output
VCC1
VCC1
VCC1
1 MW
8W
500 W
IN
OUT
13 W
CANL Input
CANH Input
Vcc2
Vcc2
10 kW
10 kW
20 kW
20 kW
Input
40 V
Input
10 kW
10 kW
40 V
CANH and CANL Outputs
Vcc2
CANH
CANL
40 V
40 V
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13
ISO1050
SLLS983C – JUNE 2009 – REVISED JULY 2010
www.ti.com
TYPICAL CHARACTERISTICS
RECESSIVE-TO-DOMINANT LOOP TIME
vs
FREE-AIR TEMPERATURE (across Vcc)
DOMINANT-TO-RECESSIVE LOOP TIME
vs
FREE-AIR TEMPERATURE (across Vcc)
163
200
161
VCC1 = 3 V,
VCC2 = 4.75 V
190
159
VCC1 = 3 V,
VCC2 = 4.75 V
157
Loop Time - ns
Loop Time - ns
180
VCC1 = 5 V,
VCC2 = 5 V
170
160
155
VCC1 = 5.5 V,
VCC2 = 5.25 V
153
151
149
150
140
-60
VCC1 = 5.5 V,
VCC2 = 5.25 V
-40
147
VCC1 = 5 V,
VCC2 = 5 V
145
-60
-20
0
20 40 60
80 100 120
TA - Free-Air Temperature - °C
-40
-20
0
20 40 60
80 100 120
TA - Free-Air Temperature - °C
Figure 16.
Figure 17.
SUPPLY CURRENT (RMS)
vs
SIGNALING RATE (kbps)
DRIVER OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
100
3.5
VO = CANH
3
VO - Output Voltage - V
ICC - Supply Current - mA
ICC2 = 5 V
10
ICC1 = 5 V
1
250
450
550
650
750
850
2
1.5
ICC1 = 3.3 V
350
2.5
950
1
-60
Signaling Rate - kbps
Figure 18.
14
VO = CANL
-40
-20
0
20 40 60
80 100 120
TA - Free-Air Temperature - °C
Figure 19.
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ISO1050
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SLLS983C – JUNE 2009 – REVISED JULY 2010
TYPICAL CHARACTERISTICS (continued)
EMISSIONS SPECTRUM TO 10 MHz
EMISSIONS SPECTRUM TO 50 MHz
Figure 20.
Figure 21.
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15
ISO1050
SLLS983C – JUNE 2009 – REVISED JULY 2010
www.ti.com
APPLICATION INFORMATION
DOMINANT TIME-OUT
A dominant time-out circuit in the ISO1050 prevents the driver from blocking network communications if a local
controller fault occurs. The time-out circuit is triggered by a falling edge on TXD. If no rising edge occurs on TXD
before the time-out of the circuits expires, the driver is disabled to prevent the local node from continuously
transmitting a Dominant bit. If a rising edge occurs on TXD, commanding a Recessive bit, the timer will be reset
and the driver will be re-enabled. The time-out value is set so that normal CAN communication will not cause the
Dominant time-out circuit to expire.
FAILSAFE
If the bus-side power supply Vcc2 is lower than about 2.7V, the power shutdown circuits in the ISO1050 will
disable the transceiver to prevent spurious transitions due to an unstable supply. If Vcc1 is still active when this
occurs, the receiver output will go to a failsafe HIGH value in about 6 microseconds.
THERMAL SHUTDOWN
The ISO1050 has an internal thermal shutdown circuit that turns off the driver outputs when the internal
temperature becomes too high for normal operation. This shutdown circuit prevents catastrophic failure due to
short-circuit faults on the bus lines. If the device cools sufficiently after thermal shutdown, it will automatically
re-enable, and may again rise in temperature if the bus fault is still present. Prolonged operation with thermal
shutdown conditions may affect device reliability.
BUS LOADING
In the CAN standard ISO 11898-2 the driver differential output is specified with a 60Ω load (must be greater than
1.5V) and with a fully-loaded bus (must be greater than 1.2V). The ISO1050 is specified to meet the 1.5V
requirement with a 60Ω load, and 1.4V with a 45Ω load. The differential input resistance of the ISO1050 is a
minimum of 30KΩ. If the 167 transceivers are in parallel on a bus, this is equivalent to a 180Ω differential load.
That transceiver load of 180Ω in parallel with the 60Ω (two 120Ω termination resistors) gives a total 45Ω.
Therefore, the ISO1050 supports over 167 transceivers on a single bus segment, with margin to the 1.2V CAN
requirement.
16
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SLLS983C – JUNE 2009 – REVISED JULY 2010
REVISION HISTORY
Changes from Original (June 2009) to Revision A
Page
•
Added Typical 25-Year Life at Rated Working Voltage to Features ..................................................................................... 1
•
Added LIFE EXPECTANCY vs WORKING VOLTAGE section .......................................................................................... 12
Changes from Revision A (Sept 2009) to Revision B
Page
•
Added information that IEC 60747-5-2 and IEC61010-1 have been approved .................................................................... 1
•
Changed DW package from preview to production data ...................................................................................................... 1
•
Added Insulation Characteristics and IEC 60664-1 Ratings tables .................................................................................... 10
•
Added IEC file number ........................................................................................................................................................ 11
•
Added DW-16 thermal information table ............................................................................................................................. 11
Changes from Revision B (June 2009) to Revision C
Page
•
Changed the IEC 60747-5-2 Features bullet From: DW package Approval Pending To: VDE approved for both DUB
and DW packages ................................................................................................................................................................ 1
•
Changed the Minimum Interal Gap value from 0.008 to 0.014 in the Isolator Characteristics table .................................. 10
•
Changed VIORM Specification From: 1300 To: 1200 per VDE certification ......................................................................... 10
•
Changed VPR Specification From 2438 To: 2250 ............................................................................................................... 10
•
Added the Bus Loading paragraph to the Application Information section ......................................................................... 16
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17
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jul-2010
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
ISO1050DUB
ACTIVE
SOP
DUB
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-4-260C-72 HR
ISO1050DUBR
ACTIVE
SOP
DUB
8
350
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-4-260C-72 HR
ISO1050DW
PREVIEW
SOIC
DW
16
40
TBD
Call TI
Call TI
ISO1050DWR
PREVIEW
SOIC
DW
16
2000
TBD
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Jul-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
ISO1050DUBR
Package Package Pins
Type Drawing
SOP
DUB
8
SPQ
350
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
330.0
24.4
Pack Materials-Page 1
10.9
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
10.01
5.85
16.0
24.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Jul-2010
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
ISO1050DUBR
SOP
DUB
8
350
358.0
335.0
35.0
Pack Materials-Page 2
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