TI SN74ACT00N

SN54ACT00, SN74ACT00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS523B – AUGUST 1995 – REVISED AUGUST 1999
D
D
D
SN54ACT00 . . . J OR W PACKAGE
SN74ACT00 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
Inputs Are TTL-Voltage Compatible
EPIC  (Enhanced-Performance Implanted
CMOS) 1-µm Process
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), DIP
(N) Packages, Ceramic Chip Carriers (FK),
Flat (W), and DIP (J) Packages
1A
1B
1Y
2A
2B
2Y
GND
description
The ‘ACT00 devices contain four independent 2-input
NAND gates. Each gate performs the Boolean
function of Y = A S B or Y = A + B in positive logic.
B
H
H
L
L
X
H
X
L
H
1B
2A
2B
3A
3B
4A
4B
1
12
4
11
5
10
6
9
7
8
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3B
NC – No internal connection
logic symbol†
1A
3
VCC
4B
4A
4Y
3B
3A
3Y
2Y
GND
NC
3Y
3A
A
13
1B
1A
NC
VCC
4B
1Y
NC
2A
NC
2B
FUNCTION TABLE
(each gate)
OUTPUT
Y
14
2
SN54ACT00 . . . FK PACKAGE
(TOP VIEW)
The SN54ACT00 is characterized for operation over
the full military temperature range of – 55°C to 125°C.
The SN74ACT00 is characterized for operation from
– 40°C to 85°C.
INPUTS
1
logic diagram, each gate (positive logic)
&
2
3
A
1Y
Y
B
4
5
6
2Y
9
10
8
3Y
12
13
11
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright  1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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1
SN54ACT00, SN74ACT00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS523B – AUGUST 1995 – REVISED AUGUST 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
recommended operating conditions (see Note 3)
SN54ACT00
MAX
MIN
MAX
4.5
5.5
4.5
5.5
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
Input voltage
0
VO
IOH
Output voltage
0
IOL
∆t /∆v
Low-level output current
High-level input voltage
SN74ACT00
MIN
2
2
0.8
High-level output current
VCC
VCC
0
0
– 24
24
Input transition rise or fall rate
0
8
0
UNIT
V
V
0.8
V
VCC
VCC
V
– 24
mA
V
24
mA
8
ns / V
TA
Operating free-air temperature
– 55
125
– 40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
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SN54ACT00, SN74ACT00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS523B – AUGUST 1995 – REVISED AUGUST 1999
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
IOH = – 50 µA
VOH
A
IOH = – 24 mA
IOH = – 50 mA†
IOH = – 75 mA†
TA = 25°C
TYP
MAX
SN54ACT00
MIN
SN74ACT00
MAX
MIN
4.5 V
4.4
4.49
4.4
5.5 V
5.4
5.49
5.4
5.4
4.5 V
3.86
3.7
3.76
5.5 V
4.86
4.7
4.76
5.5 V
IOL = 24 mA
IOL = 50 mA†
IOL = 75 mA†
∆ICC‡
One input at 3.4 V,
Other inputs at GND or VCC
IO = 0
V
3.85
4.5 V
0.001
0.1
0.1
5.5 V
0.001
0.1
0.1
0.1
0.1
4.5 V
0.36
0.5
0.44
5.5 V
0.36
0.5
0.44
V
1.65
5.5 V
VI = VCC or GND
VI = VCC or GND,
UNIT
3.85
5.5 V
II
ICC
MAX
4.4
5.5 V
IOL = 50 µA
VOL
MIN
1.65
5.5 V
± 0.1
±1
±1
µA
5.5 V
2
40
20
µA
1.6
1.5
mA
5.5 V
0.6
Ci
VI = VCC or GND
5V
2.6
† Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
pF
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
A or B
Y
MIN
TA = 25°C
TYP
MAX
SN54ACT00
SN74ACT00
MIN
MAX
MIN
MAX
1.5
5.5
9
1
9.5
1
9.5
1.5
4
7
1
8
1
8
UNIT
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
Power dissipation capacitance
TEST CONDITIONS
CL = 50 pF,
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• DALLAS, TEXAS 75265
f = 1 MHz
TYP
UNIT
40
pF
3
SN54ACT00, SN74ACT00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS523B – AUGUST 1995 – REVISED AUGUST 1999
PARAMETER MEASUREMENT INFORMATION
TEST
3V
S1
tPLH/tPHL
1.5 V
Input
Open
1.5 V
0V
tPHL
tPLH
2 × VCC
From Output
Under Test
CL = 50 pF
(see Note A)
500 Ω
S1
Open
In-Phase
Output
50% VCC
tPLH
tPHL
500 Ω
Out-of-Phase
Output
LOAD CIRCUIT
VOH
50% VCC
VOL
50% VCC
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
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Copyright  1999, Texas Instruments Incorporated