SN54/74LS352 DUAL 4-INPUT MULTIPLEXER The SN54 / 74LS352 is a very high-speed Dual 4-input Multiplexer with Common Select inputs and individual Enable inputs for each section. It can select two bits of data from four sources. The two buffered outputs present data in the inverted (complementary) form. The SN54/ 74LS352 is the functional equivalent of the SN54/ 74LS153 except with inverted outputs. • Inverted Version of the SN54 / 74LS153 • Separate Enables for Each Multiplexer • Input Clamp Diode Limit High Speed Termination Effects DUAL 4-INPUT MULTIPLEXER LOW POWER SCHOTTKY CONNECTION DIAGRAM DIP (TOP VIEW) NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. J SUFFIX CERAMIC CASE 620-09 16 1 N SUFFIX PLASTIC CASE 648-08 16 1 PIN NAMES LOADING (Note a) S0, S1 E I0 – I1 Z Common Select Inputs Enable (Active LOW) Input Multiplexer Inputs Multiplexer Outputs (note b) HIGH LOW 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L. 16 1 NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges. ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD LOGIC DIAGRAM D SUFFIX SOIC CASE 751B-03 Ceramic Plastic SOIC LOGIC SYMBOL FAST AND LS TTL DATA 5-505 SN54/74LS352 FUNCTIONAL DESCRIPTION The SN54 / 74LS352 is a Dual 4-Input Multiplexer. It selects two bits of data from up to four sources under the control of the common Select Inputs (S0, S1). The two 4-input multiplexer circuits have individual active LOW Enables (Ea, Eb) which can be used to strobe the outputs independently. When the Enables (Ea, Eb) are HIGH, the corresponding outputs (Za, Zb) are forced HIGH. The logic equations for the outputs are shown below. Za = Ea • (I0a • S1 • S0 + I1a • S1 • S0 + I2a • S1 • S0 + I3a • S1 • S0) Zb = Eb • (I0b • S1 • S0 + I1b • S1 • S0 + I2b • S1 • S0 + I3b • S1 • S0) The SN54 / 74LS352 can be used to move data from a group of registers to a common output bus. The particular register from which the data came would be determined by the state of the Select Inputs. A less obvious application is a function gen- erator. The SN54 / 74LS352 can generate two functions of three variables. This is useful for implementing highly irregular random logic. TRUTH TABLE SELECT INPUTS INPUTS (a or b) OUTPUT S0 S1 E I0 I1 I2 I3 Z X L L H H L L H H X L L L L H H H H H L L L L L L L L X L H X X X X X X X X X L H X X X X X X X X X L H X X X X X X X X X L H H H L H L H L H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial GUARANTEED OPERATING RANGES Min Typ Max Unit VCC Symbol Supply Voltage Parameter 54 74 4.5 4.75 5.0 5.0 5.5 5.25 V TA Operating Ambient Temperature Range 54 74 – 55 0 25 25 125 70 °C IOH Output Current — High 54, 74 – 0.4 mA IOL Output Current — Low 54 74 4.0 8.0 mA FAST AND LS TTL DATA 5-506 SN54/74LS352 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Min Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage VOH Output HIGH Voltage VOL Output LOW Voltage IIH Input HIGH Current IIL Input LOW Current IOS Short Circuit Current (Note 1) ICC Power Supply Current Typ Max Unit 2.0 54 0.7 74 0.8 – 0.65 – 1.5 Test Conditions V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input LOW Voltage for All Inputs V VCC = MIN, IIN = – 18 mA 54 2.5 3.5 V 74 2.7 3.5 V VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table VCC = VCC MIN, VIN = VIL or VIH per Truth Table 54, 74 0.25 0.4 V IOL = 4.0 mA 74 0.35 0.5 V IOL = 8.0 mA 20 µA VCC = MAX, VIN = 2.7 V –20 0.1 mA VCC = MAX, VIN = 7.0 V –0.4 mA VCC = MAX, VIN = 0.4 V – 100 mA VCC = MAX 10 mA VCC = MAX Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V) Limits Symbol Parameter Min Typ Max Unit Test Conditions tPLH tPHL Propagation Delay, Select to Output 19 25 29 38 ns Figure 1 or 2 tPLH tPHL Propagation Delay, Enable to Output 16 21 24 32 ns Figure 2 tPLH tPHL Propagation Delay, Data to Output 13 17 20 26 ns Figure 1 VCC = 5.0 V, CL = 15 pF AC WAVEFORMS Figure 1 Figure 2 FAST AND LS TTL DATA 5-507 Case 751B-03 D Suffix 16-Pin Plastic SO-16 -A- "! ! " " ! " # 1 %# ) ! !" $ !" 8 C -T- D M K " ! #! J F ! Case 648-08 N Suffix 16-Pin Plastic R X 45° G " ! ) #! P ! " " 9 -B- ! 16 & ! ! ° ° ° ° ( ( ( ( "! ! " " ! ! ' " " ! ' ! " # & -A- 16 9 1 8 ! ! $ ! B # ) " ! " # ) !" $ !" ) F L C S -T- K H G M J D " Case 620-09 J Suffix 16-Pin Ceramic Dual In-Line -A- ! ! ! ! ° ° ° ° "! ! " 16 " ) " L K M N J G D " $ " $ ! " " ! ! FAST AND LS TTL DATA 5-508 & # ) !" $ !" ) -T $ " " C F & 8 E ! ! ! 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Literature Distribution Centers: USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. EUROPE: Motorola Ltd.; European Literature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England. JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. ◊ FAST AND LS TTL DATA 5-509