TI SN74LVC16T245DGGR

SCES585 − JULY 2004
D Control Inputs VIH/VIL Levels are
D
D
D
Referenced to VCCA Voltage
VCC Isolation Feature − If Either VCC Input
Is at GND, Both Ports Are in the
High-Impedance State
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
Ioff Supports Partial-Power-Down Mode
Operation
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
description/ordering information
This 16-bit noninverting bus transceiver uses two
separate configurable power-supply rails. The
A port is designed to track VCCA. VCCA accepts
any supply voltage from 1.65 V to 5.5 V. The B port
is designed to track VCCB. VCCB accepts any
supply voltage from 1.65 V to 5.5 V. This allows for
universal low-voltage bidirectional translation
between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V
voltage nodes.
The
SN74LVC16T245
is
designed
for
asynchronous communication between data
buses. The device transmits data from the A bus
to the B bus or from the B bus to the A bus,
depending on the logic level at the
direction-control (DIR) input. The output-enable
(OE) input can be used to disable the outputs so
the buses are effectively isolated.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OE
1A1
1A2
GND
1A3
1A4
VCCA
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCCA
2A5
2A6
GND
2A7
2A8
2OE
PRODUCT PREVIEW
D
DGG OR DGV PACKAGE
(TOP VIEW)
The SN74LVC16T245 is designed so that the
control pins (1DIR, 2DIR, 1OE, and 2OE) are
supplied by VCCA.
ORDERING INFORMATION
PACKAGE†
TA
−40°C
85°C
−40 C to 85
C
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
TSSOP − DGG
Tape and reel
SN74LVC16T245DGGR
TVSOP − DGV
Tape and reel
SN74LVC16T245DGVR
VFBGA − GQL
Tape and reel
SN74LVC16T245GQLR
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2004, Texas Instruments Incorporated
!"#$%! &!&'"( )"!*+&%( %,' !"#$%-' !"
*'(. ),$(' ! *'-'/!)#'%0 ,$"$&%'"(%& *$%$ $* !%,'"
()'&&$%!( $"' *'(. .!$/(0 '1$( (%"+#'%( "'('"-'( %,' ".,% %!
&,$.' !" *(&!%+' %,'(' )"!*+&%( 2%,!+% !%&'0
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCES585 − JULY 2004
description/ordering information (continued)
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
GQL PACKAGE
(TOP VIEW)
terminal assignments
1
2
3
4
5
6
A
1DIR
NC
NC
NC
NC
1OE
A
B
1B2
1B1
GND
GND
1A1
1A2
B
C
1B4
1B3
1A4
C
1B6
1B5
VCCA
GND
1A3
D
VCCB
GND
1A5
1A6
E
1B8
1B7
1A7
1A8
F
2B1
2B2
2A2
2A1
G
2B3
2B4
GND
GND
2A4
2A3
H
2B5
2B6
2A5
2B7
2B8
VCCA
GND
2A6
J
VCCB
GND
2A8
2A7
2DIR
NC
NC
NC
NC
2OE
1
2
3
4
5
6
PRODUCT PREVIEW
D
E
F
G
H
K
J
NC − No internal connection
K
FUNCTION TABLE
(each 8-bit section)
INPUTS
OPERATION
OE
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic diagram (positive logic)
1DIR
1
2DIR
48
1A1
25
1OE
47
2A1
2
24
36
13
1B1
To Seven Other Channels
To Seven Other Channels
2
POST OFFICE BOX 655303
2OE
• DALLAS, TEXAS 75265
2B1
SCES585 − JULY 2004
Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, VO
(see Notes 1 and 2): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCA + 0.5 V
(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCB + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each VCCA, VCCB, and GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
GQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
PRODUCT PREVIEW
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
SCES585 − JULY 2004
recommended operating conditions (see Notes 4 through 6)
VCCI
VCCA
VCCB
VCCO
Supply voltage
High-level input
voltage
Data inputs
(see Note 7)
MAX
1.65
5.5
1.65
5.5
2.3 V to 2.7 V
3 V to 3.6 V
VCCI × 0.7
VCCI × 0.35
0.7
1.65 V to 1.95 V
Low-level input
voltage
Data inputs
(see Note 7)
2.3 V to 2.7 V
3 V to 3.6 V
0.8
DIR
(Referenced to VCCA)
(see Note 8)
High-level input
voltage
VCCA × 0.65
1.7
2.3 V to 2.7 V
3 V to 3.6 V
VCCA × 0.7
PRODUCT PREVIEW
VCCA × 0.35
0.7
1.65 V to 1.95 V
VIL
VI
Input voltage
DIR
(Referenced to VCCA)
(see Note 8)
2.3 V to 2.7 V
3 V to 3.6 V
0.8
4.5 V to 5.5 V
VO
Output voltage
0
Active state
0
3-State
0
1.65 V to 1.95 V
IOH
High-level output current
∆t/∆v
Low-level output current
Input transition rise or
fall rate
Data inputs
VCCA × 0.3
5.5
VCCO
3.6
V
V
V
−4
2.3 V to 2.7 V
−8
3 V to 3.6 V
−24
4.5 V to 5.5 V
−32
1.65 V to 1.95 V
IOL
V
2
4.5 V to 5.5 V
Low-level input
voltage
V
VCCI × 0.3
4.5 V to 5.5 V
1.65 V to 1.95 V
VIH
V
V
2
4.5 V to 5.5 V
VIL
UNIT
VCCI × 0.65
1.7
1.65 V to 1.95 V
VIH
MIN
mA
4
2.3 V to 2.7 V
8
3 V to 3.6 V
24
4.5 V to 5.5 V
32
1.65 V to 1.95 V
20
2.3 V to 2.7 V
20
3 V to 3.6 V
10
4.5 V to 5.5 V
5
mA
ns/V
TA
Operating free-air temperature
−40
85
°C
NOTES: 4. VCCI is the VCC associated with the data input port.
5. VCCO is the VCC associated with the output port.
6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
7. For VCCI values not specified in the data sheet, VIH(min) = VCCI x 0.7 V, VIL(max) = VCCI x 0.3 V.
8. For VCCI values not specified in the data sheet, VIH(min) = VCCA x 0.7 V, VIL(max) = VCCA x 0.3 V.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCES585 − JULY 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Notes 9 and 10)
VOH
VOL
TEST CONDITIONS
TA = 25°C
TYP
MAX
−40°C to 85°C
MIN
1.65 V to 4.5 V
1.65 V to 4.5 V
1.65V
1.65 V
1.2
IOH = −8 mA,
IOH = −24 mA,
VI = VIH
VI = VIH
2.3 V
2.3 V
1.9
3V
3V
2.4
IOH = −32 mA,
IOL = 100 µA,
VI = VIH
VI = VIL
3.8
IOL = 4 mA,
IOL = 8 mA,
IOL = 24 mA,
IOL = 32 mA,
4.5 V
0.1
VI = VIL
VI = VIL
1.65 V
1.65 V
0.45
2.3 V
2.3 V
0.3
VI = VIL
VI = VIL
3V
3V
0.55
4.5 V
4.5 V
0.55
1.65 V to 5.5 V
1.65 V to 5.5 V
±1
±2
VI or VO = 0 to 5.5 V
IOZ
A or B
ports
VO = VCCO or
GND
OE = VIH
VI = VCCI or
GND
IO = 0
VI = VCCI or
GND
ICCA ICCB
VI = VCCI or
GND
V
1.65 V to 4.5 V
A or B
port
IO = 0
IO = 0
A port
One A port at VCCA − 0.6 V,
DIR at VCCA, B port = OPEN
DIR
DIR at VCCA − 0.6 V,
B port = OPEN,
A port at VCCA or GND
B port
One B port at VCCB − 0.6 V,
DIR at GND, A port = OPEN
UNIT
VCCO − 0.1 V
4.5 V
Ioff
ICCB
MAX
1.65 V to 4.5 V
VI = VCCA or GND
∆ICCB
MIN
VI = VIH
VI = VIH
II
∆ICCA
VCCB
IOH = −100 µA,
IOH = −4 mA,
DIR
input
ICCA
VCCA
0V
0 to 5.5 V
±1
±2
0 to 5.5 V
0V
±1
±2
1.65 V to 5.5 V
1.65 V to 5.5 V
±1
±2
1.65 V to 5.5 V
1.65 V to 5.5 V
20
5V
0V
20
0V
5V
−2
1.65 V to 5.5 V
1.65 V to 5.5 V
20
5V
0V
−2
0V
5V
20
1.65 V to 5.5 V
1.65 V to 5.5 V
30
V
µA
µA
A
PRODUCT PREVIEW
PARAMETER
µA
µA
µA
µA
50
3 V to 5.5 V
µA
3 V to 5.5 V
50
3 V to 5.5 V
3 V to 5.5 V
50
µA
Ci
DIR
input
VI = VCCA or GND
3.3 V
3.3 V
pF
Cio
A or B
ports
VO = VCCA/B or GND
3.3 V
3.3 V
pF
NOTES: 9. VCCO is the VCC associated with the output port.
10. VCCI is the VCC associated with the input port.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SCES585 − JULY 2004
switching characteristics over recommended operating
VCCA = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
PRODUCT PREVIEW
tPZH
tPZL
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
6
temperature
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
range,
FROM
(INPUT)
TO
(OUTPUT)
A
B
ns
B
A
ns
OE
A
ns
OE
B
ns
OE
A
ns
OE
B
ns
MIN
MAX
MIN
MAX
switching characteristics over recommended operating
VCCA = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
free-air
VCCB = 1.8 V
± 0.15 V
MIN
free-air
VCCB = 2.5 V
± 0.2 V
MAX
MIN
temperature
VCCB = 3.3 V
± 0.3 V
UNIT
MAX
VCCB = 5 V
± 0.5 V
range,
FROM
(INPUT)
TO
(OUTPUT)
A
B
ns
B
A
ns
OE
A
ns
OE
B
ns
OE
A
ns
OE
B
ns
MIN
POST OFFICE BOX 655303
MAX
MIN
• DALLAS, TEXAS 75265
MAX
MIN
MAX
MIN
UNIT
MAX
SCES585 − JULY 2004
PARAMETER
B
ns
B
A
ns
OE
A
ns
OE
B
ns
OE
A
ns
OE
B
ns
tPHL
tPLZ
tPZH
tPZL
tPZH
tPZL
MIN
MAX
MIN
MAX
switching characteristics over recommended operating
VCCA = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPZL†
tPZH†
tPZL†
VCCB = 2.5 V
± 0.2 V
temperature
VCCB = 3.3 V
± 0.3 V
UNIT
MAX
VCCB = 5 V
± 0.5 V
range,
B
ns
B
A
ns
OE
A
ns
OE
B
ns
OE
A
ns
OE
B
ns
tPHL
tPLZ
tPZH†
free-air
MIN
A
tPLH
tPHZ
MAX
TO
(OUTPUT)
tPHL
tPLZ
VCCB = 1.8 V
± 0.15 V
MIN
FROM
(INPUT)
tPLH
tPHZ
VCCB = 5 V
± 0.5 V
A
tPLH
tPHZ
VCCB = 3.3 V
± 0.3 V
range,
TO
(OUTPUT)
tPHL
tPLZ
VCCB = 2.5 V
± 0.2 V
temperature
FROM
(INPUT)
tPLH
tPHZ
VCCB = 1.8 V
± 0.15 V
free-air
MIN
MAX
MIN
MAX
MIN
MAX
MIN
UNIT
MAX
operating characteristics, TA = 25°C
PARAMETER
TEST CONDITIONS
VCCA =
VCCB = 1.8 V
TYP
CpdA†
CpdB†
VCCA =
VCCB = 2.5 V
TYP
VCCA =
VCCB = 3.3 V
TYP
VCCA =
VCCB = 5 V
UNIT
TYP
A port input, B port output
B port input, A port output
A port input, B port output
CL = 0, f = 10 MHz,
tr = tf =1 ns
pF
B port input, A port output
† Power-dissipation capacitance per transceiver
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
PRODUCT PREVIEW
switching characteristics over recommended operating
VCCA = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
SCES585 − JULY 2004
power-up considerations
A proper power-up sequence always should be followed to avoid excessive supply current, bus contention,
oscillations, or other anomalies. To guard against such power-up problems, take the following precautions:
1. Connect ground before any supply voltage is applied.
2. Power up VCCA.
3. VCCB can be ramped up along with or after VCCA.
typical total static power consumption (ICCA + ICCB)
Table 1
VCCB
0V
1.8 V
VCCA
2.5 V
3.3 V
5V
UNIT
0V
1.8 V
µA
2.5 V
PRODUCT PREVIEW
3.3 V
5V
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCES585 − JULY 2004
TYPICAL CHARACTERISTICS
TYPICAL PROPAGATION DELAY (A TO B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 1.8 V
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0
0
5
10
15
20
25
30
0
35
5
10
15
20
25
30
35
25
30
35
CL − pF
CL − pF
TYPICAL PROPAGATION DELAY (B TO A) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 1.8 V
9
9
8
8
7
7
6
6
t PLH − ns
10
t PHL − ns
10
5
5
4
4
3
3
2
2
1
1
0
0
0
5
10
15
20
25
30
35
0
5
CL − pF
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
10
15
20
CL − pF
9
PRODUCT PREVIEW
t PLH − ns
10
t PHL − ns
10
SCES585 − JULY 2004
TYPICAL CHARACTERISTICS
TYPICAL PROPAGATION DELAY (A TO B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 2.5 V
9
9
8
8
7
7
6
6
t PLH − ns
10
t PHL − ns
10
5
4
3
3
2
2
1
1
0
0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
CL − pF
CL − pF
Figure 1
TYPICAL PROPAGATION DELAY (B TO A) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 2.5 V
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
10
t PLH − ns
10
t PHL − ns
PRODUCT PREVIEW
4
5
0
0
5
10
15
20
CL − pF
25
30
35
0
5
10
15
20
CL − pF
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
25
30
35
SCES585 − JULY 2004
TYPICAL CHARACTERISTICS
TYPICAL PROPAGATION DELAY (A TO B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 3.3 V
9
9
8
8
7
7
6
6
5
4
5
4
3
3
2
2
1
1
0
0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
25
30
35
CL − pF
CL − pF
10
10
9
9
8
8
7
7
6
6
t PLH − ns
t PHL − ns
TYPICAL PROPAGATION DELAY (B TO A) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 3.3 V
5
4
5
4
3
3
2
2
1
1
0
0
0
5
10
15
20
25
30
35
0
5
CL − pF
10
15
20
CL − pF
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
PRODUCT PREVIEW
t PLH − ns
10
t PHL − ns
10
SCES585 − JULY 2004
TYPICAL CHARACTERISTICS
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 5 V
9
9
8
8
7
7
6
6
PRODUCT PREVIEW
t PLH − ns
10
t PHL − ns
10
5
5
4
4
3
3
2
2
1
1
0
0
0
5
10
15
20
25
30
35
0
5
10
CL − pF
15
20
25
30
35
CL − pF
TYPICAL PROPAGATION DELAY (B TO A) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 5 V
9
9
8
8
7
7
6
6
t PLH − ns
10
t PHL− ns
10
5
5
4
4
3
3
2
2
1
1
0
0
0
5
10
15
20
25
30
35
0
5
CL − pF
12
10
15
20
CL − pF
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
25
30
35
SCES585 − JULY 2004
PARAMETER MEASUREMENT INFORMATION
2 × VCCO
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCO
GND
RL
tw
LOAD CIRCUIT
VCCI
VCCI/2
Input
CL
RL
15 pF
15 pF
15 pF
15 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
VTP
0.15 V
0.15 V
0.3 V
0.3 V
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCA
Output
Control
(low-level
enabling)
VCCA/2
0V
tPLZ
tPZL
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
Output
VOH
VCCO/2
VOL
VCCO/2
VCCO
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
tPHL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCCA/2
VCCO/2
VOL
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VOL + VTP
VCCO/2
VOH − VTP
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns,
dv/dt ≥1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
J. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
PRODUCT PREVIEW
VCCO
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright  2005, Texas Instruments Incorporated