SSM2309GN
P-channel Enhancement-mode Power MOSFET
Low gate-charge
D
Simple drive requirement
Fast switching
G
Pb-free; RoHS compliant.
BV DSS
-30V
R DS(ON)
75mΩ
ID
-3.7A
S
DESCRIPTION
D
The SSM2309GN is in a SOT-23-3 package, which is widely used for lower
power commercial and industrial surface mount applications. It is well suited
for low voltage applications such as DC/DC converters and and general
switching applications.
S
SOT-23-3
G
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID @ TA=25°C
ID @ TA=70°C
Rating
Units
-30
V
± 20
V
Continuous Drain Current
3
-3.7
A
Continuous Drain Current
3
-3
A
1,2
IDM
Pulsed Drain Current
-12
A
PD @ TA=25°C
Total Power Dissipation
1.38
W
Linear Derating Factor
0.01
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
THERMAL DATA
Symbol
Rthj-a
2/16/2005 Rev.2.1
Parameter
Thermal Resistance, Junction-ambient
3
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Max.
Value
Unit
90
°C/W
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SSM2309GN
Electrical Characteristics @ T j = 25°C (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Units
-30
-
-
V
BVDSS
Drain-Source Breakdown Voltage
∆ BVDSS/ ∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA
-
-0.02
-
V/°C
RDS(ON)
Static Drain-Source On-Resistance
VGS=-10V, ID=-3A
-
-
75
mΩ
VGS=-4.5V, ID=-2.6A
-
-
120
mΩ
VDS=VGS, ID=-250uA
-1
-
-3
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
VDS=-10V, ID=-3A
-
5
-
S
o
VDS=-30V, VGS=0V
-
-
-1
uA
o
Drain-Source Leakage Current (Tj=55 C)
VDS=-24V, VGS=0V
-
-
-25
uA
Gate-Source Leakage
VGS=±20V
-
-
±100
nA
ID=-3A
-
5
8
nC
Drain-Source Leakage Current (Tj=25 C)
IGSS
VGS=0V, ID=-250uA
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=-24V
-
1
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=-4.5V
-
3
-
nC
VDS=-15V
-
8
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=-1A
-
5
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω , VGS=-10V
-
20
-
ns
tf
Fall Time
RD=15Ω
-
7
-
ns
Ciss
Input Capacitance
VGS=0V
-
412
660
pF
Coss
Output Capacitance
VDS=-25V
-
91
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
62
-
pF
Min.
Typ.
IS=-1.2A, VGS=0V
-
-
-1.2
V
IS=-3A, VGS=0V,
-
20
-
ns
dI/dt=100A/µs
-
15
-
nC
Source-Drain Diode
Symbol
VSD
Parameter
2
Forward On Voltage
2
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Test Conditions
Max. Units
Notes:
1.Pulse width limited by maximum junction temperature.
2.Pulse width <300us, duty cycle < 2%.
3.Surface-mounted on 1 in2 copper pad of FR4 board; 270°C/W when mounted on minimum copper pad.
2/16/2005 Rev.2.1
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SSM2309GN
45
45
40
40
-7.0V
35
-ID , Drain Current (A)
35
-ID , Drain Current (A)
-10V
T A =25°C
30
25
-5.0V
-4.5V
20
15
10
T A = 150°C
-7.0V
30
25
-5.0V
-4.5V
20
15
10
V G = - 3 .0V
5
V G = - 3 .0V
5
0
0
0
2
4
6
8
10
0
-V DS , Drain-to-Source Voltage (V)
4
6
8
10
Fig 2. Typical Output Characteristics
105
1.6
I D =3A
V G =10V
I D =-2.6A
95
1.4
T A =25°C
Normalized RDS(ON)
RDS(ON) (mΩ )
2
-V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
85
75
1.2
1.0
0.8
65
0.6
55
3
5
7
9
-50
11
0
50
100
150
o
-V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
1.3
Normalized -VGS(th) (V)
3
-IS(A)
2
T j =150°C
T j =25°C
1
0
1.1
0.9
0.7
0
0.2
0.4
0.6
0.8
1
-V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
2/16/2005 Rev.2.1
-10V
1.2
-50
0
50
100
150
T j , Junction Temperature ( o C)
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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SSM2309GN
f=1.0MHz
-VGS , Gate to Source Voltage (V)
12
1000
ID= -3A
V DS = -24V
10
C iss
C (pF)
8
6
100
C oss
C rss
4
2
0
10
0
2
4
6
8
1
5
9
13
17
21
25
29
-V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Normalized Thermal Response (Rthja)
Duty factor=0.5
-ID (A)
10
1ms
1
10ms
0.1
o
T A =25 C
Single Pulse
100ms
1s
DC
0.01
0.2
0.1
0.1
0.05
PDM
t
0.01
T
0.01
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Single Pulse
Rthja = 270°C/W
0.001
0.1
1
10
100
0.0001
0.001
0.01
-V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
-4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Circuit
2/16/2005 Rev.2.1
Charge
Q
Fig 12. Gate Charge Circuit
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SSM2309GN
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
2/16/2005 Rev.2.1
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