SSM2605GY P-CHANNEL ENHANCEMENT MODE POWER MOSFET PRODUCT SUMMARY S Fast Switching Characteristic Lower Gate Charge Small Footprint & Low Profile Package D D -30V RDS(ON) 80mΩ ID G SOT-26 BVDSS D - 4A D DESCRIPTION Advanced Power MOSFETs utilized advanced processing techniques to achieve the lowest possible on-resistance, extremely efficient and ost-effectiveness device. D G The SOT-26 package is universally used for all commercial- industrial applications. S Pb-free; RoHS-compliant ABSOLUTE MAXIMUM RATINGS Symbol Parameter VDS Drain-Source Voltage VGS Gate-Source Voltage ID@TA=25℃ ID@TA=70℃ Rating Units -30 V ±20 V 3 -4 A 3 -3.3 A -20 A Continuous Drain Current Continuous Drain Current 1 IDM Pulsed Drain Current PD@TA=25℃ Total Power Dissipation 2 W Linear Derating Factor 0.016 W/℃ TSTG Storage Temperature Range -55 to 150 ℃ TJ Operating Junction Temperature Range -55 to 150 ℃ THERMAL DATA Symbol Rthj-a 11/16/2007 Rev.1.00 Parameter Thermal Resistance Junction-ambient 3 www.SiliconStandard.com Max. Value Unit 62.5 ℃/W 1 SSM2605GY ELECTRICAL CHARACTERISTICS o (TJ=25 C unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units -30 - - V BVDSS Drain-Source Breakdown Voltage ΔBVDSS/ΔTj Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=-1mA - -0.02 - V/℃ RDS(ON) Static Drain-Source On-Resistance2 VGS=-10V, ID=-4A - - 80 mΩ VGS=-4.5V, ID=-3A - - 120 mΩ VDS=VGS, ID=-250uA -1 - -3 V VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS VDS=-5V, ID=-4A - 6 - S o VDS=-30V, VGS=0V - - -1 uA o Drain-Source Leakage Current (Tj=70 C) VDS=-24V, VGS=0V - - -25 uA Gate-Source Leakage VGS= ±20V - - ±100 nA ID=-4A - 5.5 8.8 nC Drain-Source Leakage Current (Tj=25 C) IGSS VGS=0V, ID=-250uA 2 Qg Total Gate Charge Qgs Gate-Source Charge VDS=-24V - 1 - nC Qgd Gate-Drain ("Miller") Charge VGS=-4.5V - 2.6 - nC VDS=-15V - 7 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=-1A - 6 - ns td(off) Turn-off Delay Time RG=3.3Ω,VGS=-10V - 18 - ns tf Fall Time RD=15Ω - 4 - ns Ciss Input Capacitance VGS=0V - 400 640 pF Coss Output Capacitance VDS=-25V - 90 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 30 - pF Min. Typ. IS=-1.6A, VGS=0V - - -1.2 V IS=-4A, VGS=0V, - 21 - ns dI/dt=100A/µs - 14 - nC SOURCE-DRAIN DIODE Symbol VSD Parameter Test Conditions 2 Forward On Voltage 2 trr Reverse Recovery Time Qrr Reverse Recovery Charge Max. Units Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 156℃/W when mounted on min. copper pad. 11/16/2007 Rev.1.00 www.SiliconStandard.com 2 SSM2605GY 45 40 - 10 V -7.0V T A =25 o C 40 T A = 150 o C 35 - 10 V -7.0V -ID , Drain Current (A) -ID , Drain Current (A) 35 30 -5.0V -4.5V 25 20 15 30 25 -5.0V -4.5V 20 15 10 10 5 5 V G =-3.0V 0 V G =-3.0V 0 0 1 2 3 4 5 6 7 8 9 0 1 -V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 4 5 6 7 8 1.6 = -3.0 A I DI D=-4.2A I D =-4.0A V G =10V o o A =25C C T AT=25 1.4 Normalized RDS(ON) 95 RDS(ON) (mΩ ) 3 Fig 2. Typical Output Characteristics 105 85 75 65 1.2 1.0 0.8 55 0.6 3 5 7 9 11 -50 0 -V GS , Gate-to-Source Voltage (V) 3 2 -VGS(th) (V) 2.5 T j =150 o C 100 150 Fig 4. Normalized On-Resistance v.s. Junction Temperature 4 2 50 T j , Junction Temperature ( o C) Fig 3. On-Resistance v.s. Gate Voltage -IS(A) 2 -V DS , Drain-to-Source Voltage (V) T j =25 o C 1 1.5 1 0 0.5 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -50 0 -V SD , Source-to-Drain Voltage (V) 11/16/2007 Rev.1.00 100 150 o T j , Junction Temperature ( C) Fig 5. Forward Characteristic of Reverse Diode 50 Fig 6. Gate Threshold Voltage v.s. Junction Temperature www.SiliconStandard.com 3 SSM2605GY f=1.0MHz 1000 10 C iss V DS =-24V I D =-4A 8 C (pF) -VGS , Gate to Source Voltage (V) 12 6 100 C oss 4 C rss 2 10 0 0 2 4 6 8 10 1 12 5 9 Fig 7. Gate Charge Characteristics 17 21 25 29 Fig 8. Typical Capacitance Characteristics 100 1ms 1 10ms 100ms 0.1 o T A =25 C Single Pulse 1s DC 0.01 Normalized Thermal Response (Rthja) 1 10 -ID (A) 13 -V DS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC) Duty factor=0.5 0.2 0.1 0.1 0.05 PDM t 0.01 0.01 T Single Pulse Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja = 156℃ ℃ /W 0.001 0.1 1 10 100 0.0001 0.001 -V DS , Drain-to-Source Voltage (V) 0.01 0.1 1 10 100 1000 t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VG VDS 90% QG -4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Fig 11. Switching Time Waveform 11/16/2007 Rev.1.00 Q Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 SSM2605GY Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 11/16/2007 Rev.1.00 www.SiliconStandard.com 5