SSM9987GM N-CHANNEL ENHANCEMENT MODE POWER MOSFET PRODUCT SUMMARY D2 Low Gate Charge Single Drive Requirement Surface Mount Package D1 D2 D1 G2 SO-8 S1 80V RDS(ON) 90mΩ ID S2 DESCRIPTION BVDSS 3.5A G1 The advanced power MOSFETs from Silicon Standard Corp. provide the designer with the best combination of fast switching, ruggedized device design, lower on-resistance and cost-effectiveness. D2 D1 G2 G1 S1 Pb-free; RoHS-compliant S2 ABSOLUTE MAXIMUM RATINGS Parameter Symbol VDS Drain-Source Voltage VGS Gate-Source Voltage ID@TA=25℃ ID@TA=70℃ Rating Units 80 V ±25 V 3 3.5 A 3 2.8 A Continuous Drain Current , VGS @ 10V Continuous Drain Current , VGS @ 10V 1 IDM Pulsed Drain Current 30 A PD@TA=25℃ Total Power Dissipation 2 W Linear Derating Factor 0.016 W/℃ TSTG Storage Temperature Range -55 to 150 ℃ TJ Operating Junction Temperature Range -55 to 150 ℃ THERMAL DATA Symbol Rthj-a 05/31/2007 Rev.1.00 Parameter Thermal Resistance Junction-ambient 3 Max. www.SiliconStandard.com Value Unit 62.5 ℃/W 1 SSM9987GM ELECTRICAL CHARACTERISTICS @Tj=25oC(unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. 80 - - V - 0.08 - V/℃ VGS=10V, ID=3A - - 90 mΩ VGS=4.5V, ID=1A - - 105 mΩ Gate Threshold Voltage VDS=VGS, ID=250uA 1 - 3 V gfs Forward Transconductance VDS=10V, ID=3A - 7 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=80V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=70oC) VDS=64V ,VGS=0V - - 25 uA Gate-Source Leakage VGS=±25V - - ±100 nA ID=3A - 11 18 nC BVDSS Drain-Source Breakdown Voltage ΔBVDSS/ΔTj Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA RDS(ON) VGS(th) IGSS Static Drain-Source On-Resistance 2 VGS=0V, ID=1mA 2 Max. Units Qg Total Gate Charge Qgs Gate-Source Charge VDS=64V - 3 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 5 - nC VDS=40V - 8 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=1A - 4 - ns td(off) Turn-off Delay Time RG=3.3Ω,VGS=10V - 24 - ns tf Fall Time RD=40Ω - 5 - ns Ciss Input Capacitance VGS=0V - 980 1570 pF Coss Output Capacitance VDS=25V - 70 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 50 - pF Rg Gate Resistance f=1.0MHz - 1.2 1.8 Ω Min. Typ. IS=1.6A, VGS=0V - - 1.2 V Source-Drain Diode Symbol VSD Parameter Test Conditions 2 Forward On Voltage 2 Max. Units trr Reverse Recovery Time IS=3A, VGS=0V, - 30 - ns Qrr Reverse Recovery Charge dI/dt=100A/µs - 40 - nC Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 135℃/W when mounted on min. copper pad. 05/31/2007 Rev.1.00 www.SiliconStandard.com 2 SSM9987GM 30 30 10V 7.0V 5.0V 4.5V ID , Drain Current (A) 25 T A =150 C 25 20 15 V G =3.0V 10 5 20 15 10 V G =3.0V 5 0 0 0 3 6 9 12 0 3 V DS , Drain-to-Source Voltage (V) 9 12 Fig 2. Typical Output Characteristics 180 2.3 ID=3A V G =10V I D =1A 150 1.8 o T A =25 C Normalized RDS(ON) RDS(ON) (mΩ) 6 V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 120 90 1.3 0.8 60 0.3 2 4 6 8 -50 10 100 150 Fig 4. Normalized On-Resistance v.s. Junction Temperature 1.5 3 1.2 Normalized VGS(th) (V) 4 o 50 T j , Junction Temperature ( C) Fig 3. On-Resistance v.s. Gate Voltage o T j =150 C 0 o V GS , Gate-to-Source Voltage (V) IS(A) 10V 7.0V 5.0V 4.5V o ID , Drain Current (A) T A =25 o C T j =25 C 2 0.9 0.6 1 0.3 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -50 V SD , Source-to-Drain Voltage (V) Fig 5. Forward Characteristic of Reverse Diode 05/31/2007 Rev.1.00 0 50 100 150 T j , Junction Temperature ( o C) Fig 6. Gate Threshold Voltage v.s. Junction Temperature www.SiliconStandard.com 3 SSM9987GM f=1.0MHz 15 10000 V DS =64V V DS =50V V DS =40V 12 C iss 1000 9 C (pF) VGS , Gate to Source Voltage (V) I D =3A 6 100 C oss C rss 3 0 10 0 10 20 1 30 5 9 13 17 21 25 29 V DS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Normalized Thermal Response (R thja) Duty factor=0.5 10 ID (A) 100us 1ms 1 10ms 100ms 0.1 o T A =25 C Single Pulse 1s DC 0.01 0.2 0.1 0.1 0.05 PDM t 0.02 T 0.01 0.01 Duty factor = t/T Peak Tj = PDM x Rthja + Ta Single Pulse Rthja = 135℃/W 0.001 0.1 1 10 100 1000 0.0001 0.001 0.01 V DS , Drain-to-Source Voltage (V) 0.1 1 10 100 1000 t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance 30 VG ID , Drain Current (A) V DS =5V QG 20 T j =25 o C 4.5V T j =150 o C QGS QGD 10 Charge Q 0 0 2 4 6 V GS , Gate-to-Source Voltage (V) Fig 11. Transfer Characteristics 05/31/2007 Rev.1.00 Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 SSM9987GM Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 05/31/2007 Rev.1.00 www.SiliconStandard.com 5