SSM4509GM
N- AND P-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Simple drive requirement
N-CH BV DSS
D2
D2
D1 D2
D1 D1
D1
Low on-resistance
Fast switching characteristic
SO-8
30V
14mΩ
R DS(ON)
ID
G2
G2
S2
G1 S2
S1 G1
S1
10A
P-CH BVDSS
-30V
RDS(ON)
Description
20mΩ
ID
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
-8.4A
D2
D1
G2
G1
The SSM4509GM is in the SO-8 package, which is widely preferred for
commercial and industrial surface mount applications, and is well suited
for applications such as low-voltage motor drives and inverters.
S1
S2
Pb-free lead finish (second-level interconnect)
Absolute Maximum Ratings
Symbol
Parameter
Rating
N-channel
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID @ TA=25°C
ID @ TA=70°C
Units
P-channel
30
-30
V
±20
±20
V
3
10
-8.4
A
3
7.9
-6.7
A
30
-30
A
Continuous Drain Current
Continuous Drain Current
1
IDM
Pulsed Drain Current
PD @ TA=25°C
Total Power Dissipation
2.0
Linear Derating Factor
0.016
W
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
Thermal Data
Symbol
Rthj-a
3/10/2005 Rev.1.01
Parameter
Thermal Resistance Junction-ambient
3
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Max.
Value
Unit
62.5
°C/W
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SSM4509GM
N-channel Electrical Characteristics @ T j= 25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/ ∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
RDS(ON)
Static Drain-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
2
Typ. Max. Units
30
-
-
V
-
0.02
-
V/°C
VGS=10V, ID=9A
-
-
14
mΩ
VGS=4.5V, ID=5A
-
-
20
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VDS=10V, ID=9A
-
14
-
S
o
VDS=30V, VGS=0V
-
-
1
uA
o
Drain-Source Leakage Current (Tj=70 C)
VDS=24V, VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS=±20V
-
-
±100
nA
ID=9A
-
23
65
nC
Drain-Source Leakage Current (Tj=25 C)
IGSS
VGS=0V, ID=250uA
Min.
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=24V
-
6
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
14
-
nC
VDS=15V
-
14
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
10
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω , VGS=10V
-
36
-
ns
tf
Fall Time
RD=15Ω
17
-
ns
Ciss
Input Capacitance
VGS=0V
-
1770 2830
pF
Coss
Output Capacitance
VDS=25V
-
430
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
350
-
pF
Source-Drain Diode
Symbol
VSD
Parameter
2
Forward On Voltage
2
Test Conditions
Min.
Typ. Max. Units
IS=1.7A, VGS=0V
-
-
1.2
V
trr
Reverse Recovery Time
IS=9A, VGS=0V
-
31
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
25
-
nC
3/10/2005 Rev.1.01
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2 of 8
SSM4509GM
P-channel Electrical Characteristics @ Tj= 25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
-30
-
-
V
-
0.02
-
V/°C
VGS=-10V, ID=-8A
-
-
20
mΩ
VGS=-4.5V, ID=-4A
-
-
30
mΩ
VDS=VGS, ID=-250uA
-1
-
-3
V
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA-
RDS(ON)
2
Static Drain-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
IGSS
VGS=0V, ID=-250uA
Max. Units
VDS=-10V, ID=-8A
-
14
-
S
o
VDS=-30V, VGS=0V
-
-
-1
uA
o
Drain-Source Leakage Current (Tj=70 C)
VDS=-24V, VGS=0V
-
-
-25
uA
Gate-Source Leakage
VGS=±20V
-
-
±100
nA
Drain-Source Leakage Current (Tj=25 C)
2
Qg
Total Gate Charge
ID=-8A
-
27
45
nC
Qgs
Gate-Source Charge
VDS=-24V
-
4
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=-4.5V
-
18
-
nC
VDS=-15V
-
16
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=-1A
-
11
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω , VGS=-10V
-
40
-
ns
tf
Fall Time
RD=15Ω
-
25
-
ns
Ciss
Input Capacitance
VGS=0V
-
1580 2530
pF
Coss
Output Capacitance
VDS=-25V
-
540
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
450
-
pF
Source-Drain Diode
Symbol
VSD
Parameter
Test Conditions
Forward On Voltage2
2
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Min.
Typ.
IS=-1.7A, VGS=0V
-
-
Max. Units
-1.2
V
IS=-8A, VGS=0V
-
40
-
ns
dI/dt=-100A/µs
-
32
-
nC
Notes:
1.Pulse width limited by max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board ; 135°C/W when mounted on min. copper pad.
3/10/2005 Rev.1.01
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3 of 8
SSM4509GM
N-Channel
160
140
T A = 150 o C
120
10V
7.0V
120
ID , Drain Current (A)
ID , Drain Current (A)
10V
7.0V
T A = 25 o C
140
100
80
5.0V
60
4.5V
40
100
80
60
5.0V
40
4.5V
20
20
V G =3.0V
V G =3.0V
0
0
0
1
2
3
0
4
V DS , Drain-to-Source Voltage (V)
1
2
3
4
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
18
1.6
ID=9A
V G =10V
ID=5A
o
T A =25 C
Normalized RDS(ON)
1.4
RDS(ON) (mΩ )
15
12
1.2
1.0
0.8
9
0.6
3
5
7
9
11
-50
0
50
100
V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( o C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
150
2.5
10
8
2.0
T j =150 o C
VGS(th) (V)
IS(A)
6
T j =25 o C
4
1.5
2
0
1.0
0
0.2
0.4
0.6
0.8
1
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
3/10/2005 Rev.1.01
1.2
-50
0
50
100
150
T j , Junction Temperature ( o C)
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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4 of 8
SSM4509GM
N-Channel
f=1.0MHz
10000
I D =9A
V DS =24V
12
10
C iss
8
C (pF)
VGS , Gate to Source Voltage (V)
14
6
1000
C oss
C rss
4
2
0
100
0
10
20
30
40
50
1
5
9
Fig 7. Gate Charge Characteristics
17
21
25
29
Fig 8. Typical Capacitance Characteristics
100
10
1ms
10ms
1
100ms
1s
0.1
T A =25 o C
Single Pulse
DC
0.01
Normalized Thermal Response (Rthja)
1
100us
ID (A)
13
V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Duty factor=0.5
0.2
0.1
0.1
0.05
0.02
0.01
PDM
t
0.01
T
Single Pulse
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja =135o C/W
0.001
0.1
1
10
100
0.0001
0.001
0.01
V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
3/10/2005 Rev.1.01
Charge
Q
Fig 12. Gate Charge Waveform
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5 of 8
SSM4509GM
P-Channel
160
120
-10V
o
T A = 25 C
140
-10V
o
T A = 150 C
-7.0V
-7.0V
-ID , Drain Current (A)
-ID , Drain Current (A)
100
120
100
80
-5.0V
-4.5V
60
40
60
-5.0V
-4.5V
40
20
V G =-3.0V
20
80
0
V G =-3.0V
0
0
1
2
3
4
5
6
7
0
1
-V DS , Drain-to-Source Voltage (V)
3
4
5
6
-V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
33
1.6
I D =- 8 A
V G =-10V
ID=-4A
30
o
1.4
Normalized R DS(ON)
T A =25 C
27
RDS(ON) (mΩ)
2
24
21
1.2
1.0
0.8
18
0.6
15
3
5
7
9
-50
11
0
50
100
150
o
-V GS ,Gate-to-Source Voltage (V)
T j , Junction Temperature ( C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
8
2.5
6
T j =150 o C
4
-VGS(th) (V)
-IS(A)
2
T j =25 o C
1.5
2
1
0
0
0.2
0.4
0.6
0.8
1
-V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
3/10/2005 Rev.1.01
1.2
-50
0
50
100
150
T j , Junction Temperature ( o C)
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
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6 of 8
SSM4509GM
P-Channel
f=1.0MHz
14
10000
-VGS , Gate to Source Voltage (V)
12
I D =- 8 A
V DS =-24V
10
C (pF)
8
C iss
1000
6
C oss
C rss
4
2
0
100
0
10
20
30
40
50
60
1
5
9
Fig 7. Gate Charge Characteristics
17
21
25
29
Fig 8. Typical Capacitance Characteristics
1
100us
10
1ms
10ms
1
100ms
0.1
1s
o
T A =25 C
Single Pulse
DC
0.01
Normalized Thermal Response (Rthja)
100
-ID (A)
13
-V DS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Duty factor=0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
PDM
t
Single Pulse
T
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja=135oC/W
0.001
0.1
1
10
100
0.0001
0.001
0.01
-V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
VDS
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
90%
QG
-4.5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Waveform
3/10/2005 Rev.1.01
Charge
Q
Fig 12. Gate Charge Waveform
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SSM4509GM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
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