STB160NF02L N-CHANNEL 20V - 0.0018Ω - 160A D2PAK STripFET™ POWER MOSFET PRELIMINARY DATA TYPE STB160NF02L ■ ■ ■ ■ ■ VDSS RDS(on) ID 20 V < 0.0027 Ω 160 A TYPICAL RDS(on) = 0.0018Ω LOW THRESHOLD DRIVE ULTRA LOW ON-RESISTANCE VERY LOW GATE CHARGE 100% AVALANCHE TESTED DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density with ultra low on-resistance, superior switching characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. This device is particularly suitable for high current, low voltage switching application where efficiency is crucial. 3 1 D2PAK (TO-263) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ BUCK CONVERTERS IN HIGH PERFORMANCE TELECOM AND VRMs ■ DC-DC CONVERTERS ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR Parameter Value Unit Drain-source Voltage (VGS = 0) 20 V Drain-gate Voltage (RGS = 20 kΩ) 20 V VGS Gate- source Voltage ±15 V ID (1) Drain Current (continuos) at TC = 25°C 160 A ID Drain Current (continuos) at TC = 100°C 113 A Drain Current (pulsed) 640 A Total Dissipation at TC = 25°C 300 W 2 W/°C 2.65 mJ –65 to 175 °C 175 °C IDM (●) PTOT Derating Factor EAS (2) Tstg Tj Single Pulse Avalanche Energy Storage Temperature Max. Operating Junction Temperature (●) Pulse width limited by safe operating area (1) Limited by Package (2) I SD ≤100A, di/dt ≤300A/µs, V DD ≤ V(BR)DSS, Tj ≤ TJMAX. February 2001 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/7 STB160NF02L THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 0.5 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Min. Typ. Max. 20 Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 V Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 10 µA Gate-body Leakage Current (VDS = 0) VGS = ±15V ±100 nA Max. Unit ON (1) Symbol Parameter Test Conditions Min. Typ. VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10 V, ID = 80 A 0.0018 0.0027 Ω VGS = 5 V, ID = 80 A 0.0038 0.0064 Ω On State Drain Current VDS > ID(on) x RDS(on)max, VGS = 10V ID(on) 1 V 160 A DYNAMIC Symbol gfs (1) 2/7 Parameter Forward Transconductance Test Conditions VDS > ID(on) x RDS(on)max, ID =80 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. Max. Unit 210 S 5600 pF Ciss Input Capacitance Coss Output Capacitance 3250 pF Crss Reverse Transfer Capacitance 750 pF STB160NF02L ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions Min. VDD = 10V, ID = 80A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 16V, ID = 160A, VGS = 10V Typ. Max. Unit 30 ns 390 ns 130 20 54 nC nC nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off-Delay Time Fall Time VDD = 10V, ID = 80A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) 100 90 ns ns td(off) tf tc Off-voltage Rise Time Fall Time Cross-over Time Vclamp =16V, ID =40A RG = 4.7Ω, VGS = 10V 105 50 100 ns ns ns SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Source-drain Current (pulsed) VSD (2) Forward On Voltage ISD = 160A, VGS = 0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 80A, di/dt = 100A/µs, VDD = 15V, Tj = 25°C (see test circuit, Figure 5) IRRM Typ. Source-drain Current ISDM (1) trr Qrr Min. 90 225 5 Max. Unit 160 A 640 A 1.3 V ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3/7 STB160NF02L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/7 STB160NF02L D2PAK MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 D1 E 8 0.315 10 E1 10.4 0.393 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 0.126 R 0.015 0º 8º 3 V2 0.4 5/7 1 STB160NF02L D2PAK FOOTPRINT TUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix ”T4”)* REEL MECHANICAL DATA DIM. mm MIN. A DIM. mm inch MIN. MAX. MIN. MAX. A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626 D 1.5 1.6 0.059 0.063 D1 1.59 1.61 0.062 0.063 E 1.65 1.85 0.065 0.073 F 11.4 11.6 0.449 0.456 K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 11.9 12.1 0.468 0.476 P2 1.9 2.1 R 50 1.574 T 0.25 0.35 0.0098 0.0137 W 23.7 24.3 * on sales type 6/7 0.075 0.082 0.933 0.956 MAX. MIN. 330 B 1.5 C 12.8 D 20.2 G 24.4 N 100 T TAPE MECHANICAL DATA inch MAX. 12.992 0.059 13.2 0.504 0.520 26.4 0.960 1.039 0795 3.937 30.4 1.197 BASE QTY BULK QTY 1000 1000 STB160NF02L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. 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