STF40NF06 N-channel 60V - 0.024Ω - 23A - TO-220FP STripFET™ II Power MOSFET General features Type VDSS RDS(on) ID STF40NF06 60V <0.028Ω 23A ■ Exceptional dv/dt capability ■ Low gate charge at 100°C ■ Application oriented characterization ■ 100% avalanche tested 3 1 2 TO-220FP Description This MOSFET is the latest development of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. Internal schematic diagram Applications ■ Switching application Order codes Part number Marking Package Packaging STF40NF06 F40NF06 TO-220FP Tube September 2006 Rev 3 1/12 www.st.com 12 Contents STF40NF06 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 ................................................ 8 STF40NF06 1 Electrical ratings Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter VDS Drain-source voltage (VGS = 0) VGS Gate-source voltage Value Unit 60 V ± 20 V ID Drain current (continuous) at TC = 25°C 23 A ID Drain current (continuous) at TC=100°C 16 A Drain current (pulsed) 92 A Total dissipation at TC = 25°C 30 W Derating Factor 0.2 W/°C dv/dt(2) Peak diode recovery voltage slope 10 V/ns EAS(3) Single pulse avalanche energy 250 mj VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1s; Tc= 25°C) 2500 V TJ Tstg Operating junction temperature Storage temperature -55 to 175 °C Thermal resistance junction-case Max 5.0 °C/W Maximum lead temperature for soldering purpose 275 °C IDM (1) PTOT 1. Pulse width limited by safe operating area 2. ISD ≤40A, di/dt ≤300A/µs, VDD ≤V(BR)DSS, Tj ≤TJMAX 3. Starting Tj = 25°C, ID = 20A, VDD = 30V Table 2. Rthj-case Tl Thermal data 3/12 Electrical characteristics 2 STF40NF06 Electrical characteristics (TCASE=25°C unless otherwise specified) Table 3. Symbol V(BR)DSS On/off states Parameter Drain-source breakdown voltage Test conditions ID = 250 µA, VGS= 0 Zero gate voltage drain current (VGS = 0) IGSS Gate body leakage current (VDS = 0) VGS = ±20V VGS(th) Gate threshold voltage VDS= VGS, ID = 250µA RDS(on) Static drain-source on resistance VGS= 10V, ID= 11.5A Symbol Typ. Max. 60 Unit V VDS = Max rating, IDSS Table 4. Min. 1 10 µA µA ± 100 nA 4 V 0.024 0.028 Ω Typ. Max. Unit VDS = Max rating @125°C 2 Dynamic Parameter Test conditions Min. gfs (1) Forward transconductance VDS = 30V, ID = 11.5A 12 S Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS =25V, f=1 MHz, VGS=0 920 225 80 pF pF pF Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD=48V, ID = 10A VGS =10V 32 6.5 15 43 nC nC nC Max. Unit 1. Pulsed: pulse duration=300µs, duty cycle 1.5% Table 5. Symbol 4/12 Switching times Parameter Test conditions Min. Typ. td(on) tr Turn-on Delay Time Rise Time VDD = 30V, ID = 20A, RG = 4.7Ω, VGS = 10V (see Figure 13) 27 11 ns ns td(off) tf Turn-off-delay time Fall time VDD = 30V, ID = 20A, RG = 4.7Ω, VGS =10V (see Figure 13) 27 11 ns ns STF40NF06 Electrical characteristics Table 6. Symbol Source drain diode Max Unit Source-drain current 23 A ISDM(1) Source-drain current (pulsed) 92 A VSD(2) Forward on voltage 1.3 V ISD trr Qrr IRRM Parameter Reverse recovery time Reverse recovery charge Reverse recovery current Test conditions Min Typ. ISD=23A, VGS=0 ISD=40A, di/dt = 100A/µs, VDD=10V, Tj=150°C (see Figure 15) 63 150 4.8 ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300µs, duty cycle 1.5% 5/12 Electrical characteristics STF40NF06 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/12 STF40NF06 Electrical characteristics Figure 7. Gate charge vs gate-source voltage Figure 8. Figure 9. Normalized gate threshold voltage vs temperature Figure 11. Source-drain diode forward characteristics Capacitance variations Figure 10. Normalized on resistance vs temperature Figure 12. Normalized breakdown voltage vs temperature 7/12 Test circuit 3 STF40NF06 Test circuit Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit Figure 15. Test circuit for inductive load Figure 16. Unclamped Inductive load test switching and diode recovery times circuit Figure 17. Unclamped inductive waveform 8/12 Figure 18. Switching time waveform STF40NF06 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/12 Package mechanical data STF40NF06 TO-220FP MECHANICAL DATA mm. DIM. MIN. A 4.4 inch TYP MAX. MIN. TYP. 4.6 0.173 0.181 MAX. 0.106 B 2.5 2.7 0.098 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L7 L3 L6 F2 H G G1 F F1 L7 L2 10/12 L5 1 2 3 L4 STF40NF06 5 Revision history Revision history Table 7. Revision history Date Revision Changes 12-Nov-2004 1 First release 27-May-2005 2 Final datasheet 04-Sep-2006 3 New template, no content change 11/12 STF40NF06 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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