STP08DP05 Low voltage 8-Bit constant current Led sink with full outputs error detection Features ■ Low voltage power supply down to 3V ■ 8 constant current output channels ■ Adjustable output current through external resistor ■ Short and open output error detection ■ Serial Data IN/Parallel data OUT ■ 3.3V micro driver-able ■ Output current: 5-100mA ■ 30MHz clock frequency ■ Available in high thermal efficiency TSSOP exposed pad ■ ESD protection 2.5kV HBM, 200V MM Dip-16 TSSOP16 (Exposed pad) TSSOP16 SO-16 The detection functionality is implemented without increasing the pin number, through a secondary function of the output enable and latch pin (DM1 and DM2 respectively), a dedicated logic sequence allows the device to enter or leave from detection mode. Through an external resistor, users can adjust the STP08DP05 output current, controlling in this way the light intensity of LEDs, in addition, user can adjust LED’s brightness intensity from 0% to 100% via OE/DM2 pin. Description The STP08DP05 is a monolithic, low voltage, low current power 8-bit shift register designed for LED panel displays. The STP08DP05 contains a 8-bit serial-in, parallel-out shift register that feeds a 8bitD-type storage register. In the output stage, eight regulated current sources were designed to provide 5-100mA constant current to drive the LEDs. The STP08DP05 guarantees a 20V output driving capability, allowing users to connect more LEDs in series. The high clock frequency, 30MHz, also satisfies the system requirement of high volume data transmission. The 3.3V of voltage supply is well useful for applications that interface any micro from 3.3V. Compared with a standard TSSOP package, the TSSOP exposed pad increases heat dissipation capability by a 2.5 factor.. The STP08DP05 is backward compatible in the functionality and footprint with STP8C/L596 and extends its functionality with open and short detection on the outputs. The detection circuit checks 3 different conditions that can occur on the output line: short to GND, short to VO or open line. The data detection results are loaded in the shift register and shifted out via the serial line output. Table 1. Device summary Part Number Package Packaging STP08DP05B1R DIP-16 25 parts per tube STP08DP05MTR SO-16 (Tape & Reel) 2500 parts per reel STP08DP05TTR TSSOP16 (Tape & Reel) 2500 parts per reel STP08DP05XTTR TSSOP16 Exposed-Pad (Tape & Reel) 2500 parts per reel May 2007 Rev 2 1/30 www.st.com 30 Contents STP08DP05 Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Equivalent circuit and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 Truth table and timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.1 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.2 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10 Detection mode functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.1 Phase one: “entering in detection mode“ . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.2 Phase two: “error detection“ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10.3 Phase three: “resuming to normal mode” . . . . . . . . . . . . . . . . . . . . . . . . . 20 10.4 Error detection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 11 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 2/30 STP08DP05 1 Summary description Summary description Table 2. Typical current accuracy Current accuracy Output voltage Output current Between bits Between ICs ±1.5% ±5% ≥1.3V 1.1 20 to 100mA Pin connection and description Figure 1. Note: Connections diagram The Exposed-pad is electrically not connected Table 3. Pin description PIN N° Symbol Name and function 1 GND Ground terminal 2 SDI Serial data input terminal 3 CLK Clock input terminal 4 LE/DM1 Latch input terminal 5-12 OUT 0-7 Output terminal 13 OE/DM2 Output enable input terminal (active low) 14 SDO 15 R-EXT 16 VDD Serial data out terminal Constant current programming 5V Supply voltage terminal 3/30 Block diagram 2 Block diagram Figure 2. Normal mode - block diagram 4/30 STP08DP05 STP08DP05 3 Maximum rating Maximum rating Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 3.1 Absolute maximum ratings Table 4. Absolute maximum ratings Symbol 3.2 Parameter Value Unit 0 to 7 V VDD Supply voltage IGND VO Output voltage -0.5 to 20 V IO Output current 100 mA IGND GND terminal current 800 mA fCLK Clock frequency 50 MHz TOPR Operating temperature range -40 to +125 °C TSTG Storage temperature range -55 to +150 °C Thermal data Table 5. Thermal data Symbol Parameter RthJA Thermal resistance junction-ambient DIP-16 SO-16 TSSOP-16 60 75 85 TSSOP-16 (1) (exposed pad) Unit 37.5 °C/W 1. The Exposed-Pad should be soldered to the PBC to realize the thermal benefits 5/30 Maximum rating 3.3 STP08DP05 Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Test conditions Min Typ Max Unit 5.5 V 20 V 100 mA VDD Supply voltage VO Output voltage IO Output current OUTn IOH Output current SERIAL-OUT +1 mA IOL Output current SERIAL-OUT -1 mA VIH Input voltage 0.7VDD VDD+0.3 V VIL Input voltage -0.3 0.3VDD V 3.0 5 twLAT LE/DM1 pulse width 20 ns twCLK CLK pulse width 20 ns twEN OE/DM2 pulse width 200 ns 7 ns tHOLD(D) Hold time for DATA 4 ns tSETUP(L) Setup time for LATCH 15 ns tSETUP(D) Setup time for DATA fCLK Clock frequency VDD = 3.0 to 5.0V Cascade operation (1) 30 MHz 1. If the device is connected in cascade, it may not be possible achieve the maximum data transfer. Please consider the timings carefully. 6/30 STP08DP05 Electrical characteristics 4 Electrical characteristics Table 7. Electrical characteristics (VDD=3.3V to 5V, T = 25°C, unless otherwise specified.) Symbol Parameter Test conditions Min Typ Max Unit VIH Input voltage high level 0.7VDD VDD V VIL Input voltage low level GND 0.3VDD V IOH Output leakage current VOH = 20V 0.5 10 µA VOL Output voltage (Serial-OUT) IOL = 1mA 0.03 0.4 V VOH Output voltage (Serial-OUT) IOH = -1mA VOH - VDD =- 0.4V V VO = 0.3V, Rext = 3.9kΩ 4.25 5 5.75 VO = 0.3V, Rext = 970Ω 19 20 21 VO = 1.3V, Rext = 190Ω 96 100 104 VO = 0.3VREXT = 3.9kΩ ±5 ±8 VO = 0.3VREXT = 970Ω ± 1.5 ±3 VO = 1.3VREXT =190Ω ± 1.2 ±3 150 300 600 KΩ 100 200 400 KΩ REXT = 980 OUT 0 to 7 = OFF 4 5 IDD(OFF2) REXT = 250 OUT 0 to 7 = OFF 11.2 13.5 IDD(ON1) REXT = 980 OUT 0 to 7 = ON 4.5 5 REXT = 250 OUT 0 to 7 = ON 11.7 13.5 IOL1 IOL2 Output current IOL3 ∆IOL1 ∆IOL2 ∆IOL3 RSIN(up) Output current error between bit (All Output ON) Pull-up resistor RSIN(down) Pull-down resistor IDD(OFF1) mA % Supply current (OFF) mA Supply current (ON) IDD(ON2) Thermal Thermal protection (1) 170 °C 1. Guaranteed by desing (not tested) The thermal protection switches OFF only the outputs current 7/30 Switching characteristics STP08DP05 5 Switching characteristics Table 1. Switching characteristics (VDD = 5V, T = 25°C, unless otherwise specified.) Symbol Parameter Test conditions Min Typ Max VDD = 3.3V 35 70 VDD = 5V 18 35 tPLH1 Propagation delay time, CLK-OUTn, LE\DM1 = H, OE\DM2 = L Propagation delay time, LE\DM1 -OUTn, OE\DM2 = L VDD = 3.3V 48 90 tPLH2 VDD = 5V 30 60 Propagation delay time, OE\DM2-OUTn, LE\DM1 = H VDD = 3.3V 55 110 tPLH3 VDD = 5V 36 75 Propagation delay time, CLK-SDO VDD = 3.3V 7 14 tPLH VDD = 5V 4 8 Propagation delay time, CLK-OUTn, LE\DM1 = H, OE\DM2 = L VDD = 3.3V 10 20 tPHL1 VDD = 5V 7 14 Propagation delay time, LE\DM1 -OUTn, OE\DM2 = L VDD = 3.3V 24 50 tPHL2 VDD = 5V 20 40 Propagation delay time, OE\DM2-OUTn, LE\DM1 = H VDD = 3.3V 20 40 tPHL3 VDD = 5V 17 35 Propagation delay time, CLK-SDO VDD = 3.3V 22 30 tPHL VDD = 5V 18 25 Output rise time 10~90% of voltage waveform VDD = 3.3V 25 60 tON VDD = 5V 10 25 Output fall time 90~10% of voltage waveform VDD = 3.3V 5 15 tOFF VDD = 5V 4 12 ns ns ns VDD = 3.3 V VIL = GND IO = 20mA REXT = 1KΩ VIH = VDD CL = 10pF VL = 3.0 V RL = 60 Ω ns ns ns ns ns ns ns tr CLK rise time (1) 5000 ns tf CLK fall time (1) 5000 ns 1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully. 8/30 Unit STP08DP05 6 Equivalent circuit and outputs Equivalent circuit and outputs Figure 3. OE/DM2 terminal Figure 4. LE/DM1 terminal Figure 5. CLK, SDI terminal 9/30 Equivalent circuit and outputs Figure 6. 10/30 SDO terminal STP08DP05 STP08DP05 Truth table and timing diagram 7 Truth table and timing diagram 7.1 Truth table Table 8. Truth table Clock Note: LE/DM1 OE/DM2 SDI OUT0 ........ OUT0 ........ OUT7 SDO H L Dn Dn ..... Dn -5 ..... Dn -7 Dn -7 L L Dn + 1 No Change Dn -7 H L Dn + 2 Dn +2 ..... Dn -3 ..... Dn -5 Dn -5 X L Dn + 3 Dn +2 ..... Dn -3 ..... Dn -5 Dn -5 X H Dn + 3 OFF Dn -5 OUT0 to OUT7 = ON when Dn = H; OUT0 to OUT7 = OFF when Dn = L. 11/30 Truth table and timing diagram 7.2 12/30 Timing diagram Figure 7. Timing diagram - normal mode Figure 8. Clock, serial-in, serial-out STP08DP05 STP08DP05 Truth table and timing diagram Figure 9. Clock, serial-in, latch, enable, outputs Figure 10. Outputs 13/30 Typical characteristics 8 STP08DP05 Typical characteristics Figure 11. Output current-REXT resistor 8000 7000 Rext (Ohm) 6000 5000 4000 3000 2000 1000 0 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 Ouput Current (mA) Table 9. Output current-REXT resistor 14/30 Output Current (mA) 3 5 10 20 50 80 130 Rext (Ω) 6740 3930 1913 963 386 241 124 STP08DP05 Typical characteristics Figure 12. Power dissipation vs temperature package Note: The Exposed-Pad should be soldered to the PBC to realize the thermal benefits. 15/30 Test circuit STP08DP05 9 Test circuit Figure 13. DC characteristics Figure 14. AC characteristics 16/30 STP08DP05 Test circuit Figure 15. Timing example for open and/or short detection 17/30 Detection mode functionality STP08DP05 10 Detection mode functionality 10.1 Phase one: “entering in detection mode“ From the “Normal Mode” condition the device can switch to the “Error Mode“ by a logic sequence on the OE/DM2 and LE/DM1 pins as showed in the following table and diagram: Table 10. Entering in detection truth table CLK 1° 2° 3° 4° 5° OE/DM2 H L H H H LE/DM1 L L L H L Figure 16. Entering in detection timing diagram After these five CLK cycles the device goes into the “Error Detection Mode“ and at the 6th rise front of CLK the SDI data are ready for the sampling. 18/30 STP08DP05 10.2 Detection mode functionality Phase two: “error detection“ The eight data bits must be set “1“ in order to set ON all the outputs during the detection. The data are latched by LE/DM1 and after that the outputs are ready for the detection process. When the Micro controller switches the OE/DM2 to LOW, the device drives the LEDs in order to analyze if an OPEN or SHORT condition has occurred. Figure 17. Detection diagram The LEDs status will be detected at least in 1 microsecond and after this time the microcontroller sets OE\DM2 in HIGH state and the output data detection result will go to the microprocessor via SDO. Detection mode and normal mode use both the same format data. As soon as all the detection data bits are available on the serial line, the device may go back to normal mode of operation. To re-detect the status the device must go back in normal mode and reentering in error detection mode . 19/30 Detection mode functionality 10.3 STP08DP05 Phase three: “resuming to normal mode” The sequence for re-entering in normal mode is showed in the following Table and diagram: Table 11. Resuming to normal mode timing diagram CLK 1° 2° 3° 4° 5° OE/DM2 H L H H H LE/DM1 L L L L L Figure 18. Resuming to normal mode timing diagram Note: 20/30 For proper device operation the “Entering in detection” sequence must be follow by a “Resume Mode” sequence, isn’t possible to insert consecutive equal sequence. STP08DP05 10.4 Detection mode functionality Error detection conditions Table 12. Detection condition (VDD = 3.3 to 5 V Temperature range 25°C) Note: SW-1 or SW-3b Open Line or Output Short to GND detected SW-2 or SW-3a Short on LED or Short ==> VO ≥ 2.5V to V-LED detected ==> IODEC ≤ 0.5 x IO No error detected ==> IODEC ≥ 0.5 x IO No error detected ==> VO ≤ 2.2 V Where: IO = the output current programmed by the REXT , IODEC = the detected output current in detection mode. Figure 19. Detection circuit 16 21/30 Package mechanical data 11 STP08DP05 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 22/30 STP08DP05 Package mechanical data Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 23/30 Package mechanical data STP08DP05 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0˚ L 0.45 A 0.60 0.0256 BSC 8˚ 0˚ 0.75 0.018 8˚ 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 24/30 STP08DP05 Package mechanical data TSSOP16 EXPOSED PAD MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A 1.2 A1 0.15 A2 0.8 b TYP. MAX. 0.047 0.004 0.006 0.039 0.041 1.05 0.031 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5.1 0.193 D1 1.7 E 6.2 6.4 6.6 E1 4.3 4.4 4.5 E2 1.5 e 1 MIN. 5 0.197 0.201 0.244 0.252 0.260 0.169 0.173 0.177 0.067 0.059 0.65 K 0° L 0.45 0.60 0.0256 8° 0° 0.75 0.018 8° 0.024 0.030 7419276A 25/30 Package mechanical data STP08DP05 Tape & Reel TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. A MAX. MIN. 330 13.2 TYP. MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 26/30 TYP 0.504 22.4 0.519 0.882 Ao 6.7 6.9 0.264 0.272 Bo 5.3 5.5 0.209 0.217 Ko 1.6 1.8 0.063 0.071 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 STP08DP05 Package mechanical data SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 0.004 0.010 1.64 b 0.35 b1 0.19 C MAX. 0.063 0.46 0.013 0.25 0.007 0.5 0.018 0.010 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) 0016020D 27/30 Package mechanical data STP08DP05 Tape & Reel SO-16 MECHANICAL DATA mm. inch DIM. MIN. A MAX. MIN. 330 13.2 TYP. MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 28/30 TYP 0.504 22.4 0.519 0.882 Ao 6.45 6.65 0.254 0.262 Bo 10.3 10.5 0.406 0.414 Ko 2.1 2.3 0.082 0.090 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 STP08DP05 12 Revision history Revision history Table 13. Revision history Date Revision Changes 3-Apr-2007 1 First release 21-May-2007 2 Updated Table 7 on page 7 29/30 STP08DP05 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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