STV6412A AUDIO/VIDEO SWITCH MATRIX FEATURES ■ ■ ■ ■ I²C Bus Control Standby Mode with Interrupt Signal Output Video Section – 4 CVBS Inputs, 3 CVBS Outputs (one with Selectable Chroma Trap Filter) – 3 Y/C Inputs, 2 Y/C Outputs – 6 dB Gain on all CVBS/Y and C Outputs – Integrated 150 Ω Buffers – 1 Y/C Adder – 2 RGB/FB Inputs, 1 Tri-state RGB/FB Output with 6 dB Adjustable Gain (from +3dB to +9dB) – Video Muting on all Outputs – 2 Slow Blanking Inputs/Outputs – Sync Bottom Clamp on all CVBS/Yand RGB Inputs, Average Clamp on C Inputs – Bandwidth: 15 MHz – Crosstalk: 50 dB Minimum Audio Section – 4 Stereo Inputs, 3 Stereo Outputs – 1 Mono-Sound Output – Stereo-to-Mono Sound Capability – 0/6/9 dB Selectable Gain on one Stereo Input – Full Range Volume Control with Soft Control – Audio Muting on all Outputs TQFP64 (14 x 14 x 1.40 mm) (Thin Full Plastic Quad Flat Pack) ORDER CODE: STV6412ADT DESCRIPTION The STV6412A is a highly integrated I²C bus-controlled audio and video switch matrix, optimized for use in digital set-top box applications. It provides all the audio and video routings required in a full two SCART set-top box design. September 2003 1/24 1 Table of Contents 1 GENERAL OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.2 Latch Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 RECOMMENDED OPERATING CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 AUDIO SECTION CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 VIDEO SECTION CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 CHROMA SECTION CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.6 BLANKING SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.7 I²C BUS CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2 3 I C BUS SELECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 I2C BUS ADDRESSES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 POWER-ON RESET — BUS REGISTER INITIAL CONDITIONS . . . . . . . . . . . . . . . . . . . 17 4 INPUT/OUTPUT GROUPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 APPLICATION DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 24 2/24 1 STV6412A 1 GENERAL OVERVIEW 1.1 PIN CONNECTIONS Figure 1. Pinout Diagram LOUT_TV FILTER AOUT_RF VOUT_RF VccB 5 BOUT_TV VccB 4 GOUT_TV GNDB R/COUT_TV VccB 3 Y/CVBSOUT_TV VccB 2 COUT_VCR VccB 1 Y/CVBSOUT_VCR FBOUT_TV ROUT_TV FBIN_VCR FBIN_ENC Vccao LOUT_VCR C_GATE ROUT_VCR VDD LOUT_CINCH ADD ROUT_CINCH SCL NC SDA GNDA GND VccA IT_OUT SLB_TV RIN_TV LIN_TV R/CIN_VCR CVBSIN_TV SLB_VCR RIN_VCR GIN_VCR LIN_VCR Vcc12 Y/CVBSIN_VCR BIN_VCR GND DECA NC BIN_ENC LIN_ENC GIN_ENC RIN_ENC R/CIN_ENC LIN_AUX CIN_ENC RIN_AUX YIN_ENC GND Y/CVBSIN_ENC DECV CVBSIN_AUX Vcc Figure 2. Pin Description Pin No. 1 Symbol VCC 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 CVBSIN_AUX DECV Y/CVBSIN_ENC GND YIN_ENC RIN_AUX CIN_ENC LIN_AUX R/CIN_ENC RIN_ENC GIN_ENC LIN_ENC BIN_ENC NC DECA GND Y/CVBSIN_VCR LIN_VCR Description +5 V Supply CVBS Input from Auxiliary Video Decoupling Capacitor Y/CVBS Input from Encoder Ground Y Input from Encoder Audio Right Input from Auxiliary Chroma Input from Encoder Audio Left, Input from Auxiliary Red/Chroma Input from Encoder Audio Right, Input from Encoder Green Input from Encoder Audio Left, Input from Encoder Blue Input from Encoder Not Connected Audio Decoupling Capacitor Ground Y/CVBS Input from VCR SCART Audio Left, Input from VCR SCART 3/24 1 STV6412A Pin No. 20 21 22 23 24 25 26 27 RIN_TV VCCA GNDA NC ROUT_CINCH 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 LOUT_CINCH ROUT_VCR LOUT_VCR VCCAO ROUT_TV LOUT_TV FILTER AOUT_RF VOUT_RF VCCB5 BOUT_TV VCCB4 GOUT_TV GNDB R/COUT_TV VCCB3 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Y/CVBSOUT_TV VCCB2 COUT_VCR VCCB1 Y/CVBSOUT_VCR FBOUT_TV FBIN_VCR FBIN_ENC C_GATE VDD ADD SCL SDA GND IT_OUT SLB_TV R/CIN_VCR SLB_VCR GIN_VCR VCC12 BIN_VCR 4/24 Symbol RIN_VCR CVBSIN_TV LIN_TV Description Audio Right, Input from VCR SCART CVBS Input from TV SCART Audio Left, Input from TV SCART Audio Right, Input from TV SCART Audio Supply Voltage - or - Audio Supply Decoupling Audio Ground Not Connected Audio Right Output to Cinch Audio Left Output to Cinch Audio Right Output to VCR SCART Audio Left Output to VCR SCART Audio Output Supply Voltage - or - Main Audio Supply Voltage Audio Right Output to TV SCART Audio Left Output to TV SCART Chroma Trap Filter Audio (L+R) Output to RF Modulator CVBS Video Output to RF Modulator Video Output Buffer Supply Pin Blue Output to TV SCART Video Output Buffer Supply Pin Green Output to TV SCART Video Buffer Ground Red/Chroma Output to TV SCART Video Output Buffer Supply Pin Y/CVBS Output to TV SCART Video Output Buffer Supply Pin Chroma Output to VCR SCART Video Output Buffer Supply Pin Y/CVBS Output to VCR SCART Fast Blanking Output to TV SCART Fast Blanking Input from VCR SCART Fast Blanking Input from Encoder External MOS Command for C_VCR bidirectional mode +5 V I2C Supply I2C Address Selection I2C Bus Clock I2C Bus Data Ground Digital Interrupt Output Slow Blanking Input/Output from TV SCART Red Input (or C Input) from VCR SCART Slow Blanking Input/Output from VCR SCART Green Input from VCR SCART +12 V Supply Blue Input from VCR SCART STV6412A Figure 3. STV6412A Block Diagram FBIN_ENC FBIN_ENC FBIN_VCR FBIN_VCR FBOUT_TV FB Switch BIN_ENC BIN_VCR GIN_ENC GIN_VCR R/CIN_ENC R/CIN_VCR Mute BIN_ENC BIN_VCR GIN_ENC GIN_VCR R/CIN_ENC 3 to 9 dB BOUT_TV 3 to 9 dB GOUT_TV 3 to 9 dB RGB Switch R/CIN_VCR Mute R/CIN_VCR CIN_ENC R/CIN_ENC Mute CIN_ENC R/COUT_TV 6 dB VOUT_RF C Switch CVBSIN_AUX Y/CVBSIN_VCR YIN_ENC Y/CVBSIN_ENC Mute CVBSIN_AUX Y/CVBSIN_VCR YIN_ENC Mute Mute CIN_ENC R/CIN_ENC Mute Y/CVBSIN_ENC FILTER 6 dB Y/CVBS Switch Y/CVBSOUT_TV C_GATE 6 dB COUT_VCR C Switch SLOW BLANK MONITOR INTERRUPT SIGNAL CVBSIN_AUX CVBSIN_TV Y_ENC Y/CVBSIN_ENC Mute CVBSIN_TV 6 dB IT_OUT SLB_TV SLB_VCR Y/CVBSOUT_VCR Y/CVBS Switch LIN_AUX LIN_AUX LIN_ENC LOUT_VCR LIN_TV LIN_ENC 0/6/9 dB RIN_AUX ROUT_VCR RIN_ENC RIN_TV Mute LIN_TV RIN_AUX RIN_ENC 0/6 dB ROUT_CINCH 0/6 dB LOUT_CINCH 0/6 dB AOUT_RF VCR Switch 0/6/9 dB LIN_AUX RIN_TV LIN_ENC LIN_VCR LIN_VCR -62 dB LIN_TV LOUT_TV 0/6 dB RIN_AUX ROUT_TV RIN_ENC RIN_VCR RIN_VCR -62 dB ADD 0/6 dB RIN_TV Mute TV Switch I²C BUS DECODER SDA SCL 5/24 STV6412A Figure 4. Functional Block Diagram AUDIO L AUDIO R SCART1 TV RF MOD AUX MICRO 6/24 R/C G B FAST BLANK CVBS AUDIO L AUDIO R CVBS/Y AUDIO L AUDIO R SLOW BLANK CVBS AUDIO L+R CVBS AUDIO L AUDIO R INTERRUPT STV6412A R, G, B, FB SWITCHES CVBS/Y SWITCHES CHROMA SWITCHES AUDIO SWITCHES SLOW BLANK, I/O CONTROL R/C G B FAST BLANK CVBS/Y C AUDIO L AUDIO R Y R/C G B FAST BLANK CVBS/Y AUDIO L AUDIO R CVBS/Y C AUDIO L AUDIO R SLOW BLANK CINCH OUTPUT ENCODER SCART2 VCR STV6412A 2 ELECTRICAL CHARACTERISTICS 2.1 Absolute Maximum Ratings Parameter Symbol VCC12 Supply voltage for: VCCAO Value Units - Slow blanking sections 13.2 V - Audio drivers 13.2 V VCCA - Internal Digital Audio parts 10 V VDD - Digital parts 6 V Vcc, VCCBi VI - Video sections Voltage at Pin I to GND: 6 V - Audio pins 0, VCCA V - Video pins 0, VCC or VCCBi V 0, 5.5 V 0, VCC12 V ±4 kV - Bus pins - Slow blanking pins VESD Maximum ESD voltage allowed. 100 pF capacitor discharged through 1.5 kΩ serial resistor (Human Body Model) Toper Operating Ambient Temperature Tstg Storage Temperature 0, +70 °C -20, +150 °C Value Units 48 °C/W 2.1.1 Thermal Data Symbol Rth(j-a) Parameter Junction-ambient Thermal Resistance (Maximum) 2.1.2 Latch Up At an ambiant temperature of 25 °C, all pins meet the following specifications: – I trigger = 200 mA or I trigger = 200 mA. – Pin 58 (IT_OUT) does not meet this specification and the trigger current must be limited to -100 mA. 2.2 Recommended Operating Conditions Tamb = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 1. Supply Voltages Symbol VDD Parameter Test Conditions Digital Supply Voltage - Decoupling capacitor on VCCA - Connected to VCCA Min. Typ. Max. Units 4.75 5 5.25 V 11.2 8.5 12 9 12.8 9.5 V V VCCAO Audio Operating Supply Voltage VCC Video Operating Supply Voltage 4.75 5 5.25 V Slow Blanking Control Supply Voltage 11.2 12 12.8 V Min. Typ. Max. Units 4.5 10 mA 9 15 mA VCC12 Table 2. Active Mode (All channels ON) Symbol Parameter Test Conditions IDD Digital Supply Current VDD = 5 V ICCA Audio Supply Current VCCAO = 12 V, no load 7/24 STV6412A Symbol ICCV ICC12 Parameter Test Conditions Total Video Supply Current (VCC+V CCB1+VCCB2+VCCB3+V CCB4+VCCB5) 12 V Supply Current Min. Typ. Max. Units VCC = 5 V, no load 43 60 mA VCC12 = 12 V SLB input mode SLB output mode, no load 0 2.5 1 4 mA Typ. Max. Units 4.5 10 mA Table 3. Standby Mode (All channels OFF) Symbol Parameter Test Conditions Min. IDD Digital Supply Current VDD = 5 V ICCAstd Audio Supply Current VCCA0 = 12 V, no load 3 mA ICCVstd Total Video Supply Current VCC = 5 V 1 mA 2.3 Audio Section Characteristics Tamb = 25°C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, V DD = 5 V RGA = 600 Ω, RLOUTA = 10 kΩ, R GV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 4. Audio Section Characteristics Symbol Parameter Test Conditions SVR100 Supply Voltage Rejection VRIPPLE = 500m VRMS at f = 100 Hz, Gain= 0 dB, DECA filter cap = 47 µF DECA filter cap = 220 µF SVR1K Supply Voltage Rejection VRIPPLE = 500m VRMS at f = 1 kHz, Gain = 0 dB VINDC Input DC Level VCCA = 9 V VINAC Input Signal Amplitude RIN RINmatch Typ. Max. Units 60 70 80 dB dB 70 80 dB VCCA/2 V 2 Input Resistance 30 Input Resistance Matching 50 ±2 FRANGE Bandwidth -3 dB, 0.5 VRMS, RLOAD = 10 kΩ, Gain = 0 dB Flatness Spread of Gain in Audio Band -0.5 VRMS, 20 Hz to 20 kHz, Gain = 0 dB CS Channel Separation, from audio inputs Between L & R of TV outputs VIN = 0.5 VRMS, f = 1 kHz, on one input, RLOAD = 10 kΩ, Gain = 0 dB Ci Channel Isolation from video inputs VOUT Output DC Level VIN = 1 Vpp, f = 15 kHz, on one point VCCA = 9 V VOFF DC Offset Change Switching between inputs ROUT Output Resistance PHD Phase Difference f = 1 kHz, 1 VRMS input on each input channel ASN S/N Ratio f = 1 kHz, 1 VRMS input (gain = 0dB) weighted CCIR 468-4 quasi peak eNI Equivalent RMS Input Voltage Noise BW = 20 Hz, 20 kHz Flat, Gain = 0 dB G0 0 dB Gain 0.5 VRMS, RLOAD = 10 kΩ, Gain = 0 dB 8/24 Min. kΩ ±10 50 dB 90 74 dB dB 85 dB VCCA/2 V 1 ±15 mV 60 120 W 3 ° deg. 70 dB 5 -0.5 % kHz 0.5 80 70 VRMS µV +0.5 dB STV6412A Symbol GSTEP Parameter Gain Step Min. Typ. -62 dB to +6 dB ( see Figure 2) Gain matching between different inGMATCH1 puts of one output GMATCH2 Test Conditions Gain matching between Left/Right outputs of one input channel Max. Units 2 dB VIN = 0.5 VRMS, 1 kHz, Gain = 0 dB -0.5 0.5 dB VIN = 0.5 VRMS, 1 kHz, Gain = 0 dB -0.5 0.5 dB 0.1 0.1 0.1 % Total Harmonic Distortion ENC Input at 0 dB ENC Input at 6 dB ENC Input at 9 dB VOUT = 0.5 VRMS, 1 kHz, LPF @ 80 kHz VCL Output Clipping Level THD = 0.2%, 1 kHz RL Output Load Resistance VIN = 1 VRMS, THD = 0.3%, Gain = 0 dB Mute Suppression VIN = 0.5 VRMS, on one point THD0 THD6 THD9 Mute 0.01 0.01 0.01 % % 2.1 2.3 VRMS 2 2.25 kΩ -90 dB 2.4 Video Section Characteristics Tamb = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 Ω, RLOUTA = 10 kΩ, R GV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 5. Video Section Characteristics Symbol Parameter Test Conditions VDCIN DC Input Level Bottom Synch Pulse ICLAMP Clamping Current at VDCIN -400 mV Input Leakage Current VIN = VDCIN +1 V ILEAK CIN VIN DYN BW Flatness Min. Typ. 2 V 1 2 mA 1 Input Capacitance Max. 10 Units µA 2 pF Max Input Signal VCC = 5 V 1.5 VPP Dynamic Output Signal VCC = 5 V 3 VPP 15 15 10 MHz MHz MHz Bandwidth at -3 dB VIN = 1 VPP Y/CVBS RGB VIN = 1 VPP Y/C Mixer (on VOUT-RF) VIN = 1 VPP, VINC = muted 12 12 8 Spread of Gain in Video Band (15 kHz - 5 MHz) Y/CVBS VIN = 1 VPP RGB VIN = 1 VPP Y/C Mixer (on VOUT-RF) VIN = 1 VPP, VINC = muted +/-0.5 +/-0.5 +/-1.5 dB dB dB CTi Crosstalk Isolation between Input Channel VIN = 1 VPP at f = 4.43 MHz, on one point 60 dB CTo Crosstalk Isolation between Output Channel VIN = 1 VPP at f = 4.43 MHz, on one point, RLOAD = 150Ω 50 dB ROUT Output Resistance GRGB Gain at RGB outputs GRGBM Gain matching between R, G, B GRGBSTEP Step of Gain GYCVBS GYCVBSM 5 10 Ω VIN = 1 Vpp, gain set to 6 dB VIN = 1 VPP, gain set to 6 dB 5.5 6 6.5 dB -0.3 0 0.3 dB 3 dB to 6 dB 0.75 1 1.25 dB Gain on Y,/CVBS channels VIN = 1 VPP 5.5 6 6.5 dB Gain matching between Y, CVBS inputs VIN = 1 VPP -0.5 0 0.5 dB 9/24 STV6412A Symbol Parameter Test Conditions Min. Typ. Max. Units DCOUT DC Output Voltage Bottom sync pulse 0.6 V DCOUT RF RF Output Voltage Bottom sync pulse 1 V DPHI Differential Phase VIN = 1 VPP at f = 4.43 MHz 1 5 ° deg. Differential Gain VIN = 1 VPP at f = 4.43 MHz VIN = 1 VPP at f = 5 MHz on one point 1 5 % DG Mute Mute Suppression LNL Luminance non-linerarity VSN Video S/N Ratio -55 dB 0.3 Refer to Note 1 3 65 % dB Note 1: S/N = 20 log (VOUT Black to White = 0.7 VPP / VNoise (mVRMS ) weighted CCIR 567). 2.5 Chroma Section Characteristics Tamb = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 Ω, RLOUTA = 10 kΩ, R GV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 6. Chroma Section Characteristics Symbol VDCIN Parameter RIN Input Resistance CIN Input Capacitance VIN Test Conditions 30 Max Input Signal DYN Dynamic Output Signal DCOUT DC Output VCR Voltage Crosstalk Isolation between Input Channel CTo Crosstalk Isolation between Output Channel VIN = 1 VPP at f = 4.43 MHz, on one input, RLOAD = 150 Ω ROUT Output Resistance CTi GOUTC Chroma Bandwidth Gain at OUTC Typ. Max. Units 3 V 50 kΩ 2 pF 1.5 VPP 3 VPP 2.2 CIN = 1 VPP at -3 db VIN = 1 VPP at f = 4.43 MHz, on one input CBW Min. DC Input Level VIN = 1 Vpp VIN = 1 VPP V 10 MHz 55 dB 50 dB 5 10 W 5.5 6 6.5 dB -0.5 0 0.5 dB GCM Gain matching between C inputs Mute Mute Suppression VIN = 1 VPP at f = 4.43 MHz, on one input CToYdel Chroma to luma delay, source Y/C Pin other than VOUT_RF, VPP @ 4.43 MHz, 20 ns CToYdel Chroma to luma delay, source Y/C Pin VOUT_RF 20 ns -55 dB 2.6 Blanking Section Tamb = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 Ω, RLOUTA = 10 kΩ, R GV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 7. Slow Blanking Section Symbol Parameter Test Conditions Min. Typ. Max. Units INPUT MODE SLBlow Input Low Level Threshold 2.5 3.25 4 V SLBhigh Input High Level Threshold 7.5 8.25 9 V 10/24 STV6412A Symbol IIN Parameter Test Conditions Min. Input Current Typ. Max. Units 50 100 µA OUTPUT MODE SLBlow Output Low Level (int. TV) 0 0.02 1.5 V SLBmed Output Medium Level (ext. 16/9) 5 5.75 6.5 V SLBhigh Output High Level (ext. 4/3) 10 11 12 V Min. Typ. 0.4 0.7 0.9 V 2 10 µA 0.5 V 3.8 V Table 8. Fast Blanking Section Symbol Parameter Test Conditions Max. Units INPUT MODE FBlow/high IIN Input Low/High Level Threshold Input Current OUTPUT MODE FBLOW Output Low Level FBHIGH Output High Level FBDEL Fast Blanking RGB delay FBTRANS FB Transitions at FB output Rise Time Fall Time RLOAD = 150 Ω 3.0 At 50% on digital RGB transients, at 2 V on FB rise transient, at 1 V on FB fall, CLOAD = 10pF maximum CLOAD = 10 pF maximum between 10% and 90% between 90% and 10% 3.4 15 ns 10 10 ns ns Table 9. C_Gate Function Output Symbol Parameter Test Conditions Min. C_GATE-L Output Low Level Typ. Max. Units 20 C_GATE-H Pull-up Resistor Value to VCCB1 IIN = 0 mA IIN = 1 mA kΩ 0.3 0.7 V V Table 10. Interrupt Output (Refer to Note 2) Symbol Parameter Test Conditions Min. Typ. Max. Units IT-Leak High Level Leakage External pull-up to 5 V 10 µA IT-Low Output Low Level (Active) IIN = 0 mA IIN = 1 mA 0.3 0.7 V V Table 11. Address Selection Input Symbol Parameter ADDsel_L Address Selection Low Level ADDsel_H Address Selection High Level ILEAK Leakage Current Test Conditions Min. Typ. 0 2.5 Max. Units 0.2 V VDD V 10 µA Note 2: The interrupt is forced to a low level when a change is detected on slow blanking inputs. It can be used in Standby mode to wake up the microprocessor. It is released when the I2C bus register is read. 11/24 STV6412A 2.7 I²C Bus Characteristics Tamb = 25°C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, V DD = 5 V RGA = 600Ω, R LOUTA = 10kΩ, RGV = 50Ω, R LOUTV = 150Ω, unless otherwise specified. Table 12. I²C Bus Characteristics Symbol Parameter Test Conditions Min. Typ. Max. Units SCL VIL Low Level Input Voltage VIH High Level Input Voltage ILI Input Leakage Current -0.3 1.5 2.3 VIN = 0 to 5.5 V -10 0 V 5.5 V 10 µA SDA VIL Low Level Input Voltage -0.3 1.5 V VIH High Level Input Voltage 2.3 5.5 V ILI Input Leakage Current CI Input Capacitance tR Input Rise Time tF Input Fall Time VIN = 0 to 5.5 V -10 0 10 µA 10 pF 1.5 V to 3 V 1 µs 3 V to 1.5 V 300 ns Low Level Output Voltage IOL = 3 mA 0.4 V tF Output Fall Time 3 V to 1.5 V 250 ns CL Load Capacitance 400 pF VOL TIMING tLOW Clock Low Period 4.7 µs tHIGH Clock High Period 4 µs tSU,DAT Data Setup Time 250 ns tHD,DAT Data Hold Time 0 tSU,STO Setup Time from Clock High to Stop 4 µs 4.7 µs tBUF Start Setup Time following a Stop tHD,STA Start Hold Time tSU,STA Start Setup Time following Clock Low to High Transition (start, stop) 12/24 ns 4 µs 4.7 µs Note 3: The device can also operate at 400 kHz and is capable of interfacing with +3.3 V or + 5 V logic levels. Figure 5. I²C Bus Timing 340 STV6412A 3 I2C BUS SELECTION Data transfers follow the usual I2C format; i.e. after the start condition (S), a 7-bit slave address is sent, followed by an eight-bit data direction bit (W). An 8-bit sub-address is sent to select a register, followed by an 8-bit data word to be included in the register. The IC’s I 2C bus decoder enables the automatic incrementation mode in write mode. String Format Write only mode (S = Start condition, P = Stop condition, A = Acknowledge) S SLAVE ADDRESS 0 A SUB-ADDRESS A DATA A P Read only mode S SLAVE ADDRESS 1 A DATA A P Slave Address Address A6 A5 A4 A3 A2 A1 A0 Value 1 0 0 1 0 1 X Auto Increment Mode S SLAVE ADDRESS 0 A SUB-ADDRESS A DATA0 A Sub-Address DATA1 A .... Sub-Address +1 DATAn A P Sub-Address + N 3.1 I2C Bus Addresses Write Address: 1001 01X0, Read Address: 1001 01X1 Address Selection Pin Grounded: X = 0, write address = 94(hex), read address = 95(hex) Address Selection Pin to Supply: X = 1, write address = 96(hex), read address = 97(hex) Table 13. Input Signal Summary (Write Mode) Data Reg Addr (Hex) d7 d6 TV Stereo Mono VCR Stereo Mono TV 0/6 dB d5 d4 d3 d2 d1 d0 AUDIO 00 01 Not Used TV Volume-62 dB to 0 dB - 2 dB steps VCR Audio Switch Control Soft Volume Mode CINCH Audio Gain TV/CINCH Audio Switch Control TV Chroma muted TV Video and Chroma Switch Control VIDEO 02 03 VCR Chroma muted RGB and FB Tri-state VCR Video and Chroma Switch Control RGB Gain RGB Switch Control Fast Blanking Mode/Input Selection MISCELLANEOUS 04 05 IT Enable SLB Mode VCR Slow Blanking Not Used VCR R/C sub Clamp TV R or C Output Selection ENC R/C sub Clamp VCR Inputs ENC Inputs VCR-C VCR-C Gate RF Trap RF Adder Output Control Control Filter Control Control TV Slow Blanking ENC Audio Input Gain 0/6/9 dB STB-BY 06 RF Outputs TV Outputs CINCH Outputs VCR Outputs AUX Inputs TV Inputs Note 4: Unused data must be set to “0”. 13/24 STV6412A Table 14. TV Audio Output Reg. Addr (Hex) Data Description Soft Volume Change Level Adjustment 00 6 dB Extra Gain TV Stereo or Mono Mode Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 1 X X X X X X X X X X X X X X 0 1 Active Disabled 5 X X X X 0 1 0 1 0 1 0 1 0 1 X X 0 dB -62 dB (-2 dB/step) 1 X X 0 1 X X X X X X X X X X X X 0 dB +6 dB 1 0 1 X X X X X X X X X X X X X X 0 = Stereo 1 = Mono Table 15. Audio Selection & VCR Audio Output Reg. Addr (Hex) Data Description Bits d6 d5 d4 d3 d2 d1 d0 3 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Muted Encoder L/R selected VCR L/R selected AUX L/R selected TV L/R selected Not allowed Not allowed Not allowed 1 X X X X X X X X 0 1 X X X X X X 0 dB Follow TV Gain 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X Muted Encoder L/R selected TV L/R selected AUX L/R selected 1 0 1 X X X X X X X X X X X X X X 0 = Stereo 1 = Mono TV & CINCH Audio Output Selection 01 CINCH Audio Gain VCR Audio Output Selection VCR Stereo or Mono Mode 14/24 Comments d7 STV6412A Table 16. TV & VCR Video Selection Reg. Addr (Hex) Data Description Bits d6 d5 d4 d3 d2 d1 d0 3 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Y/CVBS muted & Chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS_VCR & R/C_VCR CVBS_AUX & Chroma muted Not allowed Not allowed Not allowed 1 X X X X X X X X 0 1 X X X X X X Chroma defined by d2d1d0 Chroma force to mute 3 X X X X X X X X 0 1 0 0 0 0 1 1 1 1 X X 0 0 1 1 0 0 1 1 X X 0 1 0 1 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Y/CVBS muted & Chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC CVBS_TV & Chroma muted CVBS_AUX & Chroma muted Not allowed Not allowed Not allowed TV Video Output Selection TV Chroma Output Control 02 VCR Video Output Selection VCR Chroma Output Control Comments d7 1 Chroma defined by d6d5d4 Chroma force to mute Table 17. RGB & Fast Blanking Outputs Reg. Addr (Hex) 03 Data Description Bits d7 d6 d5 d4 d3 d2 d1 d0 Comments Fast Blanking Control 2 X X X X X X X X X X X X X X X X X X X X X X X X 0 0 1 1 0 1 0 1 FB forced to low level FB forced to high level FB from Encoder FB from VCR RGB Selection 2 X X X X X X X X X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X Muted RGB_ENC selected RGB_VCR selected Not allowed RGB Gain 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X +6 dB +5 dB +4 dB +3 dB 1 X X 0 0 1 X X X X X X X X X X X X X X X X X X X 1 X X X X X X X +0 dB extra gain +3 dB for weak input signals RGB and FB outputs high impedance state RGB and FB outputs active RGB and Fast Blanking Control 1 gain gain gain gain 15/24 STV6412A Table 18. RF & Miscellaneous Control Reg. Addr (Hex) Data Description R/C TV Output Selection RF Output: Adder control and chroma sub-carrier filter selection 04 C_Gate Output Control C_VCR Output Control Slow Blanking Mode IT Enable Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 X X 0 1 X X 0 1 X X X X Red signal selected Chroma signal selected CVBS to RF output Y + C to RF output Filter not active Filter active 1 X X X X X X X X 0 1 X X X X X X High level Low level 1 X X X X X X 0 1 X X X X 0 1 X X X X X X X X X X X X X X X X X X Tri-state mode (high impedance) Active Normal Mode SLB TV is driven by SLB VCR 0 1 X X X X X X X X X X X X X X No interrupt flag IT enable 1 2 1 1 Table 19. Slow Blanking & Inputs Control Reg. Addr (Hex) Data Description Encoder R/Csub Clamp VCR R/Csub Clamp Encoder Input Level Adjustment 05 Bits d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 0 1 X X Bottom level clamp Average level clamp Bottom level clamp Average level clamp 2 X X X X X X X X X X X X 0 0 1 0 1 0 X X X X X X 0 dB for normal audio inputs +6 dB for weak audio inputs +9 dB for weak audio inputs 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X Input mode only Output < 2 V Output 16/9 format Output 4/3 format 2 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X Input mode only Output < 2 V Output 16/9 format Output 4/3 format 1 1 Slow Blanking TV SCART Slow Blanking VCR SCART 16/24 Comments d7 STV6412A Table 20. Standby Modes Reg. Addr (Hex) Data Description Bits ENC Inputs VCR Inputs TV Inputs AUX Inputs 06 VCR Outputs CINCH Outputs TV Outputs d6 d5 d4 d3 d2 d1 d0 1 X X X X X X X X X X X X X X 0 1 Inputs active Inputs disabled 1 X X X X X X X X X X X X 0 1 X X Inputs active Inputs disabled 1 X X X X X X X X X X 0 1 X X X X Inputs active Inputs disabled 1 X X X X X X X X 0 1 X X X X X X Inputs active Inputs disabled 1 X X X X X X 0 1 X X X X X X X X Audio & Video Outputs ON Audio & Video Outputs OFF 1 X X X X 0 1 X X X X X X X X X X Audio & Video Outputs ON Audio & Video Outputs OFF 1 X X 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X Audio Audio Audio Audio 1 1 1 1 1 1 1 1 Only I2C bus and slow blanking detection parts are supplied. 1 RFmod Outputs Comments d7 Full Stop & Video Outputs ON & Video Outputs OFF & Video Outputs ON & Video Outputs OFF Table 21. Output Signals (Read Mode) Reg. Addr (Hex) Data Description Bits 2 Slow Blanking TV SCART 2 Slow Blanking VCR SCART 1 Interrupt Flag Comments d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 1 X X X 1 0 1 0 1 1 X X X 1 0 1 X X X Input Input Input Input Input Input X X X X X X 0 1 X X X X X X X X No change since read One change has been detected (refer to Note 5) <2 V 16/9 format 4/3 format <2 V 16/9 format 4/3 format Note 5: The Interrupt Flag will be cleared when this register is read. To prepare for a new interrupt, a “1” must be re-written in the IT Enable bit (Reg. 04, d7). 3.2 Power-on Reset — Bus Register Initial Conditions Power-on Reset is active when the supply V DD is less than 3.5 volts. Non-significant bits (X) are pre-set to “0”. Reg. Addr (Hex) d7 Data d6 d5 d4 d3 d2 d1 d0 Comments 00 0 0 0 0 0 0 0 0 Audio TV and Cinch outputs are in Stereo Mode, 0 dB Gain Adjustment. 01 0 0 0 0 0 0 0 0 TV, Cinch and VCR audio outputs are muted. VCR output is in Stereo Mode. 02 0 0 0 0 0 0 0 0 03 0 0 0 0 0 0 0 0 04 0 0 0 0 0 0 0 0 VCR, TV and RFmod video outputs are muted. Fast Blanking is forced to ‘0’. RGB outputs are muted and in high impedance. C_GATE is high. C_VCR is high impedance. 17/24 STV6412A Reg. Addr (Hex) d7 Data d6 d5 d4 d3 d2 d1 d0 Comments 05 0 0 0 0 0 0 0 0 Encoder and VCR R/Csub Bottom Level Clamp, RGB outputs 6 dB Gain, and Slow Blanking parts are in read mode. 06 0 0 0 0 0 0 0 0 All internal blocks are ON. Figure 6. Volume Control Characteristics 0 -36 ± 0.5 dB 31 18 Step Number ± 0.5 dB + 2 dB -62 dB 18/24 - 0.5 dB STV6412A 4 INPUT/OUTPUT GROUPS Figure 7. Bottom Clamped Video Inputs (Pins 2, 4, 6, 12, 14, 18, 21, 62, 64) Figure 10. Average Clamped Video Inputs (Pin8) VCC 5 V VCC 5 V VCC 5 V VCC 5 V IB 2 V + VD 25 kΩ 25 kΩ 3V 15 kΩ tri tri Protected Pad Protected Pad Figure 8. R/C Clamped Video Inputs (Pins 10, 60) Figure 11. Cgate Logical Output (Pin 52) VDD 5 V R/C inputs may be configured either as a bottom clamped input or as an average clamped input. In either case, the simplified input schematic is very close to one of the graphics shown above. VCCB1 5 V 18 kΩ 50 ohms Protected Pad Figure 12. Fast Blanking Output (Pin 49) Figure 9. Fast Blanking Inputs (Pins 50, 51) VCCB1 5 V VCCB1 5 V VCCB1 5 V tri Protected Pad Protected Pad 19/24 STV6412A Figure 13. Video Outputs (Pins 38, 40, 42, 44, 46, 48) Figure 16. Trap Filter (Pin 34) VCCB5 5 V VCC 5 V VCC 5 V VCCB1,2 ...7 5 V 100 Ω 1 kΩ ib Protected Pad Protected Pad Figure 14. Audio Inputs (Pins 7, 9 11, 13, 19, 20, 22, 23) Figure 17. Audio Outputs (Pins 27, 28, 29, 30, 32, 33,35) VCCAO I2 V VCCA 9 V 50 kΩ VCC/2 60 W IB Protected Pad Protected Pad Figure 18. Interrupt Output (Pin 58) Figure 15. Slow Blanking I/O (Pins 59, 61) VCC 12 V VDD 5 V Float VCC12 12 V 1 kΩ 40 Ω 25 kΩ 110 kΩ 55 kΩ 20/24 Protected Pad Protected Pad STV6412A Figure 19. I2C Bus (SDA) (Pin 56) VDD 5 V Figure 21. I²C Bus (SCL) (Pin 55) VDD 5 V Float Float Acknowledge 10 kΩ 10 kΩ Protected Pad Protected Pad Protected Pad Figure 20. I2C Bus (ADD) (Pin 54) Float VDD 5 V 10 kΩ Protected Pad Figure 22. Power Supply Connection VCCB1 47 VCCB2 VCCB3 VCCB4 VCCB5 VCCA0 VCCA VCC VCC 12 VDD 45 43 39 37 31 24 1 63 53 12 V 41 GNDP 10 V 25 17 GNDA GNDref 12 V 5 GNDV Float 5V 57 GDD These symbols represent some huge diode and Zener-like components used for ESD protection of the device. They are not supposed to be paths for any current in normal operation mode. 21/24 STV6412A 5 APPLICATION DIAGRAM Modulator STV6412A For more details refer to STV6412 Application Note. 22/24 4.43MHzTrap STV6412A 6 PACKAGE MECHANICAL DATA Figure 23. 64 Pins — Thin Full Plastic Quad Flat Pack (TQFP) A A2 e 64 A1 49 0,10 mm .004 inch 48 16 33 SEATING PLANE E3 E1 E B 1 c 32 L D3 D1 D L1 17 K Dimensions Millimeters Min. Typ. A 0,25 mm .010 inch GAGE PLANE Inches Max. Min. Typ. 1.60 0.15 Max. 0.063 A1 0.05 0.002 0.006 A2 1.35 1.40 1.45 0.053 0.055 0.057 B 0.30 0.37 0.45 0.0118 0.0146 0.0177 C 0.09 0.20 0.0035 0.0079 D 16.00 0.630 D1 14.00 0.551 D3 12.00 0.472 e 0.80 0.0315 E 16.00 E1 14.00 E3 L L1 K 0.630 1 0.551 12.00 0.45 0.60 0.472 0.75 0.018 1.00 0.024 0.030 0.039 0° (Min.), 7° (Max.) 23/24 STV6412A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without the express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2003 STMicroelectronics - All Rights Reserved. Purchase of I2C Components by STMicroelectronics conveys a license under the Philips I2C Patent. Rights to use these components in an I2C system is granted provided that the system conforms to the I2C Standard Specification as defined by Philips. STMicroelectronics Group of Companies Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 24/24