STV6412B Audio/video switch matrix Features ■ I²C bus control ■ Standby mode with interrupt signal output ■ Video section – 4 CVBS inputs, 3 CVBS outputs (one with selectable chroma trap filter) – 3 Y/C inputs, 2 Y/C outputs – Switchable LPFs (low pass filters) on 6 inputs – 6 dB gain on all CVBS/Y and C outputs – Integrated 150 Ω buffers – 1 Y/C adder – 2 RGB/FB inputs, 1 tri-state RGB/FB output with 6 dB adjustable gain (from +3 dB to +9 dB) – Video muting on all outputs – 2 slow blanking inputs/outputs – Sync bottom clamp on all CVBS/Y and RGB inputs, average clamp on C inputs – SVHS switch on C VCR output – Bandwidth: 15 MHz – Crosstalk: 50 dB minimum ■ Audio section – 4 Stereo inputs, 3 stereo outputs – 1 mono-sound output – Stereo-to-mono sound capability – 0/6/9 dB selectable gain on one stereo input – Full range volume control with soft control – Audio muting on all outputs July 2008 LQFP64 (14 × 14 × 1.40 mm) (Low-profile Quad Flat Pack) Marking: STV6412BD Description The STV6412B is a highly integrated I²C buscontrolled audio and video switch matrix, optimized for use in digital set-top box applications. It provides all the audio and video routings required in a full two-SCART set-top box design. In an LQFP64 (14 × 14 × 1.4 mm) package, the STV6412B is compatible with the STV6412A. Table 1: Device summary Rev 1 Order code Packaging STV6412BD Tray STV6412BDT Tape and reel 1/32 www.st.com 1 STV6412B 1 General information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 Latch up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 Audio section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4 Video section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5 Chroma section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.6 Blanking section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.7 3 I/O pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.6.1 Fast blanking section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.6.2 Interrupt output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.6.3 Address selection input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 I²C bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 I²C bus selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 I²C bus addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4 Input/output groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6.1 Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 2/32 FILTER LOUT_TV GOUT_TV VCCB 5 GNDB VOUT_RF AOUT_RF VCCB 3 R/COUT_TV 33 VCCB 2 34 35 36 40 37 41 38 42 39 43 46 44 47 45 48 Y/CVBSOUT_TV STV6412B pinout diagram COUT_VCR Figure 1. Y/CVBSOUT_VCR General information VCCB 1 1 VCCB 4 General information BOUT_TV STV6412B FBOUT_TV 49 32 ROUT_TV FBIN_VCR 50 31 VCCAO FBIN_ENC 51 30 LOUT_VCR NC 52 29 ROUT_VCR VDD 53 28 LOUT_CINCH ADD 54 27 ROUT_CINCH SCL 55 26 NC SDA 56 25 GNDA STV6412B 18 Y/CVBSIN_VCR 64 17 GND 16 15 9 14 8 13 7 12 6 11 5 10 4 2 3 1 NC DECA 63 BIN_VCR BIN_ENC LIN_VCR VCC12 LIN_ENC 19 GIN_ENC 62 RIN_ENC RIN_VCR GIN_VCR LIN_AUX CVBSIN_TV 20 R/CIN_ENC 21 61 CIN_ENC 60 SLB_VCR YIN_ENC LIN_TV R/CIN_VCR RIN_AUX 22 GND RIN_TV 59 DECV VCCA 23 Y/CVBSIN_ENC 24 58 VCC 57 CVBSIN_AUX GND IT_OUT SLB_TV 3/32 General information STV6412B 1.1 I/O pin description Table 1. I/O pin description Pin No. 4/32 Symbol Description 1 VCC +5 V supply 2 CVBSIN_AUX CVBS input from auxiliary 3 DECV Video decoupling capacitor 4 Y/CVBSIN_ENC Y/CVBS input from encoder 5 GND Ground 6 YIN_ENC Y input from encoder 7 RIN_AUX Audio right input from auxiliary 8 CIN_ENC Chroma input from encoder 9 LIN_AUX Audio left input from auxiliary 10 R/CIN_ENC Red/Chroma input from encoder 11 RIN_ENC Audio right input from encoder 12 GIN_ENC Green input from encoder 13 LIN_ENC Audio left input from encoder 14 BIN_ENC Blue input from encoder 15 NC Not connected 16 DECA Audio decoupling capacitor 17 GND Ground 18 Y/CVBSIN_VCR Y/CVBS input from VCR SCART 19 LIN_VCR Audio left input from VCR SCART 20 RIN_VCR Audio right input from VCR SCART 21 CVBSIN_TV CVBS input from TV SCART 22 LIN_TV Audio left input from TV SCART 23 RIN_TV Audio right input from TV SCART 24 VCCA (see Figure 2) 9V audio supply voltage output if VCCAO is used as 12V supply voltage input or 9V audio supply voltage input, VCCAO must be used as 9V supply voltage input 25 GNDA Audio ground 26 NC Not connected 27 ROUT_CINCH Audio right output to CINCH 28 LOUT_CINCH Audio left output to CINCH 29 ROUT_VCR Audio right output to VCR SCART 30 LOUT_VCR Audio left output to VCR SCART STV6412B Table 1. General information I/O pin description (continued) Pin No. Symbol Description 31 VCCAO (see Figure 2) 12V supply voltage input, VCCA is regulated 9V output for decoupling or 9V supply voltage input, VCCA must be used as 9V supply voltage input 32 ROUT_TV Audio right output to TV SCART 33 LOUT_TV Audio left output to TV SCART 34 FILTER Chroma trap filter 35 AOUT_RF Audio (L+R) output to RF modulator 36 VOUT_RF CVBS video output to RF modulator 37 VCCB5 Video output buffer supply pin 38 BOUT_TV Blue output to TV SCART 39 VCCB4 Video output buffer supply pin 40 GOUT_TV Green output to TV SCART 41 GNDB Video buffer ground 42 R/COUT_TV Red/Chroma output to TV SCART 43 VCCB3 Video output buffer supply pin 44 Y/CVBSOUT_TV Y/CVBS output to TV SCART 45 VCCB2 Video output buffer supply pin 46 COUT_VCR Chroma output to VCR SCART 47 VCCB1 Video output buffer supply pin 48 Y/CVBSOUT_VCR Y/CVBS output to VCR SCART 49 FBOUT_TV Fast blanking output to TV SCART 50 FBIN_VCR Fast blanking input from VCR SCART 51 FBIN_ENC Fast blanking input from encoder 52 NC Not connected 53 VDD +5 V I²C supply 54 ADD I²C address selection 55 SCL I²C bus clock 56 SDA I²C bus data 57 GND Ground digital 58 IT_OUT Interrupt output 59 SLB_TV Slow blanking input/output from TV SCART 60 R/CIN_VCR Red input (or C input) from VCR SCART 61 SLB_VCR Slow blanking input/output from VCR SCART 62 GIN_VCR Green Input from VCR SCART 5/32 General information Table 1. STV6412B I/O pin description (continued) Pin No. Symbol Description 63 VCC12 +12 V supply 64 BIN_VCR Blue input from VCR SCART Figure 2. Power supply configuration STV6412B STV6412B VCC12 (63) 9 volt output 12V VCCAO (31) V CCA (24) 9V VCCAO (31) VCCA (24) 9 volt input Audio ground In applications where a 12 volt supply from slow blanking is used to derive the internal audio 9 volt supply voltage, the VCCAO pin must be connected to the 12 volt supply as shown in the example. The VCCA pin will show the regulated 9 volt audio supply voltage which must be decoupled by capacitors. 6/32 Audio ground In applications having a dedicated audio supply voltage, the VCCAO pin must be connected together with the VCCA pin to the audio supply as shown in the example. The VCCA pin acts as power supply input for the internal audio block. STV6412B Figure 3. General information STV6412B block diagram 0V 4V FBIN_ENC FBIN_VCR FBIN_ENC FBIN_VCR FBOUT_TV FB switch BIN_ENC LPF BIN_VCR LPF GIN_ENC GIN_VCR R/CIN_ENC LPF R/CIN_VCR BIN_ENC BIN_VCR 3 to 9 dB Mute GIN_ENC GIN_VCR Mute R/CIN_ENC R/CIN_VCR Mute BOUT_TV 3 to 9 dB GOUT_TV 3 to 9 dB RGB switch CIN_ENC LPF Mute R/CIN_VCR CIN_ENC R/CIN_ENC Mute R/C Switch VOUT_RF C switch Y/CVBSIN_VCR YIN_ENC LPF Y/CVBSIN_ENC LPF Mute Mute CIN_ENC R/CIN_ENC Mute + 6 dB CVBSIN_AUX Y/CVBSIN_VCR YIN_ENC Y/CVBSIN_ENC Mute CVBSIN_AUX R/COUT_TV Tri-state Trap FILTER 6 dB Y/CVBSOUT_TV Y/CVBS switch 6 dB COUT_VCR C switch IT_OUT Slow blanking monitor interrupt signal CVBSIN_AUX CVBSIN_TV CVBSIN_TV Y_ENC Y/CVBSIN_ENC Mute SLB_TV SLB_VCR 6 dB Y/CVBSOUT_VCR Y/CVBS Switch LIN_AUX LIN_ENC 0/6/9 dB LIN_TV LIN_AUX LIN_ENC LIN_TV Mute RIN_AUX RIN_ENC RIN_TV Stereo/mono VCR Switch RIN_TV LIN_VCR RIN_VCR 0/6 dB ROUT_CINCH 0/6 dB LOUT_CINCH 0/6 dB AOUT_RF Mute RIN_AUX RIN_ENC LOUT_VCR ROUT_VCR 0/6/9 dB LIN_AUX LIN_ENC LIN_VCR LIN_TV Mute RIN_AUX RIN_ENC RIN_VCR RIN_TV Mute TV switch + -62 dB 0/6 dB Stereo/mono LOUT_TV ROUT_TV -62 dB ADD 0/6 dB I²C bus Decoder SDA SCL 7/32 General information Figure 4. STV6412B STV6412B functional block diagram R/C G B Fast blanking SCART1 TV RF MOD AUX Micro 8/32 STV6412B CVBS Audio L Audio R CVBS/Y Audio L Audio R Slow blanking RGB and FB switches CVBS Audio L+R Chroma switches CVBS Audio L Audio R Audio switches Interrupt Audio L Audio R Slow blanking I/O control output R/C G B Fast blanking CVBS/Y CVBS/Y switches CINCH Encoder C Audio L Audio R Y R/C G B Fast blanking CVBS/Y Audio L Audio R CVBS/Y C Audio L Audio R Slow blanking SCART2 VCR STV6412B 2 Electrical characteristics Electrical characteristics Table 2: Absolute maximum ratings Symbol Parameter Value Unit VCC12 Supply voltage for slow blanking sections 13.2 V VCCAO Supply voltage for audio drivers 13.2 V VCCA Supply voltage for internal digital audio parts 10.0 V VDD Supply voltage for digital parts 6.0 V 6.0 V 0, VCCA 0, VCC or VCCBI 0, 5.5 0, VCC12 V ±4 kV Value Unit 48 °C/W -20 to +150 °C 0 to +70 °C 150 °C VCC, VCCB1 Supply voltage for video sections VIN VESD Audio pins Video pins Bus pins Slow blanking pins Input voltage at pin (in reference to GND) Maximum ESD Voltage allowed (human body model: 100 pF capacitor discharged through 1.5 kΩ serial resistor) Table 3: Thermal data Symbol Parameter RthJA Maximum junction-to-ambient thermal resistance TSTG Storage temperature TOPER Operating free air temperature range Tj 2.1 Maximum junction temperature Latch up At an ambient temperature of 25° C, all pins meet the following specifications: I trigger = 200 mA or I trigger = -200 mA. 2.2 Recommended operating conditions TAMB = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ, RLOUTV = 150 Ω, unless otherwise specified. Table 4: Recommended operating conditions Symbol Parameter Test conditions Min Typ Max Unit 4.75 5 5.25 V 11.2 8.5 12 9 12.8 9.5 V 4.75 5 5.25 V Supply voltages VDD Digital supply voltage VCCAO Audio operating supply voltage VCC Video operating supply voltage - Decoupling capacitor on VCCA - Connected to VCCA 9/32 Electrical characteristics STV6412B Table 4: Recommended operating conditions (continued) Symbol VCC12 Parameter Test conditions Slow blanking control supply voltage Min Typ Max Unit 11.2 12 12.8 V Active mode (all channels ON) IDD Digital supply current VDD = 5 V 6 10 mA ICCA Audio supply current VCCAO = 12 V, no load 8 15 mA ICCV Total video supply current (VCC+VCCB1+VCCB2+VCCB3 +VCCB4+VCCB5) VCC = 5 V, no load, LPF OFF VCC = 5 V, no load, LPF ON VCC = 5 V, with load, LPF OFF VCC = 5 V, with load, LPF ON 35 50 48 63 45 65 62 80 mA ICC12 12 V supply current VCC12 = 12 V SLB input mode SLB output mode, no load 0 3 1 4 mA 10 mA Standby mode (all channels OFF + LPF OFF) IDD Digital supply current VDD = 5 V 6 ICCAstd Audio supply current VCCA0 = 12 V, no load 3 mA ICCVstd Total video supply current VCC = 5 V 1 mA 2.3 Audio section characteristics TAMB = 25°C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 5. Audio section characteristics Symbol Parameter Test conditions SVR100 Supply voltage rejection VRIPPLE = 500 mVRMS at 100 Hz, Gain= 0 dB, DECA filter cap = 47 µF DECA filter cap = 220 µF SVR1K Supply voltage rejection VRIPPLE = 500m VRMS at 1 kHz, Gain = 0 dB VINDC Input DC level VCCA = 9 V VINAC Input signal amplitude RIN Min Typ 60 70 80 70 80 dB 3.2 V Input resistance 30 Bandwidth Flatness Spread of gain in audio band 10/32 50 ±2 -3 dB, 0.5 VRMS, RLOAD = 10 kΩ, Gain = 0 dB -0.5 VRMS, 20 Hz to 20 kHz, Gain = 0 dB Unit dB 2 RINmatch Input resistance matching FRANGE Max VRMS kΩ ±10 50 % kHz 0.5 dB STV6412B Table 5. Electrical characteristics Audio section characteristics (continued) Symbol Parameter Test conditions Min Typ Max Unit 80 70 90 74 dB 85 dB VCCA/2 V CS Channel separation, from audio inputs Between L & R of TV outputs VIN = 0.5 VRMS at 1 kHz, on 1 input, RLOAD = 10 kΩ, Gain = 0 dB Ci Channel isolation from video inputs VIN = 1 Vpp at 15 kHz, on one point VOUT Output DC level VCCA = 9 V VOFF DC offset change Switching between inputs ROUT Output resistance PHD Phase difference f = 1 kHz, 1 VRMS input on each input channel ASN S/N ratio f = 1 kHz, 1 VRMS input (Gain = 0 dB) weighted CCIR 468-4 quasi peak eNI Equivalent RMS input voltage noise BW = 20 Hz to 20 kHz flat, Gain = 0 dB G0 0 dB gain 0.5 VRMS, RLOAD = 10 kΩ, Gain = 0 dB GSTEP Gain step -62 dB to +6 dB (see Figure 5) GMATCH1 Gain matching between different inputs of one output VIN = 0.5 VRMS, 1 kHz, Gain = 0 dB -0.5 0.5 dB GMATCH2 Gain matching between left/right outputs of one input channel VIN = 0.5 VRMS, 1 kHz, Gain = 0 dB -0.5 0.5 dB Total harmonic distortion ENC Input at 0 dB ENC Input at 6 dB ENC Input at 9 dB VOUT = 0.5 VRMS, 1 kHz, LPF @ 80 kHz 0.1 0.1 0.1 % % % VCL Output clipping level THD = 0.2%, 1 kHz RL Output load resistance Mute suppression THD0 THD6 THD9 Mute 75 1 ±15 mV 60 120 Ω 3 ° deg. 85 dB 5 µV -0.5 +0.5 2 0.01 0.01 0.01 dB dB 2.1 2.3 VRMS VIN = 1 VRMS, THD = 0.3%, Gain = 0 dB 2 2.25 kΩ VIN = 0.5 VRMS, on one point -90 dB 11/32 Electrical characteristics Figure 5. STV6412B Volume control characteristics 0 ± 0.5 dB 31 18 -36 Step number ± 0.5 dB + 2 dB -62 dB 2.4 - 0.5 dB Video section characteristics TAMB = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V Table 6. Symbol Video section characteristics Parameter Test conditions VDCIN DC input level Bottom sync pulse ICLAMP Clamping current at VDCIN -400 mV Input leakage current VIN = VDCIN +1 V ILEAK Min 1 Typ Max Units 2 V 2 mA 1 10 CIN Input capacitance VIN Max input signal VCC = 5 V 1.5 VPP DYN Dynamic output signal VCC = 5 V 3 VPP BW Bandwidth at -3 dB without LPF Y/CVBS RGB Y/C mixer (on VOUT-RF) VIN = 1 VPP VIN = 1 VPP VIN = 1 VPP, VINC = muted Spread of gain in video band (15 kHz to 5 MHz) Y/CVBS RGB Y/C Mixer (on VOUT-RF) VIN = 1 VPP VIN = 1 VPP VIN = 1 VPP, VINC = muted Low pass filter bandwidth at -3 dB VIN = 1 VPP, CL = 10pF 7.5 ATT Low pass filter attenuation 27 MHz -47 CTi Crosstalk isolation between Input channel VIN = 1 VPP at f = 4.43 MHz, on one point 60 Flatness BW LPF 12/32 2 µA 10 10 8 pF 15 15 10 MHz MHz MHz ±0.5 ±0.5 ±1.5 dB dB dB MHz -36 dB dB STV6412B Table 6. Electrical characteristics Video section characteristics (continued) Symbol Parameter Crosstalk isolation between output channel CTo Test conditions Min Typ VIN = 1 VPP at f = 4.43 MHz, on one point, RLOAD = 150 Ω Max 50 Units dB 5 10 Ω 5.5 6 6.5 dB VIN = 1 VPP, Gain set to 6 dB -0.3 0 0.3 dB 3 dB to 6 dB 0.75 1 1.25 dB Gain on Y,/CVBS channels VIN = 1 VPP 5.5 6 6.5 dB Gain matching between Y, CVBS inputs VIN = 1 VPP -0.5 0 0.5 dB DC output voltage Bottom sync pulse 0.6 V DCOUT RF RF output voltage Bottom sync pulse 1 V Differential phase VIN = 1 VPP at f = 4.43 MHz 1 5 ° deg. Differential gain VIN = 1 VPP at f = 4.43 MHz 1 5 % Mute Mute suppression VIN = 1 VPP at f = 5 MHz on one point LNL Luminance non-linearity VSN Video S/N ratio ROUT Output resistance GRGB Gain at RGB outputs VIN = 1 VPP, Gain set to 6 dB Gain matching between R, G, B GRGBM GRGBSTEP Step of gain GYCVBS GYCVBSM DCOUT DPHI DG Note: 1 2.5 -55 dB 0.3 Refer to Note 1 3 % 65 dB S/N = 20 log (VOUT Black to White = 0.7 VPP / VNoise (mVRMS) weighted CCIR 567). Chroma section characteristics TAMB = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 7. Symbol VDCIN Chroma section characteristics Parameter Input resistance CIN Input capacitance VIN Max input signal DYN Dynamic output signal DCOUT DC output VCR voltage CTi Min. DC input level RIN CBW Test conditions 30 Chroma bandwidth CIN = 1 VPP at -3 db Crosstalk isolation between Input channel VIN = 1 VPP at f = 4.43 MHz, on one input 10 Typ. Max. Units 3 V 50 kΩ 2 pF 1.5 VPP 3 VPP 2.2 V 15 MHz 55 dB 13/32 Electrical characteristics Table 7. STV6412B Chroma section characteristics (continued) Symbol Parameter CTo ROUT Test conditions Min. Typ. Max. Units Crosstalk isolation between output VIN = 1 VPP at f = 4.43 MHz, on channel one input, RLOAD = 150 Ω 50 Output resistance 5 10 Ω dB Gain at OUTC VIN = 1 VPP 5.5 6 6.5 dB GCM Gain matching between C inputs VIN = 1 VPP -0.5 0 0.5 dB Mute Mute suppression VIN = 1 VPP at f = 4.43 MHz, on one input -55 CToYdel Chroma to luma delay, source Y/C Pin other than VOUT_RF, VPP @ 4.43 MHz, CToYdel Chroma to luma delay, source Y/C Pin VOUT_RF GOUTC Output impedance when switched 2.7V applied to COUT_VCR to ground with series 75 Ω Resistor ZCOUT_VCR 2.6 dB 20 ns 20 ns Ω 2 Blanking section TAMB = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ, RLOUTV = 150 Ω, unless otherwise specified. Table 8. Blanking section Symbol Parameter Test conditions Min Typ Max Units Input mode SLBlow Input low level threshold 2.5 3.25 4 V SLBhigh Input high level threshold 7.5 8.25 9 V 50 100 µA IIN Input current Output mode SLBlow Output low level (int. TV) 0 0.02 1.5 V SLBmed Output medium level (ext. 16/9) 5 5.75 6.5 V SLBhigh Output high level (ext. 4/3) 10 11 12 V Min Typ Max Units 0.4 0.7 0.9 V 2 10 µA 2.6.1 Fast blanking section Table 9. Fast blanking section Symbol Parameter Test conditions Input mode FBlow/high Input low/high level threshold IIN Input current Output mode 14/32 STV6412B Table 9. Electrical characteristics Fast blanking section (continued) Symbol Parameter FBLOW Output low level FBHIGH Output high level FBDEL FBTRANS 2.6.2 Test conditions RLOAD = 150 Ω Fast blanking RGB delay At 50% on digital RGB transients, at 2 V on FB rise transient, at 1 V on FB fall, CLOAD = 10pF maximum FB transitions at FB output Rise Time Fall Time CLOAD = 10 pF maximum between 10% and 90% between 90% and 10% Min 3.0 Typ 3.4 Max Units 0.5 V 3.8 V 15 ns 10 10 ns ns Interrupt output Refer to Note 1 Table 10. Symbol Interrupt output Parameter Test conditions Min. Typ. Max. Units IT-Leak High level leakage External pull-up to 5 V 10 µA IT-Low Output low level (active) IIN = 0 mA IIN = 1 mA 0.3 0.7 V V Typ. Max. Units 0 0.2 V VDD V 10 µA 2.6.3 Address selection input Table 11. Address selection input Symbol Parameter Test conditions Min. ADDsel_L Address selection low level ADDsel_H Address selection high level Leakage current ILEAK Note: 1 2.5 The interrupt is forced low when a change is detected on slow blanking inputs. It can be used in standby mode to wake up the microprocessor. It is released when the I²C bus register is read. 15/32 Electrical characteristics 2.7 STV6412B I²C bus characteristics TAMB = 25°C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ, RLOUTV = 150 Ω, unless otherwise specified. Table 12. Symbol I²C bus characteristics Parameter Test conditions Min Typ Max Units SCL VIL Low level input voltage -0.3 1.5 V VIH High level input voltage 2.3 5.5 V ILI Input leakage current 10 µA 400 kHz fSCL VIN = 0 to 5.5 V -10 0 Clock frequency tR Input rise time 1.5 V to 3 V 1 µs tF Input fall time 1.5 V to 3 V 300 ns CI Input capacitance 10 pF SDA VIL Low level input voltage -0.3 1.5 V VIH High level input voltage 2.3 5.5 V ILI Input leakage current 10 µA CI Input capacitance 10 pF tR Input rise time 1.5 V to 3 V 1 µs tF Input fall time 3 V to 1.5 V 300 ns Low level output voltage IOL = 3 mA 0.4 V tF Output fall time 3 V to 1.5 V 250 ns CL Load capacitance 400 pF VOL VIN = 0 to 5.5 V -10 0 Timing: SCL frequency = 400 kHz tLOW Clock low period 1.3 µs tHIGH Clock high period 0.6 µs tSU,DAT Data setup time 100 ns tHD,DAT Data hold time 0 tSU,STO Setup time from clock high to stop 0.6 µs Start setup time following a stop 1.3 µs tHD,STA Start hold time 0.6 µs tSU,STA Start setup time following clock low to high transition 0.6 µs tBUF 16/32 340 ns STV6412B Figure 6. Electrical characteristics I²C bus timing SDA tBUF tF tLOW SCL tHD,STA tR tHD,DAT tHIGH tSU,DAT SDA (start, stop) tSU,STA tSU,STO 17/32 I²C bus selection 3 STV6412B I²C bus selection Data transfers follow the usual I²C format; that is, after the start condition (S), a 7-bit slave address is sent, followed by an eighth bit (W) that determines whether the data direction is Read (W=1) or Write (W=0). An 8-bit sub-address is sent to select a register, followed by an 8-bit data word to be included in the register. The IC’s I²C bus decoder enables the automatic incrementation mode in write mode. The circuit operates at clock frequencies of up to 400 kHz. Table 13. String format Write only mode (S = Start condition, P = Stop condition, A = Acknowledge) S SLAVE ADDRESS Table 14. 0 A SUB-ADDRESS DATA A P A DATA A P Read only mode S SLAVE ADDRESS Table 15. 1 Slave address Address A6 A5 A4 A3 A2 A1 A0 Value 1 0 0 1 0 1 X Table 16. Auto increment mode S SLAVE ADDRESS 0 A SUB-ADDRESS A DATA0 A Sub-address 3.1 A DATA1 A .... DATAn A P Sub-address +1 Sub-address + N I²C bus addresses Write address: 1001 01X0, read address: 1001 01X1 Address selection pin grounded: X = 0, write address = 94(hex), read address = 95(hex) Address selection pin to supply: X = 1, write address = 96(hex), read address = 97(hex) Table 17. Reg Addr (Hex) Input signal summary (write mode) Data d7 d6 00h TV stereo mono TV 0/6 dB 01h VCR stereo mono Not used (see Note 1) d5 d4 d3 d2 d1 d0 Audio 18/32 TV volume-62 dB to 0 dB - 2 dB steps VCR audio switch control CINCH audio gain Soft volume mode TV/CINCH audio switch control STV6412B Table 17. Reg Addr (Hex) I²C bus selection Input signal summary (write mode) (continued) Data d7 d6 d5 d4 d3 d2 d1 d0 Video 02h VCR chroma muted VCR video and chroma switch control 03h RGB and FB tri-state RGB gain TV chroma muted TV video and chroma switch control RGB switch control Fast blanking mode/input selection Miscellaneous 04h IT enable 05h SLB mode Low pass filter control VCR slow blanking VCR-C output control RF trap RF adder filter control control TV R or C output selection VCR R/C sub clamp ENC R/C sub clamp VCR inputs ENC inputs ENC audio input gain 0/6/9 dB TV slow blanking STB-BY RF outputs 06h Note: 1 Table 18. Reg Addr (Hex) TV outputs CINCH outputs VCR outputs AUX inputs TV inputs Unused data must be set to “0”. TV audio output Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 Soft volume change 1 X X X X X X X X X X X X X X 0 1 Active Disabled Level adjustment 5 X X X X 0 1 0 1 0 1 0 1 0 1 X X 0 dB -62 dB (-2 dB/step) 6 dB extra gain 1 X X 0 1 X X X X X X X X X X X X 0 dB +6 dB TV stereo or mono mode 1 0 1 X X X X X X X X X X X X X X 0 = Stereo 1 = Mono 00h 19/32 I²C bus selection STV6412B Table 19: Audio selection and VCR audio output Reg Addr (Hex) 01h 20/32 Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Muted Encoder L/R selected VCR L/R selected AUX L/R selected TV L/R selected Not allowed Not allowed Not allowed TV & CINCH audio output selection 3 X X X X X X X X CINCH audio gain 1 X X X X X X X X 0 1 X X X X X X 0 dB Follow TV gain VCR audio output selection 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X Muted Encoder L/R selected TV L/R selected AUX L/R selected VCR stereo or mono mode 1 0 1 X X X X X X X X X X X X X X 0 = Stereo 1 = Mono STV6412B I²C bus selection Table 20: TV and VCR selection Reg Addr (Hex) Data Description Bits Comments d7 TV video output selection 3 X X X X X X X X TV chroma output control 1 X X d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Y/CVBS muted & chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS_VCR & R/C_VCR CVBS_AUX & chroma muted Not allowed Not allowed Not allowed X X X X X X 0 1 X X X X X X Chroma defined by d2d1d0 Chroma force to mute 02h VCR video output selection 3 X X X X X X X X VCR chroma output control 1 0 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X Y/CVBS muted & chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC CVBS_TV & chroma muted CVBS_AUX & chroma muted Not allowed Not allowed Not allowed X X X X X X X X X X X X X X Chroma defined by d6d5d4 Chroma force to mute 21/32 I²C bus selection STV6412B Table 21: RGB and fast blanking outputs Reg Addr (Hex) Data Description Bits Fast blanking control RGB selection d6 d5 d4 d3 d2 d1 d0 2 X X X X X X X X X X X X X X X X X X X X X X X X 0 0 1 1 0 1 0 1 FB forced to low level FB forced to high level FB from encoder FB from VCR 2 X X X X X X X X X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X Muted RGB_ENC selected RGB_VCR selected Not allowed 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X +6 dB gain +5 dB gain +4 dB gain +3 dB gain 1 X X 0 1 X X X X X X X X X X X X +0 dB extra gain +3 dB for weak input signals 0 X X X X X X X 1 X X X X X X X RGB and FB outputs high impedance state RGB and FB outputs active 03h RGB gain RGB and fast blanking control Comments d7 1 Table 22: RF and miscellaneous control Reg Addr (Hex) Data Description d6 d5 d4 d3 d2 d1 d0 1 X X X X X X X X X X X X X X 0 1 Red signal selected Chroma signal selected 1 X X X X X X X X X X X X 0 1 X X CVBS to RF output Y + C to RF output 1 X X X X X X X X X X 0 1 X X X X Filter not active Filter active C_VCR output control 2 X X X X X X X X X 0 0 1 0 1 X X X X X X X X X X Grounded Tri-state Mode (High Impedance) Active Low pass filter control 1 X X X X 0 1 X X X X X X X X X X LPF Enabled LPF Disabled Slow blanking mode 1 X X 0 1 X X X X X X X X X X X X Normal Mode SLB TV is driven by SLB VCR IT enable 1 0 1 X X X X X X X X X X X X X X No interrupt flag IT enable RF output: adder control and chroma sub-carrier filter selection 22/32 Comments d7 R/C TV output selection 04h Bits STV6412B I²C bus selection Table 23: Slow blanking and inputs control Reg Addr (Hex) Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 Encoder R/C sub clamp 1 X X X X X X X X X X X X X X 0 1 Bottom level clamp Average level clamp VCR R/C sub clamp 1 X X X X X X X X X X X X 0 1 X X Bottom level clamp Average level clamp Encoder input level adjustment 2 X X X X X X X X X X X X 0 0 1 0 1 0 X X X X X X 0 dB for normal audio inputs +6 dB for weak audio inputs +9 dB for weak audio inputs 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X Input mode only Output < 2 V Output 16/9 format Output 4/3 format 2 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X Input mode only Output < 2 V Output 16/9 format Output 4/3 format 05h Slow blanking TV SCART Slow blanking VCR SCART Table 24: Standby modes Reg Addr (Hex) 06h Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 ENC inputs 1 X X X X X X X X X X X X X X 0 1 Inputs active Inputs disabled VCR inputs 1 X X X X X X X X X X X X 0 1 X X Inputs active Inputs disabled TV inputs 1 X X X X X X X X X X 0 1 X X X X Inputs active Inputs disabled AUX inputs 1 X X X X X X X X 0 1 X X X X X X Inputs active Inputs disabled VCR outputs 1 X X X X X X 0 1 X X X X X X X X Audio & video outputs ON Audio & video outputs OFF CINCH outputs 1 X X X X 0 1 X X X X X X X X X X Audio & video outputs on audio & video outputs OFF TV outputs 1 X X 0 1 X X X X X X X X X X X X Audio & video outputs ON Audio & video outputs OFF RFmod outputs 1 0 1 X X X X X X X X X X X X X X Audio & video outputs ON Audio & video outputs OFF 1 1 1 1 1 1 1 1 Only I²C bus and slow blanking detection parts are supplied. Full stop 23/32 I²C bus selection STV6412B Table 25: Output signals (read mode) Reg Addr (Hex) Note: 24/32 Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 Slow blanking TV SCART 2 X X X X X X X X X X X X X X X X X X 0 1 1 1 0 1 Input < 2 V Input 16/9 format Input 4/3 format Slow blanking VCR SCART 2 X X X X X X X X X X X X 0 1 1 1 0 1 X X X X X X Input < 2 V Input 16/9 format Input 4/3 format Interrupt flag 1 X X X X X X 0 1 X X X X X X X X No change since read One change has been detected (refer to Note 1) 1 The interrupt flag will be cleared when this register is read. To prepare for a new interrupt, a “1” must be re-written in the IT Enable bit (Reg. 04h, d7). STV6412B Input/output groups 4 Input/output groups Figure 7. Bottom clamped video inputs (pins Figure 8. 2, 4, 6, 12, 14, 18, 21, 62, and 64) Average clamped video inputs (pin 8) VCC 5 V VCC 5 V VCC 5 V VCC 5 V IB 25 kΩ 2 V + VD 25 kΩ 3V 15 kΩ tri tri Protected pad Protected pad R/C clamped video inputs (pins 10 and 60) Figure 9. Fast blanking output (pin 49) VCCB1 5 V VCC 5 V R/C inputs may be configured either as a bottom clamped input or as an average clamped input. In either case, the simplified input schematic is very close to one of the graphics shown above Protected pad Figure 10. Fast blanking inputs (pins 50 and 51) Figure 11. Video outputs (pins 38, 40, 42, 44, 46, and 48 VCCB1,2 ...5 5 V VCC 5 V VDD 5 V ib tri Protected Pad Protected pad Protected pad 25/32 Input/output groups STV6412B Figure 12. Audio inputs (pins 11, 13, 19, 20, 22, and 23) Figure 13. Audio outputs (pins 27, 28, 29, 30, 32 and 33) I2 V 12 V 9 kΩ IB 32 kΩ 24 kΩ Protected pad 24 kΩ 13 kΩ 8 kΩ 2 kΩ Protected pad VREF Figure 14. Slow blanking I/O (pins 59 and 61) Figure 15. Interrupt output (pin 58) VDD 5 V Float 12 V 40 Ω 110 kΩ 55 kΩ Figure 16. I²C bus (SDA) (pin 56) VDD 5 V Protected pad Protected pad Figure 17. I²C bus (ADD) (pin 54) VDD 5 V Float Float 10 kΩ 10 kΩ Protected pad 26/32 Protected pad STV6412B Input/output groups Figure 18. I²C bus (SCL) (pin 55) VDD 5 V Float 10 kΩ Protected pad Figure 19. Power supply connection VCCB1 VCCB2 5V 47 45 VCCB3 VCCB4 VCCB5 5V 43 39 37 VCC 5V 1 5V 41 5 GNDB GNDV VCCA0 12 V 17 GNDref 31 12 V VCC1 VCCA 24 12 V 63 12 V VDD 5V 53 25 57 GNDA GND 5V 27/32 Application diagram STV6412B 5 Application diagram Note: The application diagram presented here is an example only and is subject to change without notice. The real application diagram will depend on application conditions and constraints. Figure 20. STV6412B application diagram 4.43 MHz Trap Modulator ROUT_VCR VDD LOUT_CINCH ADD ROUT_CINCH SCL NC SDA GNDA STV6412B VCCA GND RIN_TV IT_OUT LIN_TV SLB_TV CVBSIN_TV R/CIN_VCR SLB_VCR RIN_VCR NC DECA LIN_ENC BIN_ENC RIN_ENC GIN_ENC R/CIN_ENC LIN_AUX CIN_ENC 28/32 RIN_AUX AUX GND Audio L Input LIN_VCR YIN_ENC Audio R Input DECV CVBS Input CVBSIN_AUX BIN_VCR Y/CVBSIN_ENC GIN_VCR VCC12 ROUT_TV VCCAO LOUT_VCR NC VCC LOUT_TV FILTER AOUT_RF VOUT_RF VCCB5 VCCB4 BOUT_TV GNDB GOUT_TV R/COUT_TV VCCB3 Y/CVBSOUT_TV VCCB2 FBIN_ENC COUT_VCR FBIN_VCR VCCB1 Y/CVBSOUT_VCR FBOUT_TV Y/CVBSIN_VCR GND STV6412B 6 Package mechanical data Package mechanical data Figure 21. 64 pin, LQFP64 (low-profile quad flat package) 14 × 14 × 1.4 mm Seating plane Pin 1 identification Gage plane Table 26. LQFP64 package dimensions Millimeters Inches Dimensions Min. Typ. A Max. Min. Typ. 1.60 A1 0.05 A2 1.35 b 0.30 c 0.09 Max. 0.063 0.15 0.002 1.40 1.45 0.053 0.055 0.057 0.37 0.45 0.0118 0.015 0.018 0.20 0.0035 ccc 0.006 0.0079 0.10 0.0039 D 15.80 16.00 16.20 0.622 0.630 0.638 D1 13.80 14.00 14.20 0.543 0.551 0.559 D3 12.00 0.472 e 0.80 0.0315 E 15.80 16.00 16.20 0.622 0.630 0.638 29/32 Package mechanical data Table 26. E1 LQFP64 package dimensions (continued) 13.80 E3 L STV6412B 14.00 14.201 0.543 12.00 0.45 L1 0.60 0.551 0.559 0.472 0.75 0.018 1.00 0.024 0.030 0.039 Degrees k 6.1 0° minimum 3.5° typical 7° maximum Environment In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. 30/32 STV6412B Revision history Revision history Table 27. Document revision history Date Revision 28-Jul-2008 1 Changes Initial Release. 31/32 STV6412B Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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