INTEGRATED CIRCUITS DATA SHEET TDA3675 Low dropout voltage/quiescent current 8.5 V voltage regulator with enable Preliminary specification Supersedes data of 1999 Nov 22 File under Integrated Circuits, IC01 2000 Feb 01 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable TDA3675 – Able to withstand voltages up to 18 V at the output (supply line may be short-circuited) FEATURES • Fixed 8.5 V, 100 mA regulator with enable function – ESD protection for all pins • Supply voltage range up to 33 V (45 V) – DC short-circuit safe to ground and VP of the regulator output • Very low quiescent current of 15 µA (typical value) • Very low dropout voltage – Temperature protection at Tj > 150 °C. • High ripple rejection • Very high stability: GENERAL DESCRIPTION – Electrolytic capacitors: Equivalent Series Resistance (ESR) < 38 Ω at IREG ≤ 25 mA The TDA3675 is a fixed 8.5 V voltage regulator with very low dropout voltage and quiescent current, which operates over a wide supply voltage range. – Other capacitors: 100 nF at 200 µA ≤ IREG ≤ 100 mA. • Pin compatible family TDA3672 to TDA3676 The IC is available as: • Protections: • TDA3675T: VP ≤ 33 V, −40 °C ≤ Tamb ≤ +85 °C and SO8 package (non-automotive) – Reverse polarity safe (down to −25 V without high reverse current) • TDA3675AT: VP ≤ 45 V, −40 °C ≤ Tamb ≤ +125 °C and SO8 package (automotive). – Negative transient of 50 V (RS = 10 Ω, t < 100 ms) QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage regulator on TDA3675T 3 TDA3675AT Iq quiescent supply current 14.4 33 V 3 14.4 45 V − 15 30 µA 11.5 V ≤ VP ≤ 22 V; IREG = 0.5 mA 8.16 8.5 8.84 V 9.5 V ≤ VP ≤ 45 V; IREG = 0.5 mA 8.08 8.5 8.92 V VP = 14.4 V; 0.5 mA ≤ IREG ≤ 100 mA 8.08 8.5 8.92 V − 0.18 0.3 V VP = 14.4 V; IREG = 0 mA; VI(EN) = 5 V Regulator output VREG VREG(drop) regulator output voltage dropout voltage VI(EN) = 5 V VP = 8.0 V; IREG = 50 mA ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TDA3675T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 TDA3675AT SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 2000 Feb 01 2 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable TDA3675 BLOCK DIAGRAM handbook, halfpage VP 8 REGULATOR EN 5 1 REG BAND GAP THERMAL PROTECTION TDA3675 2, 3, 6, 7 MGL829 GND Fig.1 Block diagram. PINNING SYMBOL PIN (SO8) DESCRIPTION REG 1 regulator output GND 2, 3, 6 and 7 ground; note 1 n.c. 4 not connected EN 5 enable input VP 8 supply voltage handbook, halfpage Note REG 1 1. All GND pins are connected to the lead frame and can also be used to reduce the total thermal resistance Rth(j-a) by soldering these pins to a ground plane. The ground plane on the top side of the Printed-Circuit Board (PCB) acts like a heat spreader. 8 VP GND 2 7 GND 6 GND 5 EN TDA3675 GND 3 n.c. 4 MGL830 Fig.2 Pin configuration. 2000 Feb 01 3 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable FUNCTIONAL DESCRIPTION TDA3675 A temperature protection circuit is included, which switches off the regulator output at a junction temperature above 150 °C. The TDA3675 is a fixed 8.5 V regulator which can deliver output currents up to 100 mA. The regulator is available in an SO8 package with fused centre pins connected to the lead frame. The regulator is intended for portable, mains, telephone and automotive applications. To increase the lifetime of batteries, a specially built-in clamp circuit keeps the quiescent current of this regulator very low, also in dropout and full load conditions. A new output circuit guarantees the stability of the regulator for a capacitor output circuit with an ESR up to 20 Ω. If only a 100 nF capacitor is used, the regulator is fully stable when IREG > 200 mA. This is very attractive as the ESR of an electrolytic capacitor increases strongly at low temperatures (no expensive tantalum capacitor is required). The regulator remains operating down to very low supply voltages and below this voltage it switches off. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT supply voltage VP TDA3675T − 33 V − 45 V VP(rp) reverse polarity supply voltage non-operating − −25 V Ptot total power dissipation temperature of PCB ground plane is 25 °C − 4.1 W Tstg storage temperature non-operating −55 +150 °C Tamb ambient temperature operating −40 +85 °C −40 +125 °C −40 +150 °C TDA3675AT TDA3675T TDA3675AT Tj junction temperature operating THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth(j-a) thermal resistance from junction to ambient in free air; soldered 125 K/W Rth(j-c) thermal resistance from junction to case to centre pins; soldered 30 K/W QUALITY SPECIFICATION In accordance with “SNW-FQ-611E”. 2000 Feb 01 4 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable TDA3675 CHARACTERISTICS VP = 14.4 V; Tamb = 25 °C; VI(EN) = 5 V; measured in test circuit of Fig.3; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply voltage: pin VP VP supply voltage regulator operating; note 1 TDA3675T 3 TDA3675AT Iq quiescent current 3 14.4 33 V 14.4 45 V VP = 14.4 V; IREG = 0 mA; VI(EN) = 0 V − 4 15 µA VP = 14.4 V; IREG = 0 mA; VI(EN) = 5 V − 15 30 µA 9.5 V ≤ VP ≤ 22 V; IREG = 10 mA − 0.2 0.5 mA 9.5 V ≤ VP ≤ 22 V; IREG = 50 mA − 1.4 2.5 mA Enable input: pin EN VI(EN) II(EN) enable input voltage enable input current enable off; VREG ≤ 0.8 V −1.0 − +1.0 V enable on; VREG ≥ 8.0 V 3.0 − 18 V VI(EN) = 5 V − 0.3 − µA 11.5 V ≤ VP ≤ 22 V; IREG = 0.5 mA 8.16 8.5 8.84 V 9.5 V ≤ VP ≤ 45 V; IREG = 0.5 mA; Tamb ≤ 125 °C 8.08 8.5 8.92 V 0.5 mA ≤ IREG ≤ 100 mA; Tamb ≤ 125 °C 8.08 8.5 8.92 V VP = 8.0 V; IREG = 50 mA; Tamb ≤ 85 °C − 0.18 0.3 V Regulator output: pin REG; note 2 VREG output voltage VREG(drop) dropout voltage VREG(stab) long-term stability voltage − 20 − mV/1000 h ∆VREG(line) line input regulation voltage 11.5 V ≤ VP ≤ 16 V; IREG = 0.5 mA − 1 10 mV 10.5 V ≤ VP ≤ 22 V; IREG = 0.5 mA − 1 30 mV 7 V ≤ VP ≤ 45 V; IREG = 0.5 mA; Tamb ≤ 125 °C − 1 50 mV ∆VREG(load) load output regulation voltage 0.5 mA ≤ IREG ≤ 50 mA; Tamb ≤ 125 °C − 10 50 mV SVRR supply voltage ripple rejection fi = 120 Hz; Vi(ripple) = 1 V (RMS); IREG = 0.5 mA 50 60 − dB IREG(crl) current limit VREG > 8.0 V 0.17 0.25 − A ILO(rp) output leakage current at reverse polarity VP = −15 V; VREG ≤ 0.3 V − 1 500 µA Notes 1. The regulator output will follow VP if VP < VREG + VREG(drop). 2. Limiting values as applicable for device type: a) TDA3675T: VP ≤ 33 V, −40 °C ≤ Tamb ≤ +85 °C. b) TDA3675AT: VP ≤ 45 V, −40 °C ≤ Tamb ≤ +125 °C. 2000 Feb 01 5 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable TDA3675 TEST AND APPLICATION INFORMATION MDA961 102 handbook, halfpage ESR (Ω) (1) 10 ndbook, halfpage VP 8 C1(1) 1 µF VREG = 8.5 V C2 10 µF 1 TDA3675 stable region 1 VI(EN) 5 2, 3, 6, 7 MGL831 (2) 10−1 10−1 1 10 C2 (µF) 102 (1) Maximum ESR at 200 µA ≤ IREG ≤ 100 mA. (2) Minimum ESR only when IREG ≤ 200 µA. VI(EN) = 5 V. (1) C1 is optional (to minimize supply noise only). Fig.4 Graph for selecting the value of the output capacitor. Fig.3 Test circuit. Noise The output noise is determined by the value of the output capacitor. The noise figure is measured at a bandwidth of 10 Hz to 100 kHz (see Table 1). MDA962 103 handbook, halfpage Table 1 Noise figures ESR (Ω) OUTPUT CURRENT IREG (mA) NOISE FIGURE (µV) C2 = 10 µF C2 = 47 µF C2 = 100 µF 0.5 550 320 300 50 650 400 400 102 22 10 Stability stable region 1 The regulator is stabilized with an external capacitor connected to the output. The value of this capacitor can be selected using the diagrams shown in Figs 4 and 5. The following four examples show the effects of the stabilization circuit using different values for the output capacitor. 10−1 1 Fig.5 2000 Feb 01 6 10 102 IREG (mA) 103 ESR as a function of IREG for selecting the value of the output capacitor. Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable TDA3675 For successful operation of the IC (maximum output current capability) special attention has to be given to the copper area required as heatsink (connected to all GND pins), the thermal capacity of the heatsink and its ability to transfer heat to the external environment. It is possible to reduce the total thermal resistance from 125 to 50 K/W. EXAMPLE 1 The regulator is stabilized with an electrolytic capacitor of 68 µF (ESR = 0.5 Ω). At Tamb = −40 °C, the capacitor value is decreased to 22 µF and the ESR is increased to 3.5 Ω. The regulator will remain stable at a temperature of Tamb = −40 °C. EXAMPLE 2 APPLICATION CIRCUIT WITH BACKUP FUNCTION The regulator is stabilized with an electrolytic capacitor of 10 µF (ESR = 3.3 Ω). At Tamb = −40 °C, the capacitor value is decreased to 3 µF and the ESR is increased to 20 Ω. The regulator will remain stable at a temperature of Tamb = −40 °C. Sometimes a backup function is needed to supply, for example, a microcontroller for a short period of time when the supply voltage spikes to 0 V (or even −1 V). This function can easily be built with the TDA3675 by using an output capacitor with a large value. When the supply voltage is 0 V (or −1 V), only a small current will flow into pin REG from this output capacitor (a few µA). EXAMPLE 3 The regulator is stabilized with a 100 nF MKT capacitor connected to the output. Full stability is guaranteed when the output current is larger then 200 µA. Because the thermal influence on this capacitor value is almost zero, the regulator will remain stable at a temperature of Tamb = −40 °C. The application circuit is given in Fig.6. EXAMPLE 4 The regulator is stabilized with a 100 nF capacitor in parallel with a electrolytic capacitor of 10 µF connected to the output. ndbook, halfpage The regulator is now stable under all conditions and independent of: VP • The ESR of the electrolytic capacitor • The value of the electrolytic capacitor 8 C1(1) 1 µF VI(EN) • The output current. VREG = 8.5 V 1 C2 (2) TDA3675 5 2, 3, 6, 7 MGL832 Application circuits The maximum output current of the regulator equals: 150 – T amb I REG ( max ) = -----------------------------------------------------R th(j-a) × ( V P – V REG ) VI(EN) = 5 V. (1) C1 is optional (to minimize supply noise only). (2) C2 ≤ 4700 µF. 150 – T amb = ------------------------------------------ (mA) 100 × ( V P – 8.5 ) Fig.6 Application circuit with backup function. When Tamb = 21 °C and VP = 17.5 V, the maximum output current equals 140 mA. 2000 Feb 01 7 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable TDA3675 Additional application information This section gives typical curves for various parameters measured on the TDA3675AT. Standard test conditions are: VP = 14.4 V; Tamb = 25 °C. MDA947 25 MDA949 4 handbook, halfpage handbook, halfpage Iq (µA) Iq (mA) 20 3 15 2 10 1 5 0 0 20 10 VP (V) 0 30 0 10 20 40 30 VP (V) 50 IREG = 0 mA. Fig.7 Fig.8 Quiescent current as a function of the supply voltage. MDA951 2 Quiescent current as a function of high supply voltage. MDA948 0.48 handbook, halfpage handbook, halfpage Iq (mA) (1) Iq (mA) 1.5 0.44 1 0.40 0.5 (2) 0 −40 0.36 0 40 80 120 160 Tj (°C) 5 (1) Iq at 50 mA load. (2) Iq at 10 mA load. Fig.9 15 20 VP (V) 25 IREG = 10 mA. Quiescent current as a function of the junction temperature. 2000 Feb 01 10 Fig.10 Quiescent current as a function of the supply voltage. 8 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable TDA3675 MDA950 2 MDA952 4 handbook, halfpage handbook, halfpage Iq (mA) Iq (mA) 3 1.8 2 1.6 1 1.4 0 5 10 20 15 VP (V) 25 0 20 40 60 80 100 IREG (mA) IREG = 50 mA. Fig.11 Quiescent current as a function of the supply voltage. Fig.12 Quiescent current as a function of the load current. MGL833 8.7 MGL834 10 handbook, halfpage handbook, halfpage VREG VREG (V) (V) 8 8.6 6 4 8.5 2 8.4 −50 0 50 100 150 0 −50 200 Tj (°C) 0 50 100 150 200 Tj (°C) IREG = 0 mA. IREG = 0 mA. Fig.13 Output voltage as a function of the junction temperature. Fig.14 Output voltage thermal protection as a function of the junction temperature. 2000 Feb 01 9 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable TDA3675 MDA957 500 MGL835 10 handbook, halfpage handbook, halfpage VREG VREG(drop) (V) 8 (mV) 400 6 300 4 200 2 0 100 0 80 40 IREG (mA) 120 0 100 200 IREG (mA) VP = 10 V with pulsed load. Fig.15 Dropout voltage as a function of the output current. Fig.16 Fold back protection mode. MDA956 −30 handbook, halfpage (1) SVRR (dB) −40 (2) −50 (3) (1) −60 (2) −70 10 (3) 102 103 104 f (Hz) 105 IREG = 10 mA; C2 = 10 µF. (1) SVRR at RL = 100 Ω. (2) SVRR at RL = 500 Ω. (3) SVRR at RL = 10 kΩ. Fig.17 SVRR as a function of the ripple frequency. 2000 Feb 01 10 300 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable TDA3675 PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 D E A X c y HE v M A Z 5 8 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.014 0.0075 0.20 0.19 0.16 0.15 0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024 inches 0.010 0.057 0.069 0.004 0.049 0.01 0.01 0.028 0.004 0.012 θ Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT96-1 076E03 MS-012 2000 Feb 01 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-22 99-12-27 11 o 8 0o Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 2000 Feb 01 TDA3675 12 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable TDA3675 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 2000 Feb 01 13 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable NOTES 2000 Feb 01 14 TDA3675 Philips Semiconductors Preliminary specification Low dropout voltage/quiescent current 8.5 V voltage regulator with enable NOTES 2000 Feb 01 15 TDA3675 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753503/02/pp16 Date of release: 2000 Feb 01 Document order number: 9397 750 06803