PHILIPS TDA4884

INTEGRATED CIRCUITS
DATA SHEET
TDA4884
Three gain control video
pre-amplifier for OSD
Product specification
Supersedes data of June 1994
File under Integrated Circuits, IC02
1997 Nov 26
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
CONTENTS
1
FEATURES
2
GENERAL DESCRIPTION
3
QUICK REFERENCE DATA
4
ORDERING INFORMATION
5
BLOCK DIAGRAM
6
PINNING
7
FUNCTIONAL DESCRIPTION
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
Contrast control
Output stages
Input clamping
Vertical blanking
Horizontal blanking
Cut-off and black-level stabilization
On screen display
Test mode
8
LIMITING VALUES
9
THERMAL CHARACTERISTICS
10
CHARACTERISTICS
11
APPLICATION AND TEST INFORMATION
11.1
Recommendations for building the application board
12
INTERNAL PIN CONFIGURATION
13
PACKAGE OUTLINE
14
SOLDERING
14.1
14.2
14.3
Introduction
Soldering by dipping or by wave
Repairing soldered joints
15
DEFINITIONS
16
LIFE SUPPORT APPLICATIONS
1997 Nov 26
2
TDA4884
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
1
FEATURES
2
• 85 MHz video controller
TDA4884
GENERAL DESCRIPTION
The TDA4884 is an RGB pre-amplifier for colour monitor
systems with SVGA performance, intended for DC or AC
coupling of the colour signals to the cathodes of the CRT.
• Fully DC controllable
• 3 separate video channels
With special advantages the circuit can be used in
conjunction with the TDA485x monitor deflection IC family.
• Input black-level clamping
• White level adjustment for 3 channels
• Contrast control for all 3 channels simultaneously
• Cathode feedback to internal reference for cut-off
control, which allows unstabilized video supply voltage
• Current outputs for RGB signal currents
• RGB voltage outputs to external peaking circuits
• Blanking and switch-off input for screen protection
• Sync on green operation possible
• On Screen Display (OSD) facility.
3
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VP
positive supply voltage
7.2
8.0
8.8
V
IP
supply current
36
48
60
mA
Vi(b-w)
input voltage (black-to-white; pins 2, 5
and 8)
−
0.7
1.0
V
Vo(b-w)
output voltage (black-to-white; pins 19,
16 and 13)
−
0.79
−
V
Io(b-w)
output current (black-to-white; pins 20,
17 and 14)
−
50
−
mA
with peaking
−
−
100
mA
B
bandwidth
−3 dB
70
85
−
MHz
Gnom
nominal gain (pins 2, 5 and 8 to pins 19,
16 and 13)
nominal contrast; pins 3,
1 and 11 open-circuit
−
1
−
dB
∆G
gain control difference for all channels
relative to Gnom
−5
−
+2.6
dB
CRcontrast
contrast control
Vi(CC) = 1 to 6 V
−22
−
+3.4
dB
COSD(min)
minimum contrast for OSD
Vi(CC) = 0.7 V
−
−40
−
dB
Tamb
operating ambient temperature
−20
−
+70
°C
4
nominal contrast; pins 3,
1 and 11 open-circuit
ORDERING INFORMATION
TYPE
NUMBER
TDA4884
1997 Nov 26
PACKAGE
NAME
DIP20
DESCRIPTION
plastic dual in-line package; 20 leads (300 mil)
3
VERSION
SOT146-1
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
5
TDA4884
BLOCK DIAGRAM
handbook, full pagewidth
6.2 V
VP = 8 V
VP
1
10 kΩ
gain
control
signal
input
22 nF
75 Ω
10 MΩ
VOLTAGE
CONVERTER
TDA4884
20
2
1.5 kΩ
current
output
VCRT = 75 V
CLAMP
CLIPPING
BAV21
19
voltage
output
33 Ω
220 Ω
33 Ω
BFQ235
VP
8V
68 kΩ
3
10 kΩ
gain
control
VOLTAGE
CONVERTER
18 feedback
CHANNEL 1
10 kΩ
cut-off
control
15 kΩ
6.8 kΩ
4
1.5 kΩ
VCRT = 75 V
current
17 output
signal
input
22 nF
75 Ω
10 MΩ
5
BAV21
CLAMP
CLIPPING
10 Ω
1 kΩ
voltage
16 output
220 Ω
CRT
8V
68 kΩ
33 Ω
10 kΩ
REF
GAIN
15 kΩ
BFQ256
CHANNEL 2
VP
10 kΩ
40 MHz
BFQ235
10 Ω
33 Ω
25 MHz
BFQ236
cut-off
control
6.8 kΩ
60 MHz
15 feedback
6
VOLTAGE
CONVERTER
7
+
contrast
control
VP
860 Ω
VCRT = 65 V
current
14 output
signal
input
22 nF
75 Ω
10 MΩ
8
BFQ236
CLAMP
CLIPPING
BAV21
10 Ω
voltage
13 output
18 Ω
BFQ235
18 Ω
47 nF
1 kΩ
100 Ω
10 Ω
VCRT2 = 65 V
9
horizontal blanking
switch off
VOLTAGE
CONVERTER
input
clamping
93
kΩ
BFQ256
12 feedback
CHANNEL 3
10 kΩ
cut-off
control
10 kΩ
test mode
ultra black
output clamping
blanking
MHA917
10
clamping pulse
vertical blanking
test mode
VP
5.8 V
PULSE
DECODER
11
10 kΩ
gain
control
Fig.1 Block diagram and basic application circuit for DC and AC coupling.
1997 Nov 26
4
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
6
TDA4884
PINNING
SYMBOL
PIN
DESCRIPTION
GC2
1
gain control channel 2
VIN1
2
signal input channel 1
GC1
3
gain control channel 1
GND
4
ground
VIN2
5
signal input channel 2
CC
6
contrast control, OSD switch
VP
7
supply voltage
VIN3
8
HBL
9
CL
handbook, halfpage
GC2 1
20 IOUT1
VIN1 2
19 VOUT1
GC1 3
18 FB1
signal input channel 3
GND 4
17 IOUT2
horizontal blanking, switch-off
VIN2 5
10
input clamping, vertical blanking,
test mode
GC3
11
gain control channel 3
FB3
12
feedback channel 3
VOUT3
13
IOUT3
16 VOUT2
TDA4884
CC 6
15 FB2
VP 7
14 IOUT3
VIN3 8
13 VOUT3
voltage output channel 3
HBL 9
12 FB3
14
current output channel 3
CL 10
11 GC3
FB2
15
feedback channel 2
VOUT2
16
voltage output channel 2
IOUT2
17
current output channel 2
FB1
18
feedback channel 1
VOUT1
19
voltage output channel 1
IOUT1
20
current output channel 1
7
MHA918
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
7.2
The RGB input signals 0.7 V (p-p) are capacitively coupled
into the TDA4884 (pins 2, 5 and 8) from a low ohmic
source and are clamped to an internal DC voltage (artificial
black level). Composite signals will not disturb normal
operations because an internal clipping circuit cuts all
signal parts below black level. All channels have a
maximum total voltage gain of 7 dB (maximum contrast
and maximum individual channel gain). With the nominal
channel gain of 1 dB and nominal contrast setting the
nominal black-to-white output amplitude is 0.79 V (p-p).
Each output stage provides a current output (pins 20, 17
and 14) and a voltage output (pins 19, 16 and 13). External
cascode transistors reduce power consumption of the IC
and prevent breakdown of the output transistors. Signal
output currents and peaking characteristics are
determined by external components at the voltage outputs
and the video supply. The channels have separate internal
feedback loops which ensure large signal linearity and
marginal signal distortion irrespective of output transistor
thermal VBE variation.
DC voltages are used for contrast and gain control.
7.1
7.3
Input clamping
The clamping pulse (pin 10) is used for input clamping
only. The input signals have to be at black level during the
clamping pulse and are clamped to an internal artificial
black level. The coupling capacitors are used in this way
for black-level storage. Because the threshold for the
clamping pulse is higher than that for vertical blanking
(pin 10) the rise and fall times of the clamping pulse need
Contrast control
Contrast control is achieved by a voltage at pin 6 and
affects the three channels simultaneously. To provide the
correct white point, an individual gain control (pins 3, 1 and
11) adjusts the signals of channels 1, 2 and 3.
1997 Nov 26
Output stages
5
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
to be faster than 75 ns/V during transition from
1 to 3.5 V.
7.4
7.6
Cut-off and black-level stabilization
For cut-off stabilization (DC coupling to the CRT) and
black-level stabilization (AC coupling) the video signal at
the cathode or the coupling capacitor is divided by an
adjustable voltage divider and fed to the feedback inputs
(pins 18, 15 and 12). During horizontal blanking time this
signal is compared with an internal DC voltage of
approximately 5.8 V. Any difference will lead to a
reference black-level correction by charging or discharging
the integrated capacitor which stores the reference
black-level information between the horizontal blanking
pulses.
Vertical blanking
The vertical blanking pulse will be detected if the input
voltage (pin 10) is higher than the threshold voltage for
approximately 320 ns but does not exceed the threshold
for the clamping pulse in the time between. During the
vertical blanking pulse the input clamping is disabled to
avoid misclamping in the event of composite input signals.
The input signal is blanked and the artificial black level is
inserted instead, thus the output signal is at reference
black level. The DC value of the reference black level will
be adjusted by cut-off stabilization (see below).
7.5
TDA4884
7.7
On screen display
For OSD fast switching of control pin 6 to less than 1 V
(e.g. 0.7 V) blanks the input signals. The OSD signals can
easily be inserted to the external cascode transistor
(see Fig.3).
Horizontal blanking
During horizontal blanking (pin 9) the output signal is set to
reference black level and output clamping is activated. If
the voltage at pin 9 exceeds the switch-off threshold, the
signal is blanked and switched to ultra-black level for
screen protection and spot suppression during V-flyback.
Ultra-black level is the lowest possible output voltage (at
voltage outputs) and is not dependent on cut-off
stabilization.
7.8
Test mode
During test mode (pins 9 and 10 connected to VP) the
black levels at the voltage outputs (pins 19, 16 and 13) are
set internally to typical 0.5 V, 3 V DC at signal inputs
(pins 2, 5 and 8).
handbook, full pagewidth
20
channel 1
17
channel 2
TDA4884
contrast
BFQ235
6
14
current
output
100 pF
channel 3
PH2222
OSD
fast blanking
1 kΩ
4.7 kΩ
220 Ω
OSD
signal input
PH2222
150 Ω
depending on
channel gain
1 kΩ to 10 kΩ
MHA919
Fig.3 OSD application.
1997 Nov 26
6
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
8 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
Vext
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
external DC voltage applied to the following pins:
pin 7 (supply voltage)
0
8.8
V
pins 2, 5 and 8 (signal input)
−0.1
VP
V
pins 20, 17 and 14 (current outputs)
−0.1
VP
V
pins 1, 3, 6 and 11 (gain and contrast control)
−0.1
VP
V
pin 9 (horizontal blanking input)
−0.1
VP + 0.7
V
pin 10 (input clamping input)
−0.1
VP + 0.7
V
Io(av)
average output current (pins 20, 17 and 14)
0
50
mA
IOM
peak output current (pins 20, 17 and 14)
0
100
mA
Ptot
total power dissipation
−
1200
mW
Tstg
storage temperature
−25
+150
°C
Tamb
operating ambient temperature
−20
+70
°C
Tj
junction temperature
−25
+150
°C
VESD
electrostatic handling for all pins
−500
+500
V
note 1
note 2
Notes
1. Signal amplitude of 50 mA black-to-white is possible if the average current (including blanking times and signal
variation against time) does not exceed 50 mA. The maximum power dissipation of 1200 mW has to be considered.
2. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
9
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
1997 Nov 26
PARAMETER
CONDITIONS
thermal resistance from junction to ambient
7
in free air
VALUE
UNIT
65
K/W
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
10 CHARACTERISTICS
VP = 8.0 V; Tamb = 25 °C; all voltages measured with respect to GND (pin 4); unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VP
supply voltage (pin 7)
7.2
8.0
8.8
V
IP
supply current (pin 7)
36
48
60
mA
−
0.7
1.0
V
V
Video signal inputs (pins 2, 5 and 8)
Vi(b-w)
input voltage (black-to-white
value; pins 2, 5 and 8)
VI(clamp)
DC voltage during input clamping
(artificial black + VBE)
note 1
2.8
3.1
3.4
II
DC input current
no clamping; VI = VI(clamp);
Tamb = −20 to +70 °C
−0.05
+0.05
+0.250 µA
during clamping;
VI = VI(clamp) + 0.7 V
50
75
120
µA
during clamping;
VI = VI(clamp) − 0.7 V
−50
−75
−120
µA
Contrast control (pin 6); note 2
Vi(CC)
input voltage
1.0
−
6.0
V
Vi(CC)(max)
maximum input voltage
−
−
VP − 1
V
Vi(CC)(nom)
input voltage for nominal contrast
note 3
−
4.3
−
V
Ii(CC)
input current
Vi(CC) = 4.3 V
−5
−1
−0.1
µA
COSD(min)
minimum contrast for OSD
Vi(CC) = 0.7 V
−
−40
−
dB
C
------------C nom
contrast relative to nominal
contrast
Vi(CC) = 6.0 V; pins 3, 1 and
11 open-circuit
2.4
3.4
−
dB
Vi(CC) = 1.0 V; pins 3, 1 and
11 open-circuit
−26
−22
−19
dB
0.7
−
V
Vi(CC)(min)
input voltage for minimum contrast pins 3, 1 and 11 open-circuit −
∆Gtrack
tracking of output signals of
channels 1, 2 and 3
1 V < Vi(CC) < 6 V; note 4
−
0
0.5
dB
tdf(C)
delay between leading (falling)
edges of contrast voltage and
voltage output waveforms
Vi(CC) = 4.3 V to 0.7 V; input
fall time at pin 6:
tf(CC) = 2 ns; note 5; Fig.7
−
7
20
ns
tdr(C)
delay between trailing edges
(rising) of contrast voltage and
voltage output waveforms
Vi(CC) = 0.7 V to 4.3 V; input
rise time at pin 6:
tr(CC) = 2 ns; note 5; Fig.7
−
15
25
ns
tf(C)
fall time of voltage output
waveform
90% to 10% amplitude;
input fall time at pin 6:
tf(CC) = 2 ns; note 5; Fig.7
−
6
15
ns
tr(C)
rise time of voltage output
waveform
10% to 90% amplitude;
input rise time at pin 6:
tr(CC) = 2 ns; note 5; Fig.7
−
6
15
ns
1997 Nov 26
8
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
SYMBOL
PARAMETER
TDA4884
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Gain control (pins 3, 1 and 11); note 6
Vi(GC)
input voltage
Vi(GC)(nom)
input voltage for nominal gain
Ri(GC)
input resistance
∆G
gain control difference relative to
nominal gain
1.0
pins 3, 1 and 11 open-circuit 3.6
44
−
6.0
V
3.75
3.95
V
55
66
kΩ
Vi(CC) = 4.3 V; Vi(GC) = 6 V
2
2.6
3.3
dB
Vi(CC) = 4.3 V; Vi(GC) = 1 V
−5.5
−5
−4.5
dB
Feedback input (pins 18, 15 and 12); note 7
Vref(int)
internal reference voltage
5.6
5.8
6.1
V
IO(FB)(max)
maximum output current
during output clamping;
Vi(FB) = 3 V
−500
−100
−60
nA
∆Vbl(CRT)
black-level variation at CRT
note 8
0
40
200
mV
∆Vref(T)
variation of Vref(int) in the
temperature range
Tamb = −20 to +70 °C
0
20
50
mV
∆Vref(VP)
variation of Vref(int) with supply
voltage
7.2 V ≤ VP ≤ 8.8 V
0
60
100
mV
Voltage outputs (pins 19, 16 and 13); note 1
Vo(b-w)(nom)
nominal signal output voltage
(black-to-white value)
pins 3, 1 and 11
open-circuit; Vi(CC) = 4.3 V;
Vi(b-w) = 0.7 V
0.69
0.79
0.89
V
Vblx(max)
maximum adjustable black-level
voltage
during output clamping;
Tamb = −20 to +70 °C
1
1.2
1.4
V
Vbl(SO)
black-level voltage during
switch-off, equal to minimum
adjustable black-level voltage
Vi(HBL) = VP; RO = 33 Ω;
Tamb = −20 to +70 °C
30
45
100
mV
Vbl(TST)
black-level voltage during test
mode
Vi(HBL) = VP; Vi(CL) = VP;
pin 1 open-circuit;
Vi = VI(clamp); note 9
0.3
0.7
1.2
V
Gnom
nominal gain (pins 2, 5 and 8 to
pins 19, 16 and 13)
nominal contrast; pins 3, 1
and 11 open-circuit
−
1
−
dB
B
bandwidth
−3 dB
70
85
−
MHz
S/N
signal-to-noise ratio
note 10
−
50
44
dB
dO(th)
output thermal distortion
Io(b-w) = 50 mA; note 11
−
0.6
1
%
∆Vbl(fl)
black-level variation between
clamping pulses
line frequency = 30 kHz
−
0.5
4.5
mV
Voffset(max)
maximum offset during sync
clipping
Vi < VI(clamp); note 12
0
7
15
mV
∆Vo(b-w)(T)
variation of nominal output signal
(black-to-white value) with
temperature
pins 3, 1 and 11
open-circuit; Vi(CC) = 4.3 V;
Vi(b-w) = 0.7 V;
Tamb = −20 to +70 °C
0
2.5
10
%
1997 Nov 26
9
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
SYMBOL
PARAMETER
TDA4884
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Current outputs (pins 20, 17 and 14); note 13
Io(b-w)
output current (black-to-white
value)
−
50
−
mA
with peaking
−
−
100
mA
V20-19;
V17-16; V14-13
start of HF-saturation voltage of
output transistors
Io = 50 mA
−
−
2.0
V
Io = 100 mA
−
−
2.2
V
Ibl(SO)
output current during switch-off
Vi(HBL) = VP; RO = 33 Ω
0
20
900
µA
Frequency response at voltage outputs; note 14
∆G(f)
gain decrease by frequency
response at pins 19, 16 and 13
70 MHz; single channel
−
1.3
3
dB
tr(O)
rise time at voltage output (pins 19, 10% to 90% amplitude;
16 and 13)
input rise time = 1 ns
−
4.1
5.0
ns
dVO
overshoot of output signal pulse
related to actual output pulse
amplitude
−
4
8
%
−
−
−20
dB
single channel;
input rise time = 2.5 ns;
Vi(b-w) = 0.7 V;
Vi(CC) = 4.3 V; pins 3, 1
and 11 open-circuit
Crosstalk at voltage outputs with speed up circuit; note 15
αcr(tr)
transient crosstalk
Threshold voltages for clamping, blanking and switch-off (pins 9 and 10); note 16
Vi(HBL)
input voltage at pin HBL
threshold for horizontal blanking
(blanking, output clamping)
1.2
1.4
1.6
V
threshold for switch-off (blanking,
minimum black level, no output
clamping)
5.8
6.5
6.8
V
against ground
50
80
110
kΩ
threshold for vertical blanking
(blanking, no input clamping)
note 17
1.2
1.4
1.6
V
threshold for clamping (input
clamping, no blanking)
note 17
2.6
3.0
3.5
V
threshold for test mode (no
clamping, no blanking, for
Vbl(TST) see above)
for test mode also
Vi(HBL) > 6.8 V (switch-off)
VP − 1
−
VP
V
Ri(HBL)
input resistance
Vi(CL)
input voltage at pin CL
Ii(CL)
current
Vi(CL) < VP − 1 V
−3
−1
−
µA
Vi(CL) ≥ VP − 1 V
−
100
−
µA
ns/V
tr(CL)
rise time for clamping pulse
note 17
−
−
75
tf(CL)
fall time for clamping pulse
note 17
−
−
75
ns/V
tw(clamp)
width of clamping pulse
0.6
−
−
µs
1997 Nov 26
10
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
Notes to the characteristics
1. Definition of levels:
a) Artificial black level: internal signal level behind input emitter follower during input clamping and signal clipping.
This level is inserted instead of the input signal during blanking.
b) Reference black level: DC voltage during output clamping at voltage outputs, not influenced by contrast or gain
setting, adjustable by cut-off stabilization.
c) Cut-off level: corresponding DC voltage at CRT cathode in closed feedback loop.
d) Black level: actual signal black level at either voltage outputs or cathode. At voltage outputs the black level is
equal to reference black level because there is no brightness control via TDA4884. At cathode the black level is
equal to cut-off level. Brightness can be adjusted via grid 1.
e) Ultra-black level, switch-off level: lowest adjustable reference black level, lowest signal level at voltage outputs.
f) The minimum guaranteed control range for reference black level is 0.1 to 1 V.
The ultra-black level is dependant on the external resistor RO at pins 13, 16 and 19 (voltage outputs) to ground.
RO
g) V bl ( SO ) ≈ -------------------------------- × 4.65 V
3.5 kΩ + R O
h) Signal processing see Fig.4.
2. Linear control range is 1 to 6 V for Vi(CC), independent of supply voltage. Open pin 6 leads to absolute maximum
contrast setting. It is recommended not to exceed Vi(CC) = VP − 1 V to avoid saturation of internal circuitry. For
Vi(CC) < Vi(CC)(min) ≈ 0.7 V a small negative signal (≈ −40 dB) will appear. For frequency dependency of contrast
control see note 14. Typical contrast characteristic see Fig.5.
3. Definition for nominal output signals: input Vi(b-w) = 0.7 V, gain pins 3, 1 and 11 open-circuit, contrast control
Vi(CC) = Vi(CC)(nom).
4.
 A 1 A 20 
 A 1 A 30 
 A 2 A 30  

∆G track = 20 × maximum of  log  --------- × ---------  ; log  --------- × ---------  ; log  --------- × ---------   dB
A
A
A
A
 10
 10
 A 20 A 3  

2
3
Ax: signal output amplitude in channel x at any contrast setting between 1 and 6 V.
Ax0: signal output amplitude in channel x at nominal contrast and same gain setting.
5. Typical step in contrast voltage and response at signal outputs for nominal input signal Vi(b-w) = 0.7 V. Typical OSD
fast blanking input/output see Fig.7.
6. Linear control range is 1 to 6 V for Vi(GC), independent of supply voltage. Typical gain characteristic see Fig.6.
7. The internal reference voltage can be measured at pins 18, 15 and 12 during output clamping (Vi(HBL) = 2 V) in closed
feedback loop. Typical variation of Vref(int) with temperature and power supply voltage see Fig.8.
8. Slow variations of video supply voltage VCRT (see Fig.1) will be suppressed at CRT cathode by cut-off stabilization.
Change of VCRT by 5 V leads to specified change of cut-off voltage.
9. The test mode allows testing without input and output clamping pulses. The signal inputs (pins 2, 5 and 8) have to
be biased via resistors to the previously measured clamp voltages of approximately 3 V (artificial black level + VBE).
Signal blanking is not possible during test mode.
10. The signal-to-noise ratio is calculated by the formula (frequency range 1 to 70 MHz):
peak-to-peak value of the nominal signal output voltage
S
---- = 20 × log --------------------------------------------------------------------------------------------------------------------------------------------------- dB
RMS value of the noise output voltage
N
11. Large output swing e.g. Io(b-w) = 50 mA leeds to signal depending power dissipation in output transistors.
Thermal VBE variation is compensated.
12. Composite signals will not disturb normal operations because an internal clipping circuit cuts all signal parts below
black level. Typical sync clipping see Fig.10.
1997 Nov 26
11
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
1
1
13. The output current approximately follows the equation I o = V o  -------- + ------------------  – 500 µA for Vo > Vbl(SO) and with
 R O 2.2 kΩ 
RO = external resistor at voltage output to ground.
The external RC combination at pins 19, 16 and 13 (see Fig.1) enables peak currents during transients.
14. Frequency response, crosstalk and pulse response have been measured at voltage outputs in a special
printed-circuit board with 50 Ω line in/out connections and without peaking (see Chapter “Application and test
information”). Typical frequency response see Fig.9, typical pulse response see Fig.11 and typical characteristic of
contrast control as a function of frequency see Fig.12.
15. Crosstalk between any two output pins (e.g. channels 1 and 2):
a) Input conditions: one channel (channel 1) with nominal input signal and minimum rise time. The inputs of the
other channels capacitively coupled to ground (channels 2 and 3). Gain pins 3, 1 and 11 open-circuit.
b) Output conditions: output signal of channel 1 is set by contrast control voltage (pin 6) to
Vo(b-w) = Vo(VOUT1) = 0.7 V, the rise time should be 5 ns. Output signal of channel 2 then is Vo(b-w) = Vo(VOUT2).
V o(VOUT2)
c) Transient crosstalk: α cr ( tr ) = 20 × log ------------------------ dB
V o(VOUT1)
d) Crosstalk as a function of frequency has been measured without peaking circuit, with nominal input signal and
nominal settings. Typical frequency dependent crosstalk between channels see Figs 13, 14 and 15.
16. The internal threshold voltages are derived from a stabilized voltage. The internal pulses are generated while the
input pulses are higher than the thresholds. Voltages less than −0.1 V at pins 9 and 10 can influence black-level
control and should be avoided.
17. For 75 ns/V < tr(CL), tf(CL) < 240 ns/V, generation of internal input clamping and blanking pulse is not defined.
Pulses not exceeding the threshold of input clamping (typical 3 V) will be detected as blanking pulse. Timing of pulses
at pin 10 see Fig.16.
1997 Nov 26
12
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
video signal
input signals
handbook, full pagewidth
black level equal to
artificial black level + VBE
by input clamping (approximately 3 V)
input signal at
pins 2, 5 and 8
with sync (on green)
input clamping pulse
at pin 10
horizontal blanking and
output clamping pulse
at pin 9
horizontal flyback and output clamping
video portion
black level equal to artificial
black level by input clamping and
storage by coupling capacitor
internal signal
behind input stage
sync clipping to
artificial black level
inserted artificial black level
output signals
(pins 19, 16 and 13)
max
at nominal gain and
maximum brightness setting
and
maximum/nominal/
minimum contrast setting
nom
min
reference black level
max
nom
at nominal contrast and
maximum/nominal/
minimum gain setting
min
reference black level
ultra black level
ground
signal at CRT cathode
high tension supply
voltage (e.g. 90 V)
black level
at nominal gain and
contrast setting
(brightness setting as well as
horizontal blanking via grid 1)
MHA920
Fig.4 Signal processing.
1997 Nov 26
13
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
MHA819
1400
MHA821
1200
handbook, halfpage
4
signal
amplitude
(mV)
handbook, halfpage
(dB)
3
2
1000
800
1
0
−1
600
−3
3
(dB)
signal
amplitude
(mV)
2
800
0
400
−2
−3
−4
−5
−6
1
−1
−5
400
−10
200
−8
−20
−40
0
−200
TDA4884
0
0
0.7
2
4
4.3
6
8
0
Fig.5 Typical contrast characteristic.
handbook, full pagewidth
2
4
3.75
Vi(CC) (V)
OSD pulse
at pin 6
(V)
tf(CC)
tr(CC)
90%
50%
10%
0.7
t
tdf(C)
tdr(C)
Vbl + Vo(b-w) = 1.5
90%
Vo(b-w)
50%
10%
Vbl = 0.7
t
tf(C)
tr(C)
MHA820
Fig.7 Typical OSD fast blanking input/output waveforms.
1997 Nov 26
8
Vi(GC) (V)
Fig.6 Typical gain characteristic.
4.3
output signal
at pins 19, 16 and 13
(V)
6
14
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
MHA822
5.85
handbook, halfpage
5.84
Vref(int)
(V) 5.83
VP = 8.8 V
5.82
5.81
8.0 V
5.80
5.79
5.78
7.2 V
5.77
5.76
5.75
−20
0
20
40
60
80
100
Tamb (°C)
Conditions: 0.5 V reference black level, no signal.
Fig.8 Typical variation of Vref(int) with temperature and supply voltage.
MHA824
3
handbook, full pagewidth
signal
(dB)
0
−3
−6
−9
−12
−15
1
102
10
Solid line: single channel.
Dotted line: white signal.
Fig.9 Typical frequency response.
1997 Nov 26
15
f (MHz)
103
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
handbook, full pagewidth
input
signal
output
signal
Voffset(max)
MHA823
Fig.10 Typical sync clipping.
MHA825
800
handbook, full pagewidth
input pulse
(mV)
90%
600
400
tr ≈ 2.5 ns
tf ≈ 2.5 ns
200
10%
0
1000
output pulse
(mV)
800
90%
600
400
tf ≈ 4.8 ns
tr ≈ 4.4 ns
200
10%
0
−200
Solid line: single channel.
Dotted line: white pattern.
0
20
40
60
Fig.11 Typical pulse responses.
1997 Nov 26
16
80
t (ns)
100
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
MHA826
10
handbook, full pagewidth
Vi(CC) =
7V
signal
(dB)
6V
5V
0
4V
3V
2V
−10
Vi(CC) = 0.7 V
−20
1V
−30
Vi(CC) = 0.7 V
1
10
70
102 120
f (MHz)
103
Solid lines: single channel.
Dotted lines: white signal.
Fig.12 Typical characteristic of contrast control as a function of frequency.
MHA926
handbook, full pagewidth
0
signal
(dB)
(1)
−10
−20
(2)
(3)
−30
−40
1
102
10
(1) Channel 1.
(2) Channel 2.
(3) Channel 3.
Fig.13 Typical crosstalk: channel 1→ 2 and 3.
1997 Nov 26
17
f (MHz)
103
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
MHA925
handbook, full pagewidth
0
signal
(dB)
(1)
−10
−20
(2)
−30
(3)
−40
1
102
10
f (MHz)
103
(1) Channel 2.
(2) Channel 3.
(3) Channel 1.
Fig.14 Typical crosstalk: channel 2 → 1 and 3.
MHA924
handbook, full pagewidth
0
signal
(dB)
(1)
−10
−20
(2)
−30
(3)
−40
1
102
10
(1) Channel 3.
(2) Channel 1.
(3) Channel 2.
Fig.15 Typical crosstalk: channel 3 → 1 and 2.
1997 Nov 26
18
f (MHz)
103
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
handbook, full pagewidth
3V
Vi(CL)
1.4 V
internal pulses
input
clamping
tr(CL)
t
>240 ns/V
tf(CL)
no
clamping
≈ 1/2 td(Vblank)
no
clamping
t
td(Vblank)
blanking
t
MHA916
Fig.16 Timing of pulses at pin 10.
1997 Nov 26
19
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
DC control for contrast and gain is provided at connectors
P21 and P22. Contrast control can also be set by the
potentiometer R28 (jumper J11). The series resistor R11 is
necessary if fast OSD switching is activated via 50 Ω line
(P10), a line termination can be provided at the connector
P9. Clamping and blanking pulses are fed to the IC via
connectors P7 and P8. Connector P23 is used for power
supply. The capacitors C7 and C8 should be located as
near as possible to the IC pins.
11 APPLICATION AND TEST INFORMATION
For high frequency measurements and special application,
a printed-circuit board with only a few external
components is built. Figure 17 shows the application
circuit and Fig.18 the layout of the double sided printed
board. All components on the underside and R13, R14 and
R15 on the top are SMD types. Short HF loops and
minimum crosstalk between the channels as well as input
and output are achieved by properly shaped ground areas
star connected to the IC ground pin.
11.1
The HF input signal can be fed to the subclick connectors
P1, P2 and P3 by a 50 Ω line. The line is then terminated
by a 51 Ω resistor on the board. With choice of jumper
connections (J1, J2 and J3) it is possible to connect
channel inputs to its input connector, to connect all
channels to one input connector (white pattern) and to
ground each input via the coupling capacitor.
Recommendations for building the application
board
• General
– Double-sided board
– Short HF loops by large ground plane on the rear.
• Voltage outputs
– Capacitive loads as small as possible
For operation without input clamping (e.g. test mode) the
DC bias can be provided by VIDC (connector P21) if a
short-circuit at J4, J5 and J6 is made (solder short or
low-value SMD resistor).
– Short interconnection via resistor to ground.
• Supply voltage
– Capacitors as near as possible to the pins
The output signal can be monitored via 50 Ω terminated
lines at the voltage outputs (subclick connectors
P4, P5 and P6). With 100 Ω in parallel to the 50 Ω
terminated line the effective load resistance at the voltage
outputs is 33 Ω. The mismatch seen from the line towards
the IC has no significant effect if the line is match
terminated. A peaking circuit (C15, R16 for channel 1,
C16, R17 for channel 2 and C17, R18 for channel 3) can
be added for realistic loading of the voltage outputs.
– Use of high-frequency capacitors (low self
inductance, e.g. SMD).
• Current outputs, emitter of cascode transistors
The external interconnection inductance can build a
resonance together with the internal substrate
capacitance. A damping resistor of 10 to 30 Ω near to
the IC pin can suppress such oscillations.
Black-level adjustment is made by VIOS, VFBX (external
voltages at connector P21) and resistors R19, R22 and
R25 for channel 1 (channel 2: R20, R23 and R26;
channel 3: R21, R24 and R27). If R19 is equal to the
effective load resistor at the voltage output the reference
black level (Vref(bl)) is approximately:
R22
V ref(bl) = VIOS – V ref(int) – ( V ref(int) – VFBX ) × ----------R25
Vref(int) is the internal reference voltage at the feedback
input (typical 5.8 V). By this it is possible to adjust the
reference black level and the voltage at the current outputs
independently.
1997 Nov 26
20
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
subclick connector (50 Ω)
handbook, full pagewidth
solder point for short-circuiting
or SMD 0 Ω resistor
jumper
connector
GC2
GND
(sense)
GC1
VIDC
VFBX
VIOS
P21
C30
220 µF
(25 V)
R7
C29
2.2 µF
C28
100 nF
C27
22 nF
(multi-layer)
110 Ω
C4
100 nF
IC1
GC2
R19
IOUT1
1
20
33 Ω
C5
22 nF
Vi(b-w)
J1
C1
22 nF
VIN1
P1
C15
47 pF
R4
5.1 kΩ
GC1
C12
22
nF
J2
C2
22 nF
VIN2
P2
18
CC
C13
22 nF
C3
22 nF
P3
4
17
C18
22 nF
R20
IOUT2
33 Ω
C22
22 nF
16
C16
47 pF
6
15
R17
R14
100
Ω
R23
3 kΩ
33 Ω
FB2
R26
14
7
C19
22 nF
R21
IOUT3
33 Ω
C7
1 nF
VIN3
HBL
C14
22
nF
C23
22 nF
C26
100 nF
P6
VOUT3
13
8
C17
47 pF
R6
5.1
kΩ
C25
100 nF
P5
VOUT2
5
J6
R3
51 Ω
R25
9.1 kΩ
VP
J3
R22
3 kΩ
9.1 kΩ
TDA4884
R5
5.1 kΩ
C8
100
nF
R13
100
Ω
33 Ω
FB1
J5
R2
51
Ω
Vi(b-w)
3
R16
C6
22 nF
GND
Vi(b-w)
19
J4
R1
51
Ω
C24
100
nF
P4
VOUT1
2
C21
22
nF
12
9
R18
R15
100
Ω
R24
3 kΩ
33 Ω
FB3
R27
9.1 kΩ
C20
22 nF
P22
CL
GC3
GC3
11
10
C11
22 nF
CC
C10
100 nF
R8
1 kΩ
R9
1 kΩ
C31
10 µF
R10
1 kΩ
L1
100 µH
C9
100 nF
R12
R11
J10
J11
1 kΩ
P7
P23
HBL
P9
P8
CL
GND
(power)
VP
VP (sense)
GND (sense)
P10
OSD
MHA921
Fig.17 Application circuit for test PCB.
1997 Nov 26
1 kΩ
R28
10 kΩ
21
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
handbook, full pagewidth
C30
C29
P22
R28
J11
J10
P4
P5
P6
P10
R13
R15
R14
P9
C31
IC1
L1
P23
R7
P21
P8
J1
J2
J3
P1
P2
P3
P7
R1
R2
R3
R4 C12
C1
R8
R5 C14 R6
C2
C3
C13
J4
J5
C4
C5
C6
R22
C8
R23
J6
C7
R24
R19 C15 R25 R20 C16 R26 R21
C24
C22
C18
C9
C11
C25
R27
C23
C19
C26
R10
C17
R18
R17
R16
C21
R9
C20
R11
R12
C28
C27
C10
MHA833
Fig.18 Double sided test PCB layout.
1997 Nov 26
22
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
12 INTERNAL PIN CONFIGURATION
handbook, full pagewidth
20
19
18
17
16
15
CL
14
CL
13
12
11
CL
TDA4884
CL
CL
CL
+
1
2
3
4
5
6
7
8
+
pin
10
MHA922
diode protection
on all pins except
pins 4 and 7
pin
zener diode protection
at pin 7
Fig.19 Internal pin configuration.
1997 Nov 26
9
23
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
TDA4884
13 PACKAGE OUTLINE
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
b1
w M
(e 1)
b
MH
11
20
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
mm
4.2
0.51
3.2
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
inches
0.17
0.020
0.13
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
D
e
e1
L
ME
MH
w
Z (1)
max.
6.40
6.22
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
2.0
0.25
0.24
0.10
0.30
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.078
(1)
E
(1)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT146-1
1997 Nov 26
REFERENCES
IEC
JEDEC
EIAJ
SC603
24
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17
95-05-24
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for OSD
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
14 SOLDERING
14.1
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
14.3
Repairing soldered joints
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
14.2
TDA4884
Soldering by dipping or by wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
15 DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
16 LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Nov 26
25
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for
OSD
NOTES
1997 Nov 26
26
TDA4884
Philips Semiconductors
Product specification
Three gain control video pre-amplifier for
OSD
NOTES
1997 Nov 26
27
TDA4884
Philips Semiconductors – a worldwide company
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Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1997
SCA56
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
547047/1200/03/pp28
Date of release: 1997 Nov 26
Document order number:
9397 750 02292