PHILIPS TDA4882

INTEGRATED CIRCUITS
DATA SHEET
TDA4882
Advanced monitor video controller
for OSD
Product specification
Supersedes data of December 1994
File under Integrated Circuits, IC02
1997 Sep 04
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
CONTENTS
1
FEATURES
2
GENERAL DESCRIPTION
3
QUICK REFERENCE DATA
4
ORDERING INFORMATION
5
BLOCK DIAGRAM
6
PINNING
7
FUNCTIONAL DESCRIPTION
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
General
Brightness control
Contrast control
Output stages
Input clamping
Vertical blanking
Horizontal blanking
Cut-off and black-level stabilization
On Screen Display
Test mode
8
LIMITING VALUES
9
THERMAL CHARACTERISTICS
10
CHARACTERISTICS
11
APPLICATION AND TEST INFORMATION
11.1
Recommendations for building the application
board
12
INTERNAL PIN CONFIGURATION
13
PACKAGE OUTLINE
14
SOLDERING
14.1
14.2
14.3
Introduction
Soldering by dipping or by wave
Repairing soldered joints
15
DEFINITIONS
16
LIFE SUPPORT APPLICATIONS
1997 Sep 04
2
TDA4882
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
1
FEATURES
2
• 85 MHz video controller
TDA4882
GENERAL DESCRIPTION
The TDA4882 is an RGB pre-amplifier for colour monitor
systems with SVGA performance, intended for DC or AC
coupling of the colour signals to the cathodes of the CRT.
• Fully DC controllable
• 3 separate video channels
With special advantages the circuit can be used in
conjunction with the TDA485x monitor deflection IC family.
• Input black-level clamping
• White level adjustment for 2 channels only
• Brightness control with correct grey scale tracking
• Contrast control for all 3 channels simultaneously
• Cathode feedback to internal reference for cut-off
control, which allows unstabilized video supply voltage
• Current outputs for RGB signal currents
• RGB voltage outputs to external peaking circuits
• Blanking and switch-off input for screen protection
• Sync on green operation possible
• On Screen Display (OSD) facility.
3
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VP
positive supply voltage
IP
supply current
36
48
60
mA
Vi(b-w)
input voltage, black-to-white
−
0.7
1.0
V
Vo(b-w)
output voltage, black-to-white
−
0.79
−
V
Io(b-w)
output current, black-to-white
−
50
−
mA
IOM
peak output current
−
−
100
mA
B
bandwidth
−3 dB
70
85
−
MHz
Gnom
nominal voltage gain
nominal contrast;
channels 1 and 3 gain
control pins open-circuit
−
1
−
dB
∆G
gain control difference for 2 channels
relative to Gnom
−5
−
+2.6
dB
CRcontrast
contrast control
Vi(CC) = 1 to 6 V
−22
−
+3.4
dB
COSD(min)
minimum contrast for OSD
Vi(CC) = 0.7 V
−
−40
−
dB
∆Vbl
brightness control related to nominal
output signal amplitude
−11
−
+34
%
Tamb
operating ambient temperature
−20
−
+70
°C
4
7.2
nominal contrast;
channels 1 and 3 gain
control pins open-circuit
8.0
8.8
V
ORDERING INFORMATION
TYPE
NUMBER
TDA4882
1997 Sep 04
PACKAGE
NAME
DIP20
DESCRIPTION
plastic dual in-line package; 20 leads (300 mil)
3
VERSION
SOT146-1
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
5
TDA4882
BLOCK DIAGRAM
handbook, full pagewidth
6.2 V
VP = 8 V
VP
1
10 kΩ
VOLTAGE
CONVERTER
TDA4882
brightness
control
signal
input
22 nF
75 Ω
10 MΩ
20
2
1.5 kΩ
current
output
VCRT = 90 V
CLAMP
CLIPPING
BAV21
19
voltage
output
33 Ω
220 Ω
33 Ω
BFQ235
VP
8V
68 kΩ
3
10 kΩ
gain
control
VOLTAGE
CONVERTER
18 feedback
CHANNEL 1
10 kΩ
cut-off
control
15 kΩ
6.8 kΩ
4
1.5 kΩ
VCRT = 90 V
current
17 output
signal
input
22 nF
75 Ω
10 MΩ
5
BAV21
CLAMP
CLIPPING
10 Ω
1 kΩ
voltage
16 output
220 Ω
10 kΩ
BFQ256
6
VOLTAGE
CONVERTER
7
+
6.8 kΩ
860 Ω
22 nF
75 Ω
10 MΩ
8
60 MHz
VCRT = 65 V
current
14 output
signal
input
cut-off
control
15 feedback
CHANNEL 2
VP
8V
68 kΩ
15 kΩ
VP
contrast
control
CRT
33 Ω
REF
GAIN
10 kΩ
40 MHz
BFQ235
10 Ω
33 Ω
25 MHz
BFQ236
BFQ236
CLAMP
CLIPPING
BAV21
10 Ω
voltage
13 output
18 Ω
BFQ235
18 Ω
47 nF
1 kΩ
100 Ω
10 Ω
VCRT
9
horizontal blanking
switch off
VOLTAGE
CONVERTER
input
clamping
93
kΩ
BFQ256
12 feedback
CHANNEL 3
10 kΩ
cut-off
control
10 kΩ
test mode
ultra black
output clamping
blanking
10
clamping pulse
vertical blanking
test mode
VP
5.8 V
PULSE
DECODER
11
horizontal blanking
10 kΩ
gain
control
Fig.1 Block diagram and basic application circuits for DC and AC coupling.
1997 Sep 04
4
MED910
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
6
TDA4882
PINNING
SYMBOL
PIN
DESCRIPTION
BC
1
brightness control
VIN1
2
signal input channel 1
GC1
3
gain control channel 1
GND
4
ground
VIN2
5
signal input channel 2
VIN1 2
19 VOUT1
CC
6
contrast control, OSD switch
GC1 3
18 FB1
VP
7
supply voltage
GND 4
17 IOUT2
VIN3
8
signal input channel 3
HBL
9
horizontal blanking, switch-off
CL
10
input clamping, vertical blanking,
test mode
GC3
11
gain control channel 3
FB3
12
feedback channel 3
VOUT3
13
voltage output channel 3
IOUT3
14
current output channel 3
FB2
15
feedback channel 2
VOUT2
16
voltage output channel 2
IOUT2
17
current output channel 2
FB1
18
feedback channel 1
VOUT1
19
voltage output channel 1
IOUT1
20
current output channel 1
7
7.1
handbook, halfpage
16 VOUT2
TDA4882
CC 6
15 FB2
VP 7
14 IOUT3
VIN3 8
13 VOUT3
HBL 9
12 FB3
CL 10
11 GC3
MHA815
Fig.2 Pin configuration.
For nominal brightness (pin 1 open-circuit) the signal black
level is equal to the reference black level.
FUNCTIONAL DESCRIPTION
General
7.3
Contrast control
Contrast is voltage controlled to affect the three channels
simultaneously (Fig.4). To provide the correct white point,
individual gain controls adjust the signals of channels 1
and 3 relative to the reference channel 2. Gain setting also
changes contrast to achieve correct grey scale tracking.
7.4
Output stages
The output stages provide both voltage and current
outputs. External cascode transistors reduce power
consumption of the IC and prevent breakdown of the
output transistors. Signal output currents and peaking
characteristics are determined by external components at
the voltage outputs and the video supply. The channels
have separate internal feedback loops which ensure large
signal linearity and marginal signal distortion irrespective
of output transistor thermal VBE variation (Fig.8).
Brightness control
Brightness control (Fig.4) yields a simultaneous signal
black-level shift of the three channels relative to a
reference black level.
1997 Sep 04
20 IOUT1
VIN2 5
Figure 4 illustrates the signal processing. The RGB input
signals 0.7 V (p-p) are capacitively coupled into the
TDA4882 from a low ohmic source and are clamped to an
internal DC voltage (artificial black level). Composite
signals will not disturb normal operations because an
internal clipping circuit cuts all signal parts below black
level. Channels 1 and 3 have a maximum total voltage
gain of 7 dB (maximum contrast and maximum individual
channel gain), channel 2 having 4.4 dB (maximum
contrast and nominal gain). With the nominal channel gain
of 1 dB and nominal contrast setting the nominal
black-to-white output signal is 0.79 V (p-p). Brightness,
contrast and gain control is by DC voltage.
7.2
BC 1
5
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
7.5
Ultra-black level is the lowest possible channel output
voltage and is not dependent on cut-off stabilization.
Input clamping
The clamping pulse (Fig.17) is for input clamping only.
The input signals are at black level during the clamping
pulse and are clamped to an internal artificial black level.
The coupling capacitors provide black-level storage.
The threshold for the clamping pulse is higher than that for
vertical blanking, therefore, the rise and fall times of the
clamping pulse need to be faster than 75 ns/V during
transition from 1 to 3.5 V.
7.6
7.8
Cut-off and black-level stabilization
For cut-off stabilization (DC coupling to the CRT) and
black-level stabilization (AC coupling) the video signal at
the cathode or the coupling capacitor is divided by an
adjustable voltage divider and fed to the channel feedback
inputs. During horizontal blanking time this signal is
compared with an internal DC voltage of approximately
5.8 V. Any difference will lead to a reference black-level
correction by charging or discharging the integrated
capacitor which stores the reference black-level
information between the horizontal blanking pulses.
Vertical blanking
The vertical blanking pulse (Fig.17) will be detected if the
input voltage is higher than the threshold voltage for
approximately 320 ns but does not exceed the threshold
for the clamping pulse in the time between. During the
vertical blanking pulse the input clamping is disabled to
avoid misclamping in the event of composite input signals.
The input signal is blanked and the artificial black level is
inserted instead. Also the brightness is set internally to its
nominal value, thus the output signal is at reference black
level. The DC value of the reference black level will be
adjusted by cut-off stabilization.
7.7
TDA4882
7.9
On Screen Display
For OSD (Fig.3), fast switching of control pin 6 to less than
1 V (e.g. 0.7 V) blanks the input signals. The OSD signals
can easily be inserted to the external cascode transistor.
7.10
Test mode
During test mode (pins 9 and 10 connected to VP) the
black levels at the channel voltage outputs are set
internally to typical 0.7 V with nominal brightness and
3 V DC at channel signal inputs.
Horizontal blanking
During horizontal blanking (Fig.18) the output signal is set
to reference black level and output clamping is activated.
If the voltage exceeds the switch-off threshold, the signal
is blanked and switched to ultra-black level for screen
protection and spot suppression during V-flyback.
handbook, full pagewidth
20
channel 1
17
channel 2
TDA4882
contrast
BFQ235
6
14
current
output
100 pF
channel 3
PH2222
OSD
fast blanking
1 kΩ
4.7 kΩ
220 Ω
OSD
signal input
PH2222
150 Ω
depending on
channel gain
1 kΩ to 10 kΩ
MHA816
Fig.3 OSD application.
1997 Sep 04
6
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
8 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
Vext
PARAMETER
MIN.
MAX.
UNIT
external DC voltage applied to the following pins:
pin 7 (VP)
0
8.8
V
pins 2, 5 and 8 (signal inputs)
−0.1
VP
V
pins 20, 17 and 14 (current outputs)
−0.1
VP
V
pins 12, 15 and 18 (channel feedback inputs)
−0.1
+0.7
V
pins 1, 6, 3 and 11 (brightness, contrast and gain control inputs)
−0.1
VP
V
pin 9 (horizontal blanking input)
−0.1
VP + 0.7
V
pin 10 (input clamping input)
−0.1
VP + 0.7
V
Io(av)
average output current (pins 20, 17 and 14); note 1
0
50
mA
IOM
peak output current (pins 20, 17 and 14)
0
100
mA
Ptot
total power dissipation
−
1200
mW
Tstg
storage temperature
−25
+150
°C
Tamb
operating ambient temperature
−20
+70
°C
Tj
junction temperature
−25
+150
°C
VESD
electrostatic handling for all pins; note 2
−500
+500
V
Notes
1. Signal amplitude of 50 mA black-to-white is possible if the average current (including blanking times and signal
variation against time) does not exceed 50 mA. The maximum power dissipation of 1200 mW has to be considered.
2. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
9
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
1997 Sep 04
PARAMETER
CONDITIONS
thermal resistance from junction to ambient
in free air
7
VALUE
UNIT
65
K/W
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
10 CHARACTERISTICS
VP = 8.0 V; Tamb = 25 °C; all voltages measured to GND (pin 4); note 1; see Fig.4; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VP
supply voltage
7.2
8.0
8.8
V
IP
supply current
36
48
60
mA
Video signal inputs (channels 1, 2 and 3)
Vi(b-w)
input voltage, black-to-white
−
0.7
1.0
V
VI(clamp)
DC voltage during input clamping
(artificial black + VBE)
2.8
3.1
3.4
V
II
DC input current
no clamping; Vi = VI(clamp);
Tamb = −20 to +70 °C
−0.05
+0.05
+0.25
0
µA
during clamping;
Vi = VI(clamp) + 0.7 V
50
75
120
µA
during clamping;
Vi = VI(clamp) − 0.7 V
−120
−75
−50
µA
Brightness control; note 2; Fig.5
Vi(BC)
input voltage
1.0
−
6.0
V
Ri(BC)
input resistance
40
50
60
kΩ
Vi(BC)(nom)
input voltage for nominal brightness pin 1 open-circuit
2.0
2.25
2.5
V
∆Vbl
black-level voltage change at
Vi(BC) = 1.0 V
voltage outputs referred to
Vi(BC) = 6.0 V
reference black level during output
pin 1 open-circuit
clamping (Vi(HBL) > 1.6 V) related
to output signal amplitude with
nominal 0.7 V (p-p) input signal and
nominal contrast (Vi(CC) = 4.3 V) for
any gain setting
−13
−11
−9.5
%
∆VBT
difference of ∆Vbl between any two
channels
30
34
37
%
−
−
0.8
%
−1.2
0
+1.2
%
V
Contrast control; note 3; Fig.6
Vi(CC)
input voltage
1.0
−
6.0
Vi(CC)(max)
maximum input voltage
−
−
VP − 1 V
Vi(CC)(nom)
input voltage for nominal contrast
note 4
−
4.3
−
V
Ii(CC)
input current
Vi(CC) = 4.3 V
−5
−1
−0.1
µA
C/Cnom
contrast relative to nominal contrast Vi(CC) = 6.0 V;
pins 3 and 11 open-circuit
2.4
3.4
−
dB
Vi(CC) = 1.0 V;
pins 3 and 11 open-circuit
−26
−22
−19
dB
Vi(CC)(min)
input voltage for minimum contrast
pins 3 and 11 open-circuit
−
0.7
−
V
∆Gtrack
tracking of output signals of
channels 1, 2 and 3
1 V < Vi(CC) < 6 V; note 5
−
0
0.5
dB
tdf(C)
delay between leading (falling)
edges of contrast voltage and
voltage output waveforms
Vi(CC) = 4.3 V to 0.7 V;
input fall time at pin 6:
tf(CC) = 2 ns; note 6; Fig.10
−
7
20
ns
1997 Sep 04
8
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
SYMBOL
PARAMETER
CONDITIONS
TDA4882
MIN.
TYP.
MAX.
UNIT
−
15
25
ns
fall time of voltage output waveform 90% to 10% amplitude; input
fall time at pin 6: tf(CC) = 2 ns;
note 6; Fig.10
−
6
15
ns
rise time of voltage output
waveform
−
6
15
ns
1.0
−
6.0
V
3.6
3.75
3.95
V
44
55
66
kΩ
tdr(C)
delay between trailing edges
(rising) of contrast voltage and
voltage output waveforms
tf(C)
tr(C)
Vi(CC) = 0.7 V to 4.3 V;
input rise time at pin 6:
tr(CC) = 2 ns; note 6; Fig.10
10% to 90% amplitude; input
rise time at pin 6:
tr(CC) = 2 ns; note 6; Fig.10
Gain control (channel 1 and channel 3); note 7; Fig.7
Vi(GC)
input voltage
Vi(GC)(nom)
input voltage for nominal gain
Ri(GC)
input resistance
∆G
gain control difference relative to
nominal gain
(channels 1 and 3 only)
pins 3 and 11 open-circuit
Vi(CC) = 4.3 V; Vi(GC) = 6 V
2
2.6
3.3
dB
Vi(CC) = 4.3 V; Vi(GC) = 1 V
−5.5
−5
−4.5
dB
Feedback input (channels 1, 2 and 3); note 8; Fig.8
Vref(int)
internal reference voltage
5.6
5.8
6.1
V
Io(FB)(max)
maximum output current
during output clamping;
Vi(FB) = 3 V
−500
−100
−60
nA
∆Vbl(CRT)
black-level variation at CRT
note 9
0
40
200
mV
∆Vref(T)
variation of Vref(int) in the
temperature range
Tamb = −20 to +70 °C
0
20
50
mV
∆Vref(int)(VP)
variation of Vref(int) with supply
voltage
7.2 V ≤ VP ≤ 8.8 V
0
60
100
mV
Voltage outputs (channels 1, 2 and 3)
Vo(b-w)(nom)
nominal signal output voltage
(black-to-white value)
pins 3 and 11 open-circuit;
Vi(CC) = 4.3 V; Vi(b-w) = 0.7 V
0.69
0.79
0.89
V
Vblx(max)
maximum adjustable black-level
voltage
during output clamping;
Tamb = −20 to +70 °C
1
1.2
1.4
V
Vbl(SO)
black-level voltage during
switch-off, equal to minimum
adjustable black-level voltage
Vi(HBL) = VP; RO = 33 Ω;
Tamb = −20 to +70 °C
30
45
100
mV
Vbl(TST)
black-level voltage during test
mode
Vi(HBL) = VP; Vi(CL) = VP; pin 1
open-circuit; Vi = VI(clamp);
note 10
0.3
0.7
1.2
V
S/N
signal-to-noise ratio
note 11
−
50
44
dB
dO(th)
output thermal distortion
Io(b-w) = 50 mA; note 12
−
0.6
1
%
∆Vbl(fl)
black-level variation between
clamping pulses
line frequency 30 kHz
−
0.5
4.5
mV
Voffset(max)
maximum offset during sync
clipping
VI < VI(clamp);
note 13; Fig.9
0
7
15
mV
1997 Sep 04
9
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
SYMBOL
∆Vo(b-w)(T)
PARAMETER
variation of nominal output signal
(black-to-white value) with
temperature
CONDITIONS
pins 3 and 11 open-circuit;
Vi(CC) = 4.3 V; Vi(b-w) = 0.7 V;
Tamb = −20 to +70 °C
TDA4882
MIN.
TYP.
MAX.
UNIT
0
2.5
10
%
−
50
−
mA
with peaking
−
−
100
mA
V20-19; V17-16; start of HF-saturation voltage of
V14-13
output transistors
Io = 50 mA
−
−
2.0
V
Io = 100 mA
−
−
2.2
V
Ibl(SO)
Vi(HBL) = VP; RO = 33 Ω
0
20
900
µA
Current outputs (channels 1, 2 and 3); note 14
Io(b-w)
output current
(black-to-white value)
output current during switch-off
Frequency response at voltage outputs; note 15; Figs 11, 12 and 13
∆G(f)
gain decrease by frequency
response
70 MHz; single channel
−
1.3
3
dB
tr(O)
rise time at voltage output
10% to 90% amplitude; input
rise time = 1 ns
−
4.1
5.0
ns
dVO
overshoot of output signal pulse
related to actual output pulse
amplitude
single channel;
input rise time = 2.5 ns;
Vi(b-w) = 0.7 V;
pins 3 and 11 open-circuit;
Vi(CC) = 4.3 V
−
4
8
%
−
−
−20
dB
threshold for horizontal blanking
(blanking, output clamping)
1.2
1.4
1.6
V
threshold for switch-off (blanking,
minimum black-level, no output
clamping)
5.8
6.5
6.8
V
Crosstalk at voltage outputs with speed up circuit; note 16; Figs 14, 15 and 16
αct(tr)
transient crosstalk
Threshold voltages for clamping, blanking and switch-off; note 17
Vi(HBL)
Ri(HBL)
input resistance
against ground
50
80
110
kΩ
td(Hblank)
delay between horizontal blanking
input and output signal blanking
input rise time at
pin 9 > 100 ns;
note 18; Fig.18
−
40
60
ns
Vi(CL)
threshold for vertical blanking
(blanking, no input clamping)
note 19; Fig.17
1.2
1.4
1.6
V
threshold for clamping
(input clamping, no blanking)
note 19; Fig.17
2.6
3.0
3.5
V
threshold for test mode
(no clamping, no blanking, see
Vbl(TST) above)
for test mode also
Vi(HBL) > 6.8 V (switch-off)
VP − 1 −
VP
V
current
Vi(CL) < VP − 1 V
−3
−1
−
µA
Vi(CL) ≥ VP − 1 V
−
100
−
µA
Ii(CL)
1997 Sep 04
10
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
SYMBOL
PARAMETER
CONDITIONS
TDA4882
MIN.
TYP.
MAX.
UNIT
tr(CL), tf(CL)
rise and fall time for clamping pulse note 19; Fig.17
−
−
75
ns/V
tw(clamp)
width of clamping pulse
0.6
−
−
µs
td(Vblank)
delay between vertical blanking
input and internal blanking
260
320
380
ns
note 19; Fig.17
Notes to the characteristics
1. Definition of levels:
a) Artificial black level: internal signal level behind input emitter follower during input clamping and signal clipping.
This level is inserted instead of the input signal during blanking.
b) Reference black level: DC voltage during output clamping at voltage outputs, not influenced by brightness,
contrast or gain setting, adjustable by cut-off stabilization.
c) Cut-off level: corresponding DC voltage at CRT cathode in closed feedback loop.
d) Black level: actual signal black level at either the voltage outputs or cathode, it can be adjusted by
(brightness × gain), it refers to reference black level or cut-off level.
e) Ultra-black level, switch-off level: lowest adjustable reference black level, lowest signal level at voltage outputs.
f) The minimum guaranteed control range for reference black level is 0.1 to 1 V. The ultra-black level is dependent
on the external resistor RO at pins 13, 16 and 19 (voltage outputs) to ground.
Ro
g) V bl(SO) ≈ ------------------------------- × 4.65 V
3.5 kΩ + R o
2. Linear control range is 1 to 6 V for Vi(BC), independent of supply voltage.
3. Linear control range is 1 to 6 V for Vi(CC), independent of supply voltage. Open pin 6 leads to maximum contrast
setting. It is recommended not to exceed Vi(CC) = VP − 1 V to avoid saturation of internal circuitry. For
Vi(CC) < Vi(CC)(min) ≈ 0.7 V a small negative signal (≈ −40 dB) will appear. For frequency dependency of contrast
control see note 15.
4. Definition for nominal output signals: input Vi(b-w) = 0.7 V, gain pins 3 and 11 open-circuit, contrast control
Vi(CC) = Vi(CC)(nom).
5.

 A 1 A 20 
 A 1 A 30 
 A 2 A 30  
∆G track = 20 × maximum of  log  --------- × ---------  ; log  --------- × ---------  ; log  --------- × ---------   dB
 A 10 A 2 
 A 10 A 3 
 A 20 A 3  

Ax: signal output amplitude in channel x at any contrast setting between 1 and 6 V.
Ax0: signal output amplitude in channel x at nominal contrast and same gain setting.
6. Typical step in contrast voltage and response at signal outputs for nominal input signal Vi(b-w) = 0.7 V
(OSD fast blanking input/output).
7. Linear control range is 1 to 6 V for Vi(GC), independent of supply voltage.
8. The internal reference voltage can be measured at pins 18, 15 and 12 (channel feedback inputs) during output
clamping (Vi(HBL) = 2 V) in closed feedback loop.
9. Slow variations of video supply voltage VCRT (Fig.1) will be suppressed at CRT cathode by cut-off stabilization.
Change of VCRT by 5 V leads to specified change of cut-off voltage.
10. The test mode allows testing without input and output clamping pulses. The signal inputs have to be biased via
resistors to the previously measured clamp voltages of approximately 3 V (artificial black level + VBE). Signal and
brightness blanking is not possible during test mode. The current outputs should be adjusted by resistors >> R0 from
voltage outputs to a positive voltage (e.g. VP).
1997 Sep 04
11
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
11. The signal-to-noise ratio is calculated by the formula (frequency range 1 to 70 MHz):
peak-to-peak value of the nominal signal output voltage
S
---- = 20 × log --------------------------------------------------------------------------------------------------------------------------------------------------- dB
RMS value of the noise output voltage
N
12. Large output swing e.g. Io(b-w) = 50 mA leads to signal-dependent power dissipation in output transistors.
Thermal VBE variation is compensated.
13. Composite signals will not disturb normal operation because an internal clipping circuit cuts all signal parts below
black level.
1
1
14. The output current approximately follows the equation I o = V o  -------- + ------------------  – 500 µA for Vo > Vbl(SO) and with
 R O 2.2 kΩ 
RO = external resistor at voltage output to ground. The external RC combination (Fig.1) at pins 19, 16 and 13
(voltage outputs) enables peak currents during transients.
15. Frequency response, crosstalk and pulse response have been measured at voltage outputs on a special
printed-circuit board with 50 Ω line in/out connections and without peaking, see Chapter 11.
16. Crosstalk between any two voltage outputs (e.g. channels 1 and 2).
a) Input conditions: one channel (channel 1) with nominal input signal and minimum rise time. The inputs of the
other channels capacitively coupled to ground (channels 2 and 3). Gain pins 3 and 11 open-circuit.
b) Output conditions: output signal of channel 1 is set by contrast control voltage, to Vo(b-w) = Vo(VOUT1) = 0.7 V,
the rise time should be 5 ns. Output signal of channel 2 then is Vo(b-w) = Vo(VOUT2).
V o(VOUT2)
c) Transient crosstalk: α ct(tr) = 20 × log ------------------------ dB
V o(VOUT1)
d) Crosstalk as a function of frequency has been measured without peaking circuit, with nominal input signal and
nominal settings.
17. The internal threshold voltages are derived from a stabilized voltage. The internal pulses are generated while the
input pulses are higher than the thresholds. Voltages less than −0.1 V at pins 9 and 10 can influence black-level
control and should be avoided.
18. The delay between HBL input pulse (horizontal blanking) and output signal blanking pulse and also brightness
blanking (∆Vbl), at the voltage outputs, depends on the input rise time of the HBL pulse. The specified values for
td(Hblank) are valid for HBL rise times greater than 100 ns only.
19. For 75 ns/V < tr(CL), tf(CL) < 240 ns/V, generation of internal input clamping and blanking pulse is not defined. Pulses
not exceeding the threshold of input clamping (typical 3 V) will be detected as blanking pulses.
1997 Sep 04
12
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
video signal
input signals
handbook, full pagewidth
black level equal to
artificial black level + VBE
by input clamping (approximately 3 V)
input signal at
pins 2, 5 and 8
with sync (on green)
input clamping pulse
at pin 10
horizontal blanking and
output clamping pulse
at pin 9
horizontal flyback and output clamping
video portion
black level equal to artificial
black level by input clamping and
storage by coupling capacitor
internal signal
behind input stage
sync clipping to
artificial black level
inserted artificial black level
output signals
(pins 19, 16 and 13)
max.
at nominal gain and
contrast setting
and
maximum/nominal/
minimum brightness setting
min.
nom.
∆ black level
due to brightness setting
reference black level
brightness is set to nominal value during horizontal blanking
max.
nom.
at nominal gain and
maximum brightness setting
and
maximum/nominal/
minimum contrast setting
min.
max.
∆ black level for
maximum brightness
reference black level
nom.
at nominal contrast and
maximum brightness setting
and
maximum/nominal/
minimum gain setting
min.
grey scale
reference black level
ultra black level
ground
high tension supply
voltage (e.g. 90 V)
(raster) cut-off level
signal at CRT cathode
black level
at nominal gain and
contrast setting
and
maximum brightness setting
grey scale
MHA817
Fig.4 Signal processing.
1997 Sep 04
13
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
MHA818
50
handbook, halfpage
400
∆Vbl
(%)
MHA819
1400
handbook, halfpage
4
signal
amplitude
(mV)
(mV)
40
TDA4882
300
30
2
1000
800
1
0
−1
600
−3
200
20
100
10
0
−10
(dB)
3
0
400
−100
200
−20
−5
−10
−20
−40
0
−200
−30
0
2
2.24
4
6
−200
8
0
Vi (BC)
Fig.5 Typical brightness characteristic.
4
6
4.3
8
Vi(CC) (V)
Fig.6 Typical contrast characteristic.
MHA821
1200
2
0.7
handbook, halfpage
MHA822
5.85
handbook, halfpage
3
(dB)
5.84
Vref(int)
(V) 5.83
signal
amplitude
(mV)
2
800
0
5.82
−1
5.81
400
−2
−3
−4
−5
−6
1
VP = 8.8 V
8.0 V
5.80
5.79
5.78
−8
7.2 V
5.77
5.76
0
0
2
4
3.75
6
5.75
−20
8
Vi(GC) (V)
0
20
40
60
80
100
Tamb (°C)
Conditions: 0.5 V reference black level, no signal.
Fig.8
Fig.7 Typical gain characteristic.
1997 Sep 04
14
Typical variation of Vref(int) with temperature
and supply voltage.
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
handbook, full pagewidth
input
signal
output
signal
Voffset(max)
MHA823
Fig.9 Typical sync clipping.
handbook, full pagewidth
OSD pulse
at pin 6
(V)
tf(CC)
tr(CC)
4.3
90%
50%
10%
0.7
t
output signal
at pins 19, 16 and 13
(V)
tdf(C)
tdr(C)
Vbl + Vo(b-w) = 1.5
90%
Vo(b-w)
50%
10%
Vbl = 0.7
t
tf(C)
tr(C)
MHA820
Fig.10 Typical OSD fast blanking input/output waveforms.
1997 Sep 04
15
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
MHA825
800
handbook, full pagewidth
input pulse
(mV)
90%
600
400
tr ≈ 2.5 ns
tf ≈ 2.5 ns
200
10%
0
1000
output pulse
(mV)
800
90%
600
400
tf ≈ 4.8 ns
tr ≈ 4.4 ns
200
10%
0
−200
0
20
40
60
80
t (ns)
100
Solid line: single channel.
Dotted line: white pattern.
Fig.11 Typical pulse response: VIN1, VIN2 and VIN3 → VOUT1, VOUT2 and VOUT3.
1997 Sep 04
16
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
MHA824
3
handbook, full pagewidth
signal
(dB)
0
−3
−6
−9
−12
−15
1
102
10
f (MHz)
103
Solid line: single channel.
Dotted line: white signal.
Fig.12 Typical frequency response.
MHA826
10
handbook, full pagewidth
Vi(cc) =
7V
signal
(dB)
6V
5V
0
4V
3V
2V
−10
Vi(cc) = 0.7 V
−20
1V
−30
Vi(cc) = 0.7 V
1
10
70
102 120
f (MHz)
Solid line: single channel.
Dotted line: white signal.
Fig.13 Typical characteristic of contrast control as a function of frequency.
1997 Sep 04
17
103
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
MHA827
handbook, full pagewidth
0
channel(1)
signal
(dB)
1
−10
−20
2
3
−30
−40
1
102
10
f (MHz)
103
(1) Solid line: channel 1.
Dashed line: channel 2.
Dotted line: channel 3.
Fig.14 Typical crosstalk: channel 1 → 2 and 3.
MHA828
handbook, full pagewidth
0
channel(1)
signal
(dB)
2
−10
−20
3
−30
1
−40
1
102
10
(1) Solid line: channel 1.
Dashed line: channel 2.
Dotted line: channel 3.
Fig.15 Typical crosstalk: channel 2 → 1 and 3.
1997 Sep 04
18
f (MHz)
103
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
MHA829
handbook, full pagewidth
0
channel(1)
signal
(dB)
3
−10
−20
1
−30
2
−40
1
102
10
103
f (MHz)
(1) Solid line: channel 1.
Dashed line: channel 2.
Dotted line: channel 3.
Fig.16 Typical crosstalk: channel 3 → 1 and 2.
handbook, full pagewidth
3V
Vi(CL)
1.4 V
t
internal pulses
input
clamping
tr(CL)
tf(CL)
no
clamping
≈ 1/2 td(Vblank)
no
clamping
t
td(Vblank)
blanking
t
MHA831
Fig.17 Timing of pulses at CL (pin 10).
1997 Sep 04
19
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
handbook, full pagewidth
td
(ns)
TDA4882
HBL pulse
(V)
80
1.45
70
0.2
t
60
tr
50
td(Hblank)
output
signal
(V)
td(Hblank)
40
td(4)
0.74(1)
30
∆Vbl
td(4)
20
0.5(2)
20
(1)
(2)
(3)
(4)
50%
of ∆Vbl
40
60
80
100
120 140
tr,tf(3) (ns)
t
MHA830
Black level: 0.74 V.
Reference black level: 0.5 V.
Rise and fall times for HBL between 0.2 and 1.45 V.
td is the delay at the end of brightness blanking.
Fig.18 Typical delay between HBL pulse and brightness blanking at voltage outputs.
1997 Sep 04
20
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
DC control for brightness, contrast and gain is provided at
connectors P21 and P22. Contrast control can also be set
by the potentiometer R28 (jumper J11). The series
resistor R11 is necessary if fast OSD switching is activated
via 50 Ω line (P10), a line termination can be provided at
the connector P9. Clamping and blanking pulses are fed to
the IC via connectors P7 and P8. Connector P23 is used
for power supply. The capacitors C7 and C8 should be
located as near as possible to the IC pins.
11 APPLICATION AND TEST INFORMATION
For high frequency measurements and special application,
a printed-circuit board with only a few external
components is built. Figure 19 shows the application
circuit and Fig.20 the layout of the double sided printed
board. All components on the underside and R13, R14
and R15 on the top are SMD types. Short HF loops and
minimum crosstalk between the channels as well as input
and output are achieved by properly shaped ground areas
star connected to the IC ground pin.
11.1
The HF input signal can be fed to the subclick connectors
P1, P2 and P3 by a 50 Ω line. The line is then terminated
by a 51 Ω resistor on the board. With choice of jumper
connections (J1, J2 and J3) it is possible to connect
channel inputs to its input connector, to connect all
channels to one input connector (white pattern) and to
ground each input via the coupling capacitor.
Recommendations for building the application
board
• General
– Double-sided board
– Short HF loops by large ground plane on the rear.
• Voltage outputs
– Capacitive loads as small as possible
For operation without input clamping, e.g. test mode, the
DC bias can be provided by VIDC (connector P21) if a
short-circuit at J4, J5 and J6 is made (solder short or
low-value SMD resistor).
– Short interconnection via resistor to ground.
• Supply voltage
– Capacitors as near as possible to the pins
The output signal can be monitored via 50 Ω terminated
lines at the voltage outputs (subclick connectors
P4, P5 and P6). With 100 Ω in parallel to the 50 Ω
terminated line the effective load resistance at the voltage
outputs is 33 Ω. The mismatch seen from the line towards
the IC has no significant effect if the line is match
terminated. A peaking circuit, C15, R16 for channel 1
(C16, R17 for channel 2 and C17, R18 for channel 3), can
be added for realistic loading of the voltage outputs.
– Use of high-frequency capacitors (low self
inductance, e.g. SMD).
• Resonance suppression. The external interconnection
inductance to the current outputs can build a resonance
together with the internal substrate capacitance.
A damping resistor of 10 to 30 Ω near to the IC pin can
suppress such oscillations.
Black-level adjustment is made by VIOS, VFBX (external
voltages at connector P21) and resistors R19, R22
and R25 for channel 1 (channel 2: R20, R23 and R26;
channel 3: R21, R24 and R27). If R19 is equal to the
effective load resistor at the voltage output the reference
black level (Vref(bl)) is approximately:
R22
V ref(bl) = VIOS – V ref(int) – ( V ref(int) – VFBX ) × ----------R25
Vref(int) is the internal reference voltage at the feedback
input (typical 5.8 V). By this it is possible to adjust the
reference black level and the voltage at the current outputs
independently.
1997 Sep 04
21
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
subclick connector (50 Ω)
handbook, full pagewidth
solder point for short-circuiting
or SMD 0 Ω resistor
BC/GC2
jumper
connector
GND
(sense)
GC1
VIDC
VFBX
VIOS
P21
C30
220 µF
(25 V)
R7
C29
2.2 µF
C28
100 nF
C27
22 nF
(multi-layer)
110 Ω
C4
100 nF
IC1
BC/GC2
1
R19
IOUT1
20
33 Ω
C5
22 nF
Vi(b-w)
J1
C1
22 nF
VIN1
P1
C15
47 pF
R4
5.1 kΩ
GC1
C12
22
nF
J2
C2
22 nF
VIN2
P2
CC
C13
22 nF
C3
22 nF
P3
4
17
C18
22 nF
R20
IOUT2
33 Ω
C22
22 nF
16
C16
47 pF
6
15
R17
R14
100
Ω
R23
3 kΩ
33 Ω
FB2
R26
14
7
C19
22 nF
R21
IOUT3
33 Ω
C7
1 nF
VIN3
HBL
C14
22
nF
C23
22 nF
C26
100 nF
P6
VOUT3
13
8
C17
47 pF
R6
5.1
kΩ
C25
100 nF
P5
VOUT2
5
J6
R3
51 Ω
R25
9.1 kΩ
VP
J3
R22
3 kΩ
9.1 kΩ
TDA4882
R5
5.1 kΩ
C8
100
nF
R13
100
Ω
33 Ω
FB1
18
J5
R2
51
Ω
Vi(b-w)
3
R16
C6
22 nF
GND
Vi(b-w)
19
J4
R1
51
Ω
C24
100
nF
P4
VOUT1
2
C21
22
nF
12
9
R18
R15
100
Ω
R24
3 kΩ
33 Ω
FB3
R27
9.1 kΩ
C20
22 nF
P22
CL
GC3
GC3
11
10
C11
22 nF
CC
C10
100 nF
R8
1 kΩ
R9
1 kΩ
C31
10 µF
R10
1 kΩ
L1
100 µH
C9
100 nF
R12
R11
J10
J11
1 kΩ
P7
P23
HBL
P9
P8
CL
GND
(power)
VP
VP (sense)
GND (sense)
P10
OSD
MHA832
Fig.19 Application circuit for test PCB.
1997 Sep 04
1 kΩ
R28
10 kΩ
22
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
handbook, full pagewidth
C30
C29
P22
R28
J11
J10
P4
P5
P6
P10
R13
R15
R14
P9
C31
IC1
L1
P23
R7
P21
P8
J1
J2
J3
P7
P2
P1
R1
P3
R2
R3
R4 C12
C1
R8
R5 C14 R6
C2
C3
C13
J4
J5
C4
C5
C6
R22
C8
R23
J6
C7
R24
R19 C15 R25 R20 C16 R26 R21
C24
C22
C18
C9
C11
C25
R27
C23
C19
C26
R10
C17
R18
R17
R16
C21
R9
C20
R11
R12
C28
C27
C10
MHA833
Fig.20 Double sided test PCB layout.
1997 Sep 04
23
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
12 INTERNAL PIN CONFIGURATION
handbook, full pagewidth
20
19
18
17
16
15
CL
14
CL
13
12
11
CL
TDA4882
CL
CL
CL
+
1
2
3
4
5
6
7
8
10
MED911
+
pin
pin
diode protection
on all pins except
pins 4 and 7
zener diode protection
at pin 7
Fig.21 Internal pin configuration.
1997 Sep 04
9
24
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
TDA4882
13 PACKAGE OUTLINE
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
b1
w M
(e 1)
b
MH
11
20
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
mm
4.2
0.51
3.2
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
inches
0.17
0.020
0.13
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
D
e
e1
L
ME
MH
w
Z (1)
max.
6.40
6.22
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
2.0
0.25
0.24
0.10
0.30
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.078
(1)
E
(1)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT146-1
1997 Sep 04
REFERENCES
IEC
JEDEC
EIAJ
SC603
25
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17
95-05-24
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
14 SOLDERING
14.1
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
14.3
Repairing soldered joints
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
14.2
TDA4882
Soldering by dipping or by wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
15 DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
16 LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Sep 04
26
Philips Semiconductors
Product specification
Advanced monitor video controller for OSD
NOTES
1997 Sep 04
27
TDA4882
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010,
Fax. +43 160 101 1210
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773
Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 689 211, Fax. +359 2 689 102
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,
Tel. +45 32 88 2636, Fax. +45 31 57 0044
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615800, Fax. +358 9 61580920
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Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427
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Tel. +49 40 23 53 60, Fax. +49 40 23 536 300
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240
Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. +48 22 612 2831, Fax. +48 22 612 2327
Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 829 1849
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1997
SCA55
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
547047/1200/02/pp28
Date of release: 1997 Sep 04
Document order number:
9397 750 02268