TI TL7705ACDR

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
D
D
D
D
D
D
D
Power-On Reset Generator
Automatic Reset Generation After Voltage
Drop
Wide Supply-Voltage Range
Precision Voltage Sensor
Temperature-Compensated Voltage
Reference
True and Complement Reset Outputs
Externally Adjustable Pulse Duration
TL7702A, TL7709A, TL7712A, TL7715A . . . D OR P PACKAGE
TL7705A . . . D, P, OR PS PACKAGE,
(TOP VIEW)
REF
RESIN
CT
GND
1
8
2
7
3
6
4
5
VCC
SENSE
RESET
RESET
description/ordering information
ORDERING INFORMATION
PACKAGE†
TA
PDIP (P)
TL7702ACP
Tube of 75
TL7702ACD
Reel of 2500
TL7702ACDR
Tube of 50
TL7705ACP
Tube of 75
TL7705ACD
Reel of 2500
TL7705ACDR
SOP (PS)
Reel of 2000
TL7705ACPSR
T7705A
PDIP (P)
Tube of 50
TL7709ACP
TL7709ACP
Tube of 75
TL7709ACD
Reel of 2500
TL7709ACDR
Tube of 50
TL7712ACP
Tube of 75
TL7712ACD
Reel of 2500
TL7712ACDR
PDIP (P)
Tube of 50
TL7715ACP
TL7715ACP
SOIC (D)
Tube of 75
TL7715ACD
7715AC
PDIP (P)
Tube of 50
TL7702AIP
TL7702AIP
Tube of 75
TL7702AID
Reel of 2500
TL7702AIDR
Tube of 50
TL7705AIP
Tube of 75
TL7705AID
Reel of 2500
TL7705AIDR
PDIP (P)
SOIC (D)
SOIC (D)
PDIP (P)
SOIC (D)
SOIC (D)
– 40°C to 85°C
TOP-SIDE
MARKING
Tube of 50
SOIC (D)
0°C to 70°C
ORDERABLE
PART NUMBER
PDIP (P)
SOIC (D)
TL7702ACP
7702AC
TL7705ACP
7705AC
7709AC
TL7709ACP
7712AC
7702AI
TL7705AIP
7705AI
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
description/ordering information (continued)
The TL77xxA family of integrated-circuit supply-voltage supervisors is designed specifically for use as reset
controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the supply
for undervoltage conditions at the SENSE input. During power up, the RESET output becomes active (low)
when VCC attains a value approaching 3.6 V. At this point (assuming that SENSE is above VIT+), the delay timer
function activates a time delay, after which outputs RESET and RESET go inactive (high and low, respectively).
When an undervoltage condition occurs during normal operation, RESET and RESET go active. To ensure that
a complete reset occurs, the reset outputs remain active for a time delay after the voltage at the SENSE input
exceeds the positive-going threshold value. The time delay is determined by the value of the external capacitor
CT : td = 1.3 × 104 × CT, where CT is in farads (F) and td is in seconds (s).
During power down and when SENSE is below VIT–, the outputs remain active until VCC falls below 2 V. After
this, the outputs are undefined.
An external capacitor (typically 0.1 µF) must be connected to REF to reduce the influence of fast transients in
the supply voltage.
functional block diagram
The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming
network to adjust the reference voltage and sense-comparator trip point.
VCC
8
Reference
Voltage
CT
SENSE
≈100 µA
6
3
7
5
RESET
RESET
R1
(see Note A)
R2
(see Note A)
2
RESIN
1
GND
4
NOTES: A. TL7702A: R1 = 0 Ω, R2 = open
TL7705A: R1 = 7.8 kΩ, R2 = 10 kΩ
TL7709A: R1 = 19.7 kΩ, R2 = 10 kΩ
TL7712A: R1 = 32.7 kΩ, R2 = 10 kΩ
TL7715A: R1 = 43.4 kΩ, R2 = 10 kΩ
B. Resistor values shown are nominal.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
REF
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
timing diagram
VCC and SENSE
Threshold Voltage
VCC ≈ 3.6 V
VCC ≈ 2 V
RESET
Î
Î
td
Output
Undefined
td
Output
Undefined
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
Input voltage range, VI, RESIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V
Input voltage range, VI, SENSE: TL7702A (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
TL7705A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V
TL7709A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V
TL7712A, TL7715A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V
High-level output current, IOH, RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA
Low-level output current, IOL, RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Package thermal impedance, θJA (see Notes 3 and 4): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed VCC – 1 V or 6 V, whichever
is less.
3. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
4. The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
recommended operating conditions
VCC
Supply voltage
VIH
High-level input voltage at RESIN
VIL
Low-level input voltage at RESIN
VI
MIN
MAX
3.5
18
UNIT
V
2
V
0.6
Input voltage, SENSE
TL7702A
0
See Note 2
TL7705A
0
10
TL7709A
0
15
TL7712A
0
20
TL7715A
0
20
V
V
IOH
High-level output current, RESET
–16
mA
IOL
Low-level output current, RESET
16
mA
TA
Operating free-air
free air temperature range
TL77xxAC
TL77xxAI
0
70
–40
85
°C
NOTE 2: For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed VCC – 1 V or 6 V, whichever is less.
electrical characteristics over recommended operating conditions (unless otherwise noted)
TL77xxAC
TL77xxAI
TEST CONDITIONS†
PARAMETER
MIN
VOH
VOL
High-level output voltage, RESET
Low-level output voltage, RESET
IOH = –16 mA
IOL = 16 mA
Vref
Reference voltage
TA = 25°C
Vhys
y
Hysteresis, SENSE (VIT+ – VIT–)
0.4
V
2.53
2.58
V
2.48
2.53
2.58
4.5
4.55
4.6
7.5
7.6
7.7
TL7712A
10.6
10.8
11
TL7715A
13.2
13.5
13.8
TL7709A
TA = 25°C
TL7702A
10
TL7705A
15
TL7709A
TA = 25°C
TL7712A
IOH
IOL
High-level output current, RESET
SENSE
TL7702A
Low-level output current, RESET
45
Vref < VI < VCC – 1.5 V
VO = 18 V
VO = 0
All inputs and outputs open
ICC
Supply current
† All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and VCC to GND.
4
POST OFFICE BOX 655303
mV
20
VI = 2.4 V to VCC
VI = 0.4 V
RESIN
Input current
V
35
TL7715A
II
V
2.48
TL7705A
Negative-going
N
ti
i iinputt th
threshold
h ld voltage,
lt
SENSE
UNIT
MAX
VCC–1.5
TL7702A
VIT–
TYP
• DALLAS, TEXAS 75265
20
–100
0.5
1.8
µA
2
50
µA
–50
µA
3
mA
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
switching characteristics over recommended operating conditions (unless otherwise noted)
TL77xxAC
TL77xxAI
TEST CONDITIONS†
PARAMETER
CT = 0.1 µF
Output pulse duration
Input pulse duration at RESIN
tw(S)
Pulse duration
at SENSE input to switch outputs
VIH = VIT– + 200 mV,
tpd
Propagation delay time, RESIN to RESET
VCC = 5 V
tr
Rise time
tf
Fall time
RESET
RESET
RESET
RESET
UNIT
MIN
TYP
MAX
0.65
1.2
2.6
0.4
µs
2
µs
VIL = VIT– – 200 mV
1
VCC = 5 V
V,
See Note 5
VCC = 5 V
V,
See Note 5
msec
0.2
3.5
3.5
0.2
µs
µs
µs
† All switching characteristics are measured with 0.1-µF capacitors connected at REF and VCC to GND.
NOTE 5: The rise and fall times are measured with a 4.7-kΩ load resistor at RESET and RESET.
PARAMETER MEASUREMENT INFORMATION
Voltage
Drop
tw(S)
SENSE
VIT+
VIT–
VIT+
0V
VIH
RESIN
Undefined
2V
0.7 V
tf
tr
VIL
tpd
90%
90%
90%
RESET
50%
10%
td
VOH(RESET)
ÎÎ
td
td
tf
90%
RESET
50%
10%
10%
10%
10%
VOL(RESET)
tr
Figure 1. Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
TYPICAL CHARACTERISTICS†
DEASSERTION TIME
vs
LOAD RESISTANCE
ASSERTION TIME
vs
LOAD RESISTANCE
7
42
VCC = 5 V
CT = 0.1 µF
CL = 10 pF
TA = 25°C
6
t – Deassertion Time – µ s
t – Assertion Time – ns
38
34
30
VCC = 5 V
CT = 0.1 µF
CL = 10 pF
TA = 25°C
RESET tr
26
5
4
RESET tf
3
2
RESET tr
22
RESET tf
1
0
18
0
2
8
4
6
RL – Load Resistance – kΩ
0
10
2
4
6
8
RL – Load Resistance – kΩ
Figure 2
Figure 3
DEASSERTION TIME
vs
LOAD CAPACITANCE
ASSERTION TIME
vs
LOAD CAPACITANCE
3.6
44
VCC = 5 V
CT = 0.1 µF
RL = 4.7 kΩ
TA = 25°C
36
RESET tr
32
28
RESET tf
24
VCC = 5 V
CT = 0.1 µF
RL = 4.7 kΩ
TA = 25°C
3.2
t – Deassertion Time – µs
40
t – Assertion Time – ns
10
2.8
RESET tf
2.4
2
RESET tr
1.6
1.2
0.8
20
0
25
50
75
100 125 150
CL – Load Capacitance – pF
175
200
0
25
50
75
100
125
150
175
200
CL – Load Capacitance – pF
Figure 4
Figure 5
† For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted
plateauing in either output waveform during switching.
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
APPLICATION INFORMATION
5V
12 V
8
TL7712A
3
2
4
CT
RESIN
5
RESET
System Reset
TL7705A
3
6
RESET
1
REF
CT
10 kΩ
GND
10 kΩ
VCC
SENSE
10 kΩ
1
REF
CT
7
6
RESET
8
22 kΩ
VCC
7
SENSE
2
5
RESET
RESIN
GND
0.1 µF
10 kΩ
4
CT
0.1 µF
GND
8
7
2
C T(F)
VCC
SENSE
RESET
RESIN
+ 1.3t
d(s)
10 4
5
TL7712A
6
RESET
3
1
CT
REF
10 kΩ
GND
4
CT
0.1 µF
–12 V
Figure 6. Multiple Power-Supply System Reset Generation
5V
8
VCC
7
SENSE
2
RESIN
RESET
C T(F)
+ 1.3
t d(s)
10 kΩ
5
VCC
RESET
TMS7000
TL7705A
6
RESET
3
1
CT
REF
10 4
CT
GND
4
10 kΩ
VSS
0.1 µF
GND
Figure 7. Reset Controller for TMS7000 System
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
APPLICATION INFORMATION
5V
µA7805
INPUT
4.7 kΩ
8
OUTPUT
VCC
7 SENSE
Input
COMMON
CI
CO
System RESET
5
RESET
TL7705A
6
RESET
1
3
CT
REF
G
GND
4
4.7 kΩ
CT
25 kΩ
S
Q1
2N3994
D
0.1 µF
Figure 8. Eliminating Undefined States Using a P-Channel JFET
VCC
10 kΩ
750 Ω
Q1
2N4036
8
SENSE Input
2.7 kΩ
VCC
7
5
RESET
SENSE
System RESET
TL77xxA
2
3
RESET
RESIN
CT
REF
6
1
10 kΩ
1 kΩ
GND
CT
4
0.1 µF
Figure 9. Eliminating Undefined States Using a pnp Transistor
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
31-Oct-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-88685012A
OBSOLETE
LCCC
FK
20
TBD
Call TI
TL7702ACD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702ACDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702ACDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702ACDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702ACDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702ACDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702ACP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL7702ACPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL7702AID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702AIDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702AIDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702AIDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702AIDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702AIDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7702AIP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL7702AIPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL7702AMFKB
OBSOLETE
LCCC
FK
20
TBD
Call TI
Call TI
TL7702AMJG
OBSOLETE
CDIP
JG
8
TBD
Call TI
Call TI
TL7702AMJGB
OBSOLETE
CDIP
JG
8
TBD
Call TI
Call TI
TL7705ACD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705ACDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705ACDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705ACDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705ACDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705ACDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705ACP
ACTIVE
PDIP
P
8
CU NIPDAU
N / A for Pkg Type
50
Addendum-Page 1
Pb-Free
Lead/Ball Finish
MSL Peak Temp (3)
Call TI
PACKAGE OPTION ADDENDUM
www.ti.com
31-Oct-2006
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL7705ACPE4
ACTIVE
PDIP
P
8
TL7705ACPSLE
OBSOLETE
SO
PS
8
TL7705ACPSR
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705ACPSRE4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705AID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705AIDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705AIDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705AIDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705AIDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705AIDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7705AIP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL7705AIPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL7705AMFKB
OBSOLETE
LCCC
FK
20
TBD
Call TI
Call TI
TL7705AMJG
OBSOLETE
CDIP
JG
8
TBD
Call TI
Call TI
TL7705AMJGB
OBSOLETE
CDIP
JG
8
TBD
Call TI
Call TI
TL7709ACD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7709ACDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7709ACDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7709ACDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7709ACP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL7709ACPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL7709AID
OBSOLETE
SOIC
D
8
TBD
Call TI
Call TI
Call TI
Lead/Ball Finish
MSL Peak Temp (3)
(RoHS)
50
Pb-Free
(RoHS)
TBD
CU NIPDAU
Call TI
N / A for Pkg Type
Call TI
TL7709AIP
OBSOLETE
PDIP
P
8
TBD
Call TI
TL7712ACD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7712ACDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7712ACDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7712ACDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7712ACP
ACTIVE
PDIP
P
8
CU NIPDAU
N / A for Pkg Type
50
Addendum-Page 2
Pb-Free
PACKAGE OPTION ADDENDUM
www.ti.com
31-Oct-2006
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL7712ACPE4
ACTIVE
PDIP
P
8
TL7712AID
OBSOLETE
SOIC
D
TL7712AIP
OBSOLETE
PDIP
P
TL7715ACD
ACTIVE
SOIC
D
8
TL7715ACDE4
ACTIVE
SOIC
D
TL7715ACP
ACTIVE
PDIP
TL7715ACPE4
ACTIVE
TL7715AID
TL7715AIP
Lead/Ball Finish
MSL Peak Temp (3)
(RoHS)
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
8
TBD
Call TI
Call TI
8
TBD
Call TI
Call TI
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
OBSOLETE
SOIC
D
8
TBD
Call TI
Call TI
OBSOLETE
PDIP
P
8
TBD
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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