TMS37F158 www.ti.com SCBS877 – MAY 2012 CONTROLLER ENTRY DEVICE WITH INTEGRATED DST80 AUTHENTICATION, EEPROM, AND LF IMMOBILIZER INTERFACE Check for Samples: TMS37F158 FEATURES 1 • • • Wide Supply Voltage Range: 2.0 V to 3.6 V Ultra-Low Power Consumption – CPU Active Mode: 200 μA/MHz at 2.2 V – Standby Mode (LPM3): 0.7 μA – Off Mode (LPM4): 0.1 μA – Power Down Mode: 60 nA Microcontroller System and Peripherals – 16-Bit RISC Architecture, 125-ns Instruction Cycle Time – Wake-Up From Standby Mode in <6 μs – Basic Clock Module Configurations – Single External Resistor – 32-kHz Crystal – High-Frequency Crystal – Resonator – External Clock Source – 16-Bit Timer_A With Three Capture/Compare Registers – 8KB + 256B Flash Memory – 256B RAM – 150-Byte EEPROM – Serial Onboard Programming, No External Programming Voltage Needed – Programmable Code Protection by Security Fuse – 80-Bit DST80 Security Authentication Coprocessor – 12 I/O Ports – Integrated Push-Button Logic • Low-Frequency (LF) Immobilizer Interface – Integrated Batteryless Immobilizer Interface – Half-Duplex (HDX) Immobilizer Communication Achieves up to 4-in (10-cm) Read Range – Special Selective Addressing Mode Allows Reliable Learn-In Sequence – 80-Bit Authentication Key Length – Up to 8-kbit/s Uplink Data Rate – 5/3-Byte Challenge/Response Algorithm – Fast Authentication Within 42 ms – Fast Mutual Authentication Within 65 ms – 150-Byte EEPROM – 124-Byte Available EEPROM User Memory – 32-Bit Unique Serial Number – High EEPROM Security and Flexibility – Write-Only Authentication Keys – Pages Are Irreversibly Lockable and Protectable – Protected Pages Programmable Only Through Mutual Authentication – Battery Check and Charge Functions – Each User Page is Lockable – Resonant Frequency: 134.2 kHz – Integrated Resonant Frequency Trimming DESCRIPTION The TMS37F158 Controller Entry Device (CED80) combines an ultra-low-power 16-bit RISC microcontroller with the proven TI DST80 immobilizer interface and a sophisticated power management system. It is the ideal device for any remote control or remote keyless entry application. The embedded DST80 low-frequency (LF)immobilizer interface offers a high level of security through its hardware encryption and mutual authentication with 80-bit security key length. The immobilizer interface is always accessible and operates without the need for a battery. The low-power microcontroller MSP430 core offers a 16-bit RISC architecture, 8KB program memory, battery charge and check functions, and 12 user-accessible I/O ports. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated TMS37F158 SCBS877 – MAY 2012 www.ti.com The CED80 manages the immobilizer communication and push-button interaction. During sleep state, the device enters a special low-power mode with only 60 nA of current consumption. By sensing the pressing of a push button, the device wakes up and controls an external UHF transmitter or UHF transceiver. Security keys and rolling codes can be stored in the integrated EEPROM memory. This memory is accessible over the LF interface without support from the battery in the keyfob or by the internal microcontroller if the battery is functional. The CED80 offers a special battery-charge mode; to achieve faster charging, it is recommend to add a charging amplifier device on the base station side. The external resonant circuit with an LF coil and a resonant capacitor can be trimmed to the correct resonant frequency with the integrated trimming capability, which eliminates part tolerances. The small DBT 30-pin package together with only a few external components results in cost-efficient design. Ordering Information (1) PACKAGE (2) TA –40°C to 85°C (1) (2) ORDERABLE PART NUMBER TSSOP – DBT TMS37F158LGIDBTRG4 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. DBT PACKAGE (TOP VIEW) TDAT TEN EOB NPOR PUSH BUSY P2.3 P2.4 P1.0 P1.1 P1.2 P1.4 P1.5 P1.6 P1.7 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 TCLK RF VCL GND VBAT VBATI P2.2 P2.0 RESET XIN XOUT VSS P2.5 VCC TEST Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): TMS37F158 TMS37F158 www.ti.com SCBS877 – MAY 2012 Functional Block Diagram XIN XOUT Oscillator ACLK Comp_A Clock System DMA Controller 3 Channel Bus Control Logic 8MHz CPU incl. 16 Registers POR SMCLK P1.x P2.x I/O Port P1 7 I/Os I/O Port P2 5 I/Os I/O Port P3 4 Internal I/Os LF Controller Internal EEPROM SPI Interface External LF Interface Authentication Coprocessor MAB MDB Analog Frontend Flash RAM 8KB + 256B 256B Timer_A3 3 CC Registers USART0 Watchdog JTAG Interface 15,16 Bit Car side UART, SPI Mode Key fob side Current Measurement Load Drivers GIO UHF Transceiver or UHF Receiver CC11x1-Q1 SPI Interface GIO Optional for battery charge LF Base Station TMS3705-Q1 UHF Transmitter or UHF Transceiver CC11x1-Q1 UHF antenna Up to 13 ft (4 m) cable length Charging Amplifier LF Immobilizer Antenna Embedded Processor SPI 1D LF Antenna Controller Entry Device Push Buttons (Immobilizer and Microcontroller) CED80 LED GIO System Supply Power Supply Figure 1. Application Diagram Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): TMS37F158 3 TMS37F158 SCBS877 – MAY 2012 www.ti.com CX1 CX2 XTAL VBATI XOSC Antenna Matching Network XOSC RF_N RF_P RBIAS SCLK UHF Transmitter or UHF Transceiver CC11x1-Q1 RBIAS JTAG TEST Interface SI SO / GDO1 CSn GND VBATI VBATI RST TEST TCK TMS TDI TDO VCC 47k P1.2 NRST P2.0 P2.2 VBAT TEST P2.3 XIN 470 XOUT ROSC P2.5 P1.0 P1.1 P1.4 P1.5 P1.6 P1.7 MICROCONTROLLER VCC P2.4 CBATI VSS Note: R1 to R6, D1 to D6, RVbati can be integrated in ROM version P3.2 P3.3 P3.6 CLKA/M PUSH SPI_CLK NPOR Important Values RL = 1 M Rvbati = 100 k LR = 2.66 mH CR = 470 pF CL = 220 nF SPI_SOMI D1 .. D6 P3.1 R1 .. R6 SPI_SIMO RVbati BUSY VBATI RF1 EOB CED 80 FRONT END LR VBAT CR BAT VCL CBAT TEST I/F CL GND TDAT TCLK TEN VCL RL Figure 2. Application Schematic 4 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): TMS37F158 TMS37F158 www.ti.com SCBS877 – MAY 2012 Operating Characteristics PART NUMBER TMS37F158ADBTIRG4 Features Immobilizer plus microcontroller with integrated power management DST80 authentication logic 80-bit key length, 4-byte or 5-byte challenge, 3-byte signature DST80 encryption time Mutual authentication: 65 ms Fast authentication: 42 ms Microcontroller 16-bit RISC ultra-low power based on MSP430F123 core Supply voltage (VBAT) 2.0 V to 3.6 V Active current consumption 200 μA (VCC = 2.2 V, fosc = 1 MHz) Standby current consumption 60 nA (typ) (with PUSH logic) Transponder Transmission principle HDX (half duplex telegram protocol) Operating frequency 134.2 kHz Integrated resonant frequency trimming capability via LF or test interface Security Challenge/response, mutual authentication Downlink 100% AM, PPM bit coding with 2 kbit/s (typ) Uplink FSK modulation with 7.9 kbit/s (typ) EEPROM memory 150 bytes EEPROM endurance 200 000 cycles (TA = 25°C) (min) Clock reference for microcontroller Resonant circuit can be used as clock reference for the microcontroller Battery check Two free programmable voltage levels: 2.0 V to 3.6 V with 0.1-V steps Battery charge Integrated battery-charge functionality Key learn-in Special selective addressing to provide secure learn-in procedure 124-byte free available EEPROM user memory 32-bit unique serial number Microcontroller Memory 8KB program memory , 256-byte RAM User data flash memory 256-byte information memory Flash program and erase endurance 100 000 cycles (typ) Flash data retention 100 years (min) Program, erase, read supply voltage 2.7 V (min) I/O ports 12 Operating temperature -40 to 85°C Package 30-pin TSSOP (DBT) Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): TMS37F158 5 PACKAGE OPTION ADDENDUM www.ti.com 30-May-2012 PACKAGING INFORMATION Orderable Device TMS37F158LGIDBTRG4 Status (1) ACTIVE Package Type Package Drawing TSSOP DBT Pins Package Qty Eco Plan 30 TBD (2) Lead/ Ball Finish Call TI MSL Peak Temp (3) Samples (Requires Login) Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. 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