PHILIPS TZA3023

INTEGRATED CIRCUITS
DATA SHEET
TZA3023
SDH/SONET STM4/OC12
transimpedance amplifier
Product specification
Supersedes data of 1997 Oct 17
File under Integrated Circuits, IC19
2000 Mar 29
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
FEATURES
APPLICATIONS
• Wide dynamic input range from 1 µA to 1.5 mA
• Digital fibre optic receiver in short, medium and long
haul optical telecommunications transmission systems
or in high-speed data networks
• Low equivalent input noise of 3.5 pA/√Hz (typical)
• Differential transimpedance of 21 kΩ
• Wideband RF gain block.
• Wide bandwidth from DC to 600 MHz
• Differential outputs
DESCRIPTION
• On-chip Automatic Gain Control (AGC)
The TZA3023 is a low-noise transimpedance amplifier with
AGC designed to be used in STM4/OC12 fibre optic links.
It amplifies the current generated by a photo detector
(PIN diode or avalanche photodiode) and converts it to a
differential output voltage.
• No external components required
• Single supply voltage from 3.0 to 5.5 V
• Bias voltage for PIN diode
• Pin compatible with SA5223.
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
TZA3023T
SO8
TZA3023U
−
DESCRIPTION
VERSION
plastic small outline package; 8 leads; body width 3.9 mm
bare die in waffle pack carriers; die dimensions 1.030 × 1.300 mm
BLOCK DIAGRAM
AGC(1)
VCC
handbook, full pagewidth
(13)
peak detector
8 (11, 12)
2
kΩ
GAIN
CONTROL
DREF 1 (1)
IPhoto 3 (4)
7 (10) OUTQ
A1
low noise
amplifier
6 (9) OUT
single-ended to
differential converter
TZA3023
BIASING
2, 4, 5 (2, 3, 5, 6, 7, 8)
MGK918
GND
The numbers in brackets refer to the pad numbers of the bare die version.
(1) AGC analog I/O is only available on the TZA3023U (pad 13).
Fig.1 Block diagram.
2000 Mar 29
2
SOT96-1
−
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
PINNING
PIN
TZA3023T
PAD
TZA3023U
DREF
1
1
GND
2
2, 3
IPhoto
3
4
GND
4
GND
5
OUT
6
OUTQ
VCC
AGC
SYMBOL
TYPE
DESCRIPTION
analog output
bias voltage for PIN diode; cathode should be connected to
this pin
ground
ground
analog input
current input; anode of PIN diode should be connected to this
pin; DC bias level of 800 mV, one diode voltage above ground
5, 6
ground
ground
7, 8
ground
ground
9
output
data output; pin OUT goes HIGH when current flows into
pin IPhoto
7
10
output
data output; compliment of pin OUT
8
11, 12
supply
supply voltage
−
13
input/output
AGC analog I/O
handbook, halfpage
8 VCC
DREF 1
GND 2
7
OUTQ
TZA3023T
IPhoto
3
6
OUT
GND
4
5
GND
MGK917
Fig.2 Pin configuration.
2000 Mar 29
3
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
FUNCTIONAL DESCRIPTION
The AGC loop hold capacitor is integrated on-chip, so an
external capacitor is not needed for AGC. The AGC
voltage can be monitored at pad 13 on the bare die
(TZA3023U). Pad 13 is not bonded in the packaged device
(TZA3023T). This pad can be left unconnected during
normal operation. It can also be used to force an external
AGC voltage. If pad 13 is connected to GND, the internal
AGC loop is disabled and the receiver gain is at a
maximum. The maximum input current is then
approximately 50 µA.
The TZA3023 is a transimpedance amplifier intended for
use in fibre optic links for signal recovery in STM4/OC12
applications. It amplifies the current generated by a photo
detector (PIN diode or avalanche photodiode) and
transforms it into a differential output voltage. The most
important characteristics of the TZA3023 are high receiver
sensitivity and wide dynamic range.
High receiver sensitivity is achieved by minimizing noise in
the transimpedance amplifier. The signal current
generated by a PIN diode can vary between
1 µA to 1.5 mA (p-p). An AGC loop is implemented to
make it possible to handle such a wide dynamic range.
The AGC loop increases the dynamic range of the receiver
by reducing the feedback resistance of the preamplifier.
handbook, full pagewidth
A differential amplifier converts the single-ended output of
the preamplifier to a differential output voltage (see Fig.3).
VCC
600 Ω
600 Ω
30 Ω
VOUTQ
30 Ω
VOUT
4.5 mA
4.5 mA
2 mA
MGK922
Fig.3 Data output buffer.
CML/PECL OUTPUT
handbook, full pagewidth
VCC
VO(max)
VOQH
VOH
Vo (p-p)
VOQL
VOL
VOO
VO(min)
MGK885
Fig.4 Logic level symbol definitions for data outputs OUT and OUTQ.
2000 Mar 29
4
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
The reverse voltage across the PIN diode is 4.2 V
(5 − 0.8 V) for 5 V supply or 2.5 V (3.3 − 0.8 V) for 3.3 V
supply.
PIN diode bias voltage DREF
The transimpedance amplifier together with the PIN diode
determines the performance of an optical receiver for a
large extent. Especially how the PIN diode is connected to
the input and the layout around the input pin influence the
key parameters like sensitivity, bandwidth and the Power
Supply Rejection Ratio (PSRR) of a transimpedance
amplifier. The total capacitance at the input pin is critical to
obtain the highest sensitivity. It should be kept to a
minimum by reducing the capacitor of the PIN diode and
the parasitics around the input pin. The PIN diode should
be placed very close to the IC to reduce the parasitics.
Because the capacitance of the PIN diode depends on the
reverse voltage across it, the reverse voltage should be
chosen as high as possible.
The DC voltage at DREF decreases with increasing signal
levels. Consequently the reverse voltage across the
PIN diode will also decrease with increasing signal levels.
This can be explained with an example. When the
PIN diode delivers a peak-to-peak current of 1 mA, the
average DC current will be 0.5 mA. This DC current is
delivered by VCC through the internal resistor R1 of 2 kΩ
which will cause a voltage drop of 1 V across the resistor
and the reverse voltage across the PIN diode will be
reduced by 1 V.
It is preferable to connect the cathode of the PIN diode to
a higher voltage then VCC when such a voltage source is
available on the board. In this case pin DREF can be left
unconnected. When a negative supply voltage is available,
the configuration in Fig.6 can be used. It should be noted
that in this case the direction of the signal current is
reversed compared to Fig.5. Proper filtering of the bias
voltage for the PIN diode is essential to achieve the
highest sensitivity level.
The PIN diode can be connected to the input in two ways
as shown in Figs 5 and 6. In Fig.5 the PIN diode is
connected between DREF and IPhoto. Pin DREF provides
an easy bias voltage for the PIN diode. The voltage at
DREF is derived from VCC by a low-pass filter. The
low-pass filter consisting of the internal resistor R1, C1 and
the external capacitor C2 rejects the supply voltage noise.
The external capacitor C2 should be equal or larger then
1 nF for a high PSRR.
VCC
R1
2 kΩ
DREF
C2
1 nF
4
Ii
VCC
8
R1
2 kΩ
DREF
4
C1
10 pF
8
C1
10 pF
IPhoto 7
7
IPhoto
Ii
TZA3023
TZA3023
MCD900
MCD901
negative supply voltage
Fig.5
The PIN diode connected between the input
and pin DREF.
2000 Mar 29
Fig.6
5
The PIN diode connected between the input
and a negative supply voltage.
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
AGC
It is disabled for smaller signals. The transimpedance is
then at its maximum value (21 kΩ differential).
TZA3023 transimpedance amplifier can handle input
currents from 0.5 µA to 1.5 mA. This means a dynamic
range of 72 dB. At low input currents, the transimpedance
must be high to get enough output voltage, and the noise
should be low enough to guaranty minimum bit error rate.
At high input currents however, the transimpedance
should be low to avoid pulse width distortion. This means
that the gain of the amplifier has to vary depending on the
input signal level to handle such a wide dynamic range.
This is achieved in the TZA3023 by implementing an
Automatic Gain Control (AGC) loop.
When the AGC is active, the feedback resistor of the
transimpedance amplifier is reduced to keep the output
voltage constant. The transimpedance is regulated from
21 kΩ at low currents (I < 10 µA) to 800 Ω at high currents
(I < 500 µA). Above 500 µA the transimpedance is at its
minimum and can not be reduced further but the front-end
remains linear until input currents of 1.5 mA.
The upper part of Fig.7 shows the output voltages of the
TZA3023 (OUT and OUTQ) as a function of the DC input
current. In the lower part, the difference of both voltages is
shown. It can be seen from the figure that the output
changes linearly up to 10 µA input current where AGC
becomes active. From this point on, AGC tries to keep the
differential output voltage constant around 200 mV for
medium range input currents (input currents <200 µA).
The AGC can not regulate any more above 600 µA input
current, and the output voltage rises again with the input
current.
The AGC loop consists of a peak detector, a hold capacitor
and a gain control circuit. The peak amplitude of the signal
is detected by the peak detector and it is stored on the hold
capacitor. The voltage over the hold capacitor is compared
to a threshold level. The threshold level is set to
10 µA (p-p) input current. AGC becomes active only for
input signals larger than the threshold level.
MCD914
1.8
handbook,
V full pagewidth
o
(V)
VOUT
1.6
1.4
VCC = 3 V
1.2
VOUTQ
1
600
Vo(dif)
(1)
(mV)
400
(2)
(3)
200
0
1
10
102
Vo(dif) = VOUT − VOUTQ.
(1) VCC = 3 V.
(2) VCC = 3.3 V.
(3) VCC = 5 V.
Fig.7 AGC characteristics.
2000 Mar 29
6
103
Ii (µA)
104
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
MAX.
UNIT
−0.5
+6
pin 3/pad 4: IPhoto
−0.5
+1
V
pins 6 and 7/pads 9 and 10: OUT and OUTQ
−0.5
VCC + 0.5
V
pad 13: AGC (TZA3023U only)
−0.5
VCC + 0.5
V
pin 1/pad 1: DREF
−0.5
VCC + 0.5
V
pin 3/pad 4: IPhoto
−1
+2.5
mA
pins 6 and 7/pads 9 and 10: OUT and OUTQ
−15
+15
mA
pad 13: AGC (TZA3023U only)
−0.2
+0.2
mA
pin 1/pad 1: DREF
−2.5
+2.5
mA
300
mW
VCC
supply voltage
Vn
DC voltage
In
MIN.
V
DC current
Ptot
total power dissipation
−
Tstg
storage temperature
−65
+150
°C
Tj
junction temperature
−
125
°C
Tamb
ambient temperature
−40
+85
°C
HANDLING
Precautions should be taken to avoid damage through electrostatic discharge. This is particularly important during
assembly and handling of the bare die. Additional safety can be obtained by bonding the VCC and GND pads first, the
remaining pads may then be bonded to their external connections in any order.
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
2000 Mar 29
PARAMETER
thermal resistance from junction to ambient
7
VALUE
UNIT
160
K/W
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
CHARACTERISTICS
Typical values at Tamb = 25 °C and VCC = 5 V; minimum and maximum values are valid over the entire ambient
temperature range and supply range; all voltages are measured with respect to ground; unless otherwise specified.
SYMBOL
PARAMETER
VCC
supply voltage
ICC
supply current
Ptot
total power dissipation
Tj
junction temperature
Tamb
ambient temperature
Rtr
differential small-signal
transresistance of the
receiver
f−3dB(h)
PSRR
high frequency −3 dB point
power supply rejection ratio
CONDITIONS
MIN.
TYP.
MAX.
UNIT
3
5
5.5
V
VCC = 5 V; AC coupled;
RL = 50 Ω
23
28
45
mA
VCC = 3.3V; AC coupled;
RL = 50 Ω
20
28
42
mA
VCC = 5 V
−
140
248
mW
VCC = 3.3 V
−
95
152
mW
−40
−
+125
°C
−40
+25
+85
°C
VCC = 5 V; AC coupled;
RL = 50 Ω
17.5
21
25
kΩ
VCC = 3.3 V; AC coupled;
RL = 50 Ω
16
19.5
25
kΩ
VCC = 5 V; Ci = 0.7 pF
450
580
750
MHz
VCC = 3.3 V; Ci = 0.7 pF
440
520
600
MHz
f = 100 kHz to 10 MHz
−
1
2
µA/V
f = 10 to 100 MHz
−
2
5
µA/V
f = 100 MHz to 1 GHz
−
5
100
µA/V
1680
2000
2320
Ω
720
800
970
mV
−1500
+4
+1500
µA
measured differentially;
note 1
Bias voltage: pin DREF
RDREF
resistance between
pins DREF and VCC
DC tested
Input: pin IPhoto
Vbias(IPhoto)
input bias voltage on
pin IPhoto
Ii(IPhoto)(p-p)
input current on pin IPhoto
(peak-to-peak value)
VCC = 3.3 V; note 2
−1000
+4
+1000
µA
Ri
small-signal input resistance
fi = 1 MHz; input current
<2 µA (p-p)
−
95
−
Ω
In(tot)
total integrated RMS noise
current over bandwidth
(referenced to input)
note 3
2000 Mar 29
VCC = 5 V; note 2
∆f = 311 MHz
−
55
−
nA
∆f = 450 MHz
−
80
−
nA
∆f = 622 MHz
−
120
−
nA
8
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
SYMBOL
PARAMETER
TZA3023
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Data outputs: pins OUT and OUTQ
Vo(cm)
common mode output voltage AC coupled; RL = 50 Ω
Vo(se)(p-p)
single-ended output voltage
(peak-to-peak value)
VOO
differential output offset
voltage
Ro(se)
single-ended output
resistance
DC tested
tr, tf
rise time, fall time
VCC − 2
VCC − 1.7
VCC − 1.4
V
200
330
mV
−100
0
+100
mV
40
50
62
Ω
VCC = 5 V; 20% to 80%;
400
input current <10 µA (p-p)
510
700
ps
VCC = 3.3 V; 20% to 80%; 450
input current <10 µA (p-p)
550
700
ps
referred to the peak input −
current; tested at 10 MHz
10
−
µA
AC coupled; RL = 50 Ω;
75
input current 100 µA (p-p)
Automatic gain control loop: pad AGC
Ith(AGC)
AGC threshold current
tatt(AGC)
AGC attack time
−
5
−
µs
tdecay(AGC)
AGC decay time
−
10
−
ms
Notes
1. PSRR is defined as the ratio of the equivalent current change at the input (∆IIPhoto) to a change in supply voltage:
∆I IPhoto
PSRR = ------------------∆V CC
For example, a + 4 mV disturbance on VCC at 10 MHz will typically add an extra 8 nA to the photodiode current. The
external capacitor between pins DREF and GND has a large impact on the PSRR. The specification is valid with an
external capacitor of 1 nF. The PSSR is guaranteed by design.
2. The Pulse Width Distortion (PWD) is <5% over the whole input current range. The PWD is defined as:
pulse width
PWD =  ------------------------------ – 1 × 100% where T is the clock period. The PWD is measured differentially with


T
PRBS pattern of 10−23.
3. All In(tot) measurements were made with an input capacitance of Ci = 1.2 pF. This was comprised of 0.7 pF for the
photodiode itself, with 0.3 pF allowed for the printed-circuit board layout and 0.2 pF intrinsic to the package. Noise
performance is measured differentially.
2000 Mar 29
9
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
TYPICAL PERFORMANCE CHARACTERISTICS
MCD908
40
MCD909
31.4
handbook, halfpage
handbook, halfpage
(mA)
ICC
(mA)
ICC
36
31.0
(2)
32
(1)
(3)
30.6
28
24
30.2
20
−40
0
40
80
Tj (°C)
120
29.8
3
5
4
(1) VCC = 5 V.
(2) VCC = 3.3 V.
(3) VCC = 3 V.
Fig.8
Supply current as a function of the junction
temperature.
Fig.9
MCD910
808
VCC (V)
Supply current as a function of the supply
voltage.
MCD911
900
handbook, halfpage
6
handbook, halfpage
Vi
(mV)
Vi
(mV)
806
820
(1)
(2)
804
(3)
740
802
660
−40
800
3
4
5
VCC (V)
6
0
40
80
Tj (°C)
120
(1) VCC = 5 V.
(2) VCC = 3.3 V.
(3) VCC = 3 V.
Fig.10 Input voltage as a function of the supply
voltage.
2000 Mar 29
Fig.11 Input voltage as a function of the junction
temperature.
10
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
MCD912
1.686
MCD913
1.85
handbook, halfpage
handbook, halfpage
Vo(cm)
Vo(cm)
(V)
(V)
(1)
1.680
(1)
1.75
(2)
1.674
1.65
1.668
(2)
1.55
−40
1.662
3
4
5
VCC (V)
6
0
40
80
Tj (°C)
120
(1) VCC − VOUT.
(2) VCC − VOUTQ.
VCC = 3.3 V.
(1) VCC − VOUT.
(2) VCC − VOUTQ.
Fig.12 Common mode voltage at the output as a
function of the supply voltage.
Fig.13 The common mode voltage at the output as
a function of the junction temperature.
2000 Mar 29
11
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
APPLICATION AND TEST INFORMATION
10 µH
handbook, full pagewidth
22 nF
VP
680 nF
VCC
8
DREF
1
7
TZA3023T
IPhoto
6
OUTQ
1 nF
4
GND
100 nF
Zo = 50 Ω
100 nF
OUT
3
2
Zo = 50 Ω
50 Ω
50 Ω
5
GND
GND
MCD898
Fig.14 Application diagram.
2000 Mar 29
12
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680 nF
(1)
(1)
22 nF
100 nF
DREF
VCCA
7
TZA3023T
1 nF
13
IPhoto
3
8 pF
6
2
4
GND
DIN
CF
7
Vref
15
VCCD
14
4
13
100 Ω
DOUT
TZA3044
10 nF
OUT
noise filter:
1-pole, 400 MHz
5
GND
10 nF
OUTQ
RSET
16
6
1
100 nF
61 kΩ
VCC
8
(1)
DINQ
12
1
AGND
GND
data out
5
3
8
SUB
9
JAM
10
STQ
ST
DOUTQ
11
DGND
16.4 nH
7.5
pF
16.4 nH
Philips Semiconductors
SDH/SONET STM4/OC12
transimpedance amplifier
k, full pagewidth
2000 Mar 29
VCC
level-detect
status
1.1
pF
optional noise filter:
3-pole, 470 MHz Bessel
50 Ω
VCC − 2 V
MCD899
Product specification
Fig.15 STM4/OC12 receiver using the TZA3023T and postamplifier TZA3044.
50 Ω
TZA3023
(1) Ferrite bead e.g. Murata BLM10A700S.
1 kΩ
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
Test circuits
handbook, full pagewidth
R = 1 kΩ, Zi = 100 Ω
ZT = s21.(R + Zi) . 2
NETWORK ANALYZER
S-PARAMETER TEST SET
PORT 1
PORT 2
Zo = 50 Ω
Zo = 50 Ω
VCC
223-1 PRBS
100 nF
PATTERN
GENERATOR
C
C
D
D
TR
OUT
10 nF 1 kΩ
IPhoto
51 Ω
1
OUTQ
TZA3023
SAMPLING
OSCILLOSCOPE/
TDR/TDT
100 nF
C IN
OM5803
2
Zo = 50 Ω
MCD902
Fig.16 Electrical test circuit.
2000 Mar 29
14
TR
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
handbook, full pagewidth
TZA3023
LIGHTWAVE MULTIMETER
−9.54 dBm
OPTICAL
INPUT
ERROR DETECTOR
OPTICAL ATTENUATOR
Data
in
0 dBm/1300
IN
OUT
90% 10%
Clock
in
VCC
22 nF
223-1 PRBS
PATTERN
GENERATOR
C
C
D
D
DREF
LASER DRIVER
DIN
IPhoto
TR
C IN
PIN
OM5802
OUTQ
TZA3023
DINQ
TZA3001
100 nF
OUT
Laser
10 nF
OM5804
100 nF
SAMPLING
OSCILLOSCOPE/
TDR/TDT
TR
1
2
Zo = 50 Ω
622.080 MHz
MCD903
Fig.17 Optical test circuit.
2000 Mar 29
15
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
MCD904
handbook, full pagewidth
Fig.18 Differential output with −30 dBm optical input power [input current of 1.63 µA (p-p)].
MCD905
handbook, full pagewidth
Fig.19 Differential output with −20 dBm optical input power [input current of 16.3 µA (p-p)].
2000 Mar 29
16
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
MCD906
handbook, full pagewidth
Fig.20 Differential output with −10 dBm optical input power [input current of 163 µA (p-p)].
MCD907
handbook, full pagewidth
Fig.21 Differential output with −2 dBm optical input power [input current of 1030 µA (p-p)].
2000 Mar 29
17
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
AGC
VCC
VCC
BONDING PAD LOCATIONS
13
12
11
COORDINATES(1)
PAD
1
95
881
GND
2
95
618
GND
3
95
473
IPhoto
4
95
285
GND
5
215
95
GND
6
360
95
GND
7
549
95
GND
8
691
95
OUT
9
785
501
OUTQ
10
785
641
VCC
11
567
1055
VCC
12
424
1055
AGC
13
259
1055
DREF
1
1300 GND
µm
2
GND
3
IPhoto
4
10
TZA3023U
9
5
6
7
8
GND
DREF
GND
y
GND
x
GND
SYMBOL
OUTQ
OUT
x
0
0
y
Note
1030
µm
MCD897
1. All coordinates are referenced, in µm, to the bottom
left-hand corner of the die.
Fig.22 Bonding pad locations of the TZA3023U.
Physical characteristics of the bare die
PARAMETER
Glass passivation
VALUE
2.1 µm PSG (PhosphoSilicate Glass) on top of 0.65 µm oxynitride
Bonding pad dimension
minimum dimension of exposed metallization is 90 × 90 µm (pad size = 100 × 100 µm)
Metallization
1.22 µm W/AlCu/TiW
Thickness
380 µm nominal
Size
1.03 × 1.30 mm (1.34 mm2)
Backing
silicon; electrically connected to GND potential through substrate contacts
Attach temperature
<440 °C; recommended die attach is glue
Attach time
<15 s
2000 Mar 29
18
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
PACKAGE OUTLINE
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
E
A
X
c
y
HE
v M A
Z
5
8
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
4
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100
0.014 0.0075
0.20
0.19
0.16
0.15
0.244
0.039 0.028
0.050
0.041
0.228
0.016 0.024
inches
0.010 0.057
0.069
0.004 0.049
0.01
0.01
0.028
0.004
0.012
θ
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT96-1
076E03
MS-012
2000 Mar 29
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
97-05-22
99-12-27
19
o
8
0o
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Wave soldering
Manual soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2000 Mar 29
20
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
BGA, LFBGA, SQFP, TFBGA
not suitable
suitable(2)
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
not
PLCC(3), SO, SOJ
suitable
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
REFLOW(1)
suitable
suitable
suitable
not
recommended(3)(4)
suitable
not
recommended(5)
suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2000 Mar 29
21
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
DATA SHEET STATUS
DATA SHEET STATUS
PRODUCT
STATUS
DEFINITIONS (1)
Objective specification
Development
This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification
Qualification
This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
DEFINITIONS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
BARE DIE DISCLAIMER
All die are tested and are guaranteed to comply with all
data sheet limits up to the point of wafer sawing for a
period of ninety (90) days from the date of Philips' delivery.
If there are data sheet limits not guaranteed, these will be
separately indicated in the data sheet. There are no post
packing tests performed on individual die or wafer. Philips
Semiconductors has no control of third party procedures in
the sawing, handling, packing or assembly of the die.
Accordingly, Philips Semiconductors assumes no liability
for device functionality or performance of the die or
systems after third party sawing, handling, packing or
assembly of the die. It is the responsibility of the customer
to test and qualify their application in which the die is used.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
2000 Mar 29
22
Philips Semiconductors
Product specification
SDH/SONET STM4/OC12
transimpedance amplifier
TZA3023
NOTES
2000 Mar 29
23
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SCA 69
© Philips Electronics N.V. 2000
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Printed in The Netherlands
403510/200/02/pp24
Date of release: 2000
Mar 29
Document order number:
9397 750 06816